From c639a1cfc4930684300860abdac5ebcb619523ea Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Fri, 12 Dec 2014 13:40:38 +0100 Subject: drm/imx: enable 15-bit RGB with 1-bit alpha formats This patch enables the ARGB1555, ABGR1555, RGBA5551, and BGRA5551 formats to be used on planes. Signed-off-by: Philipp Zabel --- drivers/gpu/drm/imx/ipuv3-plane.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index 878a643d72e4..d13dbb687f64 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -23,8 +23,12 @@ #define to_ipu_plane(x) container_of(x, struct ipu_plane, base) static const uint32_t ipu_plane_formats[] = { + DRM_FORMAT_ARGB1555, DRM_FORMAT_XRGB1555, + DRM_FORMAT_ABGR1555, DRM_FORMAT_XBGR1555, + DRM_FORMAT_RGBA5551, + DRM_FORMAT_BGRA5551, DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888, DRM_FORMAT_ABGR8888, @@ -175,6 +179,10 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, ipu_dp_set_window_pos(ipu_plane->dp, crtc_x, crtc_y); /* Enable local alpha on partial plane */ switch (fb->pixel_format) { + case DRM_FORMAT_ARGB1555: + case DRM_FORMAT_ABGR1555: + case DRM_FORMAT_RGBA5551: + case DRM_FORMAT_BGRA5551: case DRM_FORMAT_ARGB8888: case DRM_FORMAT_ABGR8888: ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false); -- cgit v1.2.3 From 59d6b7189a968d627af37fc26a410dced0854b99 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Thu, 16 Apr 2015 15:56:40 +0200 Subject: drm/imx: ipuv3-plane: enable support for RGBX8888 and RGBA8888 pixel formats This patch allows to use the RGBX and RGBA 8:8:8:8 formats. Signed-off-by: Philipp Zabel --- drivers/gpu/drm/imx/ipuv3-plane.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index d13dbb687f64..d0309900e634 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -33,6 +33,10 @@ static const uint32_t ipu_plane_formats[] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_ABGR8888, DRM_FORMAT_XBGR8888, + DRM_FORMAT_RGBA8888, + DRM_FORMAT_RGBX8888, + DRM_FORMAT_BGRA8888, + DRM_FORMAT_BGRA8888, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_YUV420, @@ -185,6 +189,8 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, case DRM_FORMAT_BGRA5551: case DRM_FORMAT_ARGB8888: case DRM_FORMAT_ABGR8888: + case DRM_FORMAT_RGBA8888: + case DRM_FORMAT_BGRA8888: ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false); break; default: -- cgit v1.2.3 From cb166a302589f1494a62b6f1ca108fddb3925e31 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 4 Aug 2015 17:22:06 +0200 Subject: drm/imx: enable ARGB4444 16-bit color format This patch allows to use the ARGB4444 color format on planes. Signed-off-by: Lucas Stach Signed-off-by: Philipp Zabel --- drivers/gpu/drm/imx/ipuv3-plane.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index d0309900e634..575f4c84388f 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -29,6 +29,7 @@ static const uint32_t ipu_plane_formats[] = { DRM_FORMAT_XBGR1555, DRM_FORMAT_RGBA5551, DRM_FORMAT_BGRA5551, + DRM_FORMAT_ARGB4444, DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888, DRM_FORMAT_ABGR8888, @@ -187,6 +188,7 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc, case DRM_FORMAT_ABGR1555: case DRM_FORMAT_RGBA5551: case DRM_FORMAT_BGRA5551: + case DRM_FORMAT_ARGB4444: case DRM_FORMAT_ARGB8888: case DRM_FORMAT_ABGR8888: case DRM_FORMAT_RGBA8888: -- cgit v1.2.3 From a5f4185c4b8c131c0ccafa6b1b00cd4e5413e47e Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 15 Oct 2015 15:42:17 +0200 Subject: drm/imx: hdmi: fix HDMI setup to allow modes larger than FullHD This worked before the dw-hdmi bridge code was changed to validate the setup data more strictly. Add back support for modes with a pixel clock up to 216MHz. Even higher clocks should work, but we are missing the required setup data for now. Also change the mode validate callbacks to disallow modes with higher pixelclocks, so we don't end up failing the modeset later on. Signed-off-by: Lucas Stach Signed-off-by: Philipp Zabel --- drivers/gpu/drm/imx/dw_hdmi-imx.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c index 644edf65dbe0..98605ea2ad9d 100644 --- a/drivers/gpu/drm/imx/dw_hdmi-imx.c +++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c @@ -48,11 +48,17 @@ static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = { { 0x40a2, 0x000a }, }, }, { - ~0UL, { + 216000000, { { 0x00a0, 0x000a }, { 0x2001, 0x000f }, { 0x4002, 0x000f }, }, + }, { + ~0UL, { + { 0x0000, 0x0000 }, + { 0x0000, 0x0000 }, + { 0x0000, 0x0000 }, + }, } }; @@ -82,7 +88,7 @@ static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = { */ static const struct dw_hdmi_phy_config imx_phy_config[] = { /*pixelclk symbol term vlev */ - { 148500000, 0x800d, 0x0005, 0x01ad}, + { 216000000, 0x800d, 0x0005, 0x01ad}, { ~0UL, 0x0000, 0x0000, 0x0000} }; @@ -148,7 +154,8 @@ static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con, { if (mode->clock < 13500) return MODE_CLOCK_LOW; - if (mode->clock > 266000) + /* FIXME: Hardware is capable of 266MHz, but setup data is missing. */ + if (mode->clock > 216000) return MODE_CLOCK_HIGH; return MODE_OK; @@ -159,7 +166,8 @@ static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con, { if (mode->clock < 13500) return MODE_CLOCK_LOW; - if (mode->clock > 270000) + /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */ + if (mode->clock > 216000) return MODE_CLOCK_HIGH; return MODE_OK; -- cgit v1.2.3