From 99de2bf455d72859de5c6dbf60f5183787b65440 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Thu, 16 Dec 2004 21:32:32 -0800 Subject: [PATCH] I2C: i2c-nforce2 supports the nForce3 250Gb One more PCI ID for the i2c-nforce2 driver, this time for the nForce3 250Gb variant. Tested, works. (Also cleans up a duplicate define in pci_ids.h.) Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- include/linux/pci_ids.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/linux') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index affb193a43e6..38bf9f395629 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1097,7 +1097,6 @@ #define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0 #define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1 #define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da -#define PCI_DEVICE_ID_NVIDIA_NFORCE3S 0x00e1 #define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4 #define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5 #define PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6 @@ -1105,6 +1104,7 @@ #define PCI_DEVICE_ID_NVIDIA_NVENET_7 0x00df #define PCI_DEVICE_ID_NVIDIA_NFORCE3S 0x00e1 #define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA 0x00e3 +#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS 0x00e4 #define PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE 0x00e5 #define PCI_DEVICE_ID_NVIDIA_NVENET_6 0x00e6 #define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2 0x00ee -- cgit v1.2.3 From 4e512312c1129a37427bc5af139661c1dc49c681 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Mon, 20 Dec 2004 19:08:03 -0800 Subject: [PATCH] I2C: Use PCI_DEVICE in bus drivers > Hint, the PCI_DEVICE() macro makes this a lot simpler :) What about this cleanup patch then? It generalizes the use of PCI_DEVICE() among i2c/busses drivers (with some pci ids cleanups for free). Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- drivers/i2c/busses/i2c-ali1535.c | 7 +--- drivers/i2c/busses/i2c-ali1563.c | 7 +--- drivers/i2c/busses/i2c-ali15x3.c | 7 +--- drivers/i2c/busses/i2c-amd756.c | 15 +++++--- drivers/i2c/busses/i2c-amd8111.c | 2 +- drivers/i2c/busses/i2c-hydra.c | 7 +--- drivers/i2c/busses/i2c-i801.c | 56 +++++------------------------ drivers/i2c/busses/i2c-nforce2.c | 12 +++---- drivers/i2c/busses/i2c-piix4.c | 54 +++++++--------------------- drivers/i2c/busses/i2c-prosavage.c | 7 ---- drivers/i2c/busses/i2c-sis96x.c | 12 +------ drivers/i2c/busses/i2c-viapro.c | 72 +++++++++----------------------------- include/linux/pci_ids.h | 6 ++++ 13 files changed, 62 insertions(+), 202 deletions(-) (limited to 'include/linux') diff --git a/drivers/i2c/busses/i2c-ali1535.c b/drivers/i2c/busses/i2c-ali1535.c index dcc9365676d0..b00cd4098221 100644 --- a/drivers/i2c/busses/i2c-ali1535.c +++ b/drivers/i2c/busses/i2c-ali1535.c @@ -487,12 +487,7 @@ static struct i2c_adapter ali1535_adapter = { }; static struct pci_device_id ali1535_ids[] = { - { - .vendor = PCI_VENDOR_ID_AL, - .device = PCI_DEVICE_ID_AL_M7101, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, + { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) }, { }, }; diff --git a/drivers/i2c/busses/i2c-ali1563.c b/drivers/i2c/busses/i2c-ali1563.c index b3ee9a812bee..1ca7694315ff 100644 --- a/drivers/i2c/busses/i2c-ali1563.c +++ b/drivers/i2c/busses/i2c-ali1563.c @@ -385,12 +385,7 @@ static void __exit ali1563_remove(struct pci_dev * dev) } static struct pci_device_id __devinitdata ali1563_id_table[] = { - { - .vendor = PCI_VENDOR_ID_AL, - .device = PCI_DEVICE_ID_AL_M1563, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, + { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1563) }, {}, }; diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c index 8e13b8341971..5bd6a4a77c1e 100644 --- a/drivers/i2c/busses/i2c-ali15x3.c +++ b/drivers/i2c/busses/i2c-ali15x3.c @@ -477,12 +477,7 @@ static struct i2c_adapter ali15x3_adapter = { }; static struct pci_device_id ali15x3_ids[] = { - { - .vendor = PCI_VENDOR_ID_AL, - .device = PCI_DEVICE_ID_AL_M7101, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, + { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) }, { 0, } }; diff --git a/drivers/i2c/busses/i2c-amd756.c b/drivers/i2c/busses/i2c-amd756.c index 35a1835193c8..eca5ed3738b8 100644 --- a/drivers/i2c/busses/i2c-amd756.c +++ b/drivers/i2c/busses/i2c-amd756.c @@ -316,11 +316,16 @@ static const char* chipname[] = { }; static struct pci_device_id amd756_ids[] = { - {PCI_VENDOR_ID_AMD, 0x740B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD756 }, - {PCI_VENDOR_ID_AMD, 0x7413, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD766 }, - {PCI_VENDOR_ID_AMD, 0x7443, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768 }, - {PCI_VENDOR_ID_AMD, 0x746B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111 }, - {PCI_VENDOR_ID_NVIDIA, 0x01B4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B), + .driver_data = AMD756 }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413), + .driver_data = AMD766 }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7443), + .driver_data = AMD768 }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS), + .driver_data = AMD8111 }, + { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS), + .driver_data = NFORCE }, { 0, } }; diff --git a/drivers/i2c/busses/i2c-amd8111.c b/drivers/i2c/busses/i2c-amd8111.c index 5eb4d38bcf9d..af22b401a38b 100644 --- a/drivers/i2c/busses/i2c-amd8111.c +++ b/drivers/i2c/busses/i2c-amd8111.c @@ -332,7 +332,7 @@ static struct i2c_algorithm smbus_algorithm = { static struct pci_device_id amd8111_ids[] = { - { 0x1022, 0x746a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS2) }, { 0, } }; diff --git a/drivers/i2c/busses/i2c-hydra.c b/drivers/i2c/busses/i2c-hydra.c index 7480fd0b4e69..e0cb3b0f92fa 100644 --- a/drivers/i2c/busses/i2c-hydra.c +++ b/drivers/i2c/busses/i2c-hydra.c @@ -111,12 +111,7 @@ static struct i2c_adapter hydra_adap = { }; static struct pci_device_id hydra_ids[] = { - { - .vendor = PCI_VENDOR_ID_APPLE, - .device = PCI_DEVICE_ID_APPLE_HYDRA, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, + { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_HYDRA) }, { 0, } }; diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 8d6ec1525735..b4acf8891281 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -548,54 +548,14 @@ static struct i2c_adapter i801_adapter = { }; static struct pci_device_id i801_ids[] = { - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801AA_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801AB_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801BA_2, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801CA_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801DB_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801EB_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_ESB_4, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_ICH6_16, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) }, { 0, } }; diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c index 2cf9a75badd8..b2b6081327d8 100644 --- a/drivers/i2c/busses/i2c-nforce2.c +++ b/drivers/i2c/busses/i2c-nforce2.c @@ -291,14 +291,10 @@ static u32 nforce2_func(struct i2c_adapter *adapter) static struct pci_device_id nforce2_ids[] = { - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, - { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, + { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, { 0 } }; diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 8bb467ade222..646381b6b3bf 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -414,48 +414,18 @@ static struct i2c_adapter piix4_adapter = { }; static struct pci_device_id piix4_ids[] = { - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82371AB_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = 3 - }, - { - .vendor = PCI_VENDOR_ID_SERVERWORKS, - .device = PCI_DEVICE_ID_SERVERWORKS_OSB4, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = 0, - }, - { - .vendor = PCI_VENDOR_ID_SERVERWORKS, - .device = PCI_DEVICE_ID_SERVERWORKS_CSB5, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = 0, - }, - { - .vendor = PCI_VENDOR_ID_SERVERWORKS, - .device = PCI_DEVICE_ID_SERVERWORKS_CSB6, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = 0, - }, - { - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82443MX_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = 3, - }, - { - .vendor = PCI_VENDOR_ID_EFAR, - .device = PCI_DEVICE_ID_EFAR_SLC90E66_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = 0, - }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3), + .driver_data = 3 }, + { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4), + .driver_data = 0 }, + { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5), + .driver_data = 0 }, + { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6), + .driver_data = 0 }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3), + .driver_data = 3 }, + { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3), + .driver_data = 0 }, { 0, } }; diff --git a/drivers/i2c/busses/i2c-prosavage.c b/drivers/i2c/busses/i2c-prosavage.c index f5804568b57d..13d66289933b 100644 --- a/drivers/i2c/busses/i2c-prosavage.c +++ b/drivers/i2c/busses/i2c-prosavage.c @@ -96,13 +96,6 @@ struct s_i2c_chip { /* * S3/VIA 8365/8375 registers */ -#ifndef PCI_DEVICE_ID_S3_SAVAGE4 -#define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25 -#endif -#ifndef PCI_DEVICE_ID_S3_PROSAVAGE8 -#define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04 -#endif - #define VGA_CR_IX 0x3d4 #define VGA_CR_DATA 0x3d5 diff --git a/drivers/i2c/busses/i2c-sis96x.c b/drivers/i2c/busses/i2c-sis96x.c index 69a2e7d7e44e..3cac6d43bce5 100644 --- a/drivers/i2c/busses/i2c-sis96x.c +++ b/drivers/i2c/busses/i2c-sis96x.c @@ -51,9 +51,6 @@ */ #define SIS96x_VERSION "1.0.0" -/* SiS96x SMBus PCI device ID */ -#define PCI_DEVICE_ID_SI_SMBUS 0x16 - /* base address register in PCI config space */ #define SIS96x_BAR 0x04 @@ -267,14 +264,7 @@ static struct i2c_adapter sis96x_adapter = { }; static struct pci_device_id sis96x_ids[] = { - - { - .vendor = PCI_VENDOR_ID_SI, - .device = PCI_DEVICE_ID_SI_SMBUS, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, - + { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) }, { 0, } }; diff --git a/drivers/i2c/busses/i2c-viapro.c b/drivers/i2c/busses/i2c-viapro.c index 83a77ba976b0..d86cdc6524e7 100644 --- a/drivers/i2c/busses/i2c-viapro.c +++ b/drivers/i2c/busses/i2c-viapro.c @@ -395,62 +395,22 @@ static void __devexit vt596_remove(struct pci_dev *pdev) } static struct pci_device_id vt596_ids[] = { - { - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_82C596_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = SMBBA1, - }, - { - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_82C596B_3, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = SMBBA1, - }, - { - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_82C686_4, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = SMBBA1, - }, - { - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_8233_0, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = SMBBA3 - }, - { - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_8233A, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = SMBBA3, - }, - { - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_8235, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = SMBBA3 - }, - { - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_8237, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = SMBBA3 - }, - { - .vendor = PCI_VENDOR_ID_VIA, - .device = PCI_DEVICE_ID_VIA_8231_4, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - .driver_data = SMBBA1, - }, + { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596_3), + .driver_data = SMBBA1 }, + { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596B_3), + .driver_data = SMBBA1 }, + { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4), + .driver_data = SMBBA1 }, + { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8233_0), + .driver_data = SMBBA3 }, + { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8233A), + .driver_data = SMBBA3 }, + { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235), + .driver_data = SMBBA3 }, + { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237), + .driver_data = SMBBA3 }, + { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231_4), + .driver_data = SMBBA1 }, { 0, } }; diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 38bf9f395629..3b0624474956 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -496,6 +496,8 @@ # define PCI_DEVICE_ID_AMD_VIPER_7449 PCI_DEVICE_ID_AMD_OPUS_7449 #define PCI_DEVICE_ID_AMD_8111_LAN 0x7462 #define PCI_DEVICE_ID_AMD_8111_IDE 0x7469 +#define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a +#define PCI_DEVICE_ID_AMD_8111_SMBUS 0x746b #define PCI_DEVICE_ID_AMD_8111_AUDIO 0x746d #define PCI_DEVICE_ID_AMD_8151_0 0x7454 #define PCI_DEVICE_ID_AMD_8131_APIC 0x7450 @@ -585,6 +587,7 @@ #define PCI_DEVICE_ID_SI_6202 0x0002 #define PCI_DEVICE_ID_SI_503 0x0008 #define PCI_DEVICE_ID_SI_ACPI 0x0009 +#define PCI_DEVICE_ID_SI_SMBUS 0x0016 #define PCI_DEVICE_ID_SI_LPC 0x0018 #define PCI_DEVICE_ID_SI_5597_VGA 0x0200 #define PCI_DEVICE_ID_SI_6205 0x0205 @@ -1133,6 +1136,7 @@ #define PCI_DEVICE_ID_NVIDIA_IGEFORCE2 0x01a0 #define PCI_DEVICE_ID_NVIDIA_NFORCE 0x01a4 #define PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO 0x01b1 +#define PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS 0x01b4 #define PCI_DEVICE_ID_NVIDIA_NFORCE_IDE 0x01bc #define PCI_DEVICE_ID_NVIDIA_NVENET_1 0x01c3 #define PCI_DEVICE_ID_NVIDIA_NFORCE2 0x01e0 @@ -2048,9 +2052,11 @@ #define PCI_DEVICE_ID_S3_PLATO_PXG 0x8902 #define PCI_DEVICE_ID_S3_ViRGE_DXGX 0x8a01 #define PCI_DEVICE_ID_S3_ViRGE_GX2 0x8a10 +#define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25 #define PCI_DEVICE_ID_S3_ViRGE_MX 0x8c01 #define PCI_DEVICE_ID_S3_ViRGE_MXP 0x8c02 #define PCI_DEVICE_ID_S3_ViRGE_MXPMV 0x8c03 +#define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00 #define PCI_VENDOR_ID_DUNORD 0x5544 -- cgit v1.2.3 From dd13e88a15c5a0bf8e7005de204823bb6eef7ef9 Mon Sep 17 00:00:00 2001 From: "Steven J. Hill" Date: Mon, 20 Dec 2004 19:08:43 -0800 Subject: [PATCH] I2C patch from MIPS tree... Here is a newer i2c patch from the mainline Linux/MIPS kernel tree. Some more changes came in since yesterday. Please apply this for inclusion in the next Linux release. Thanks. Signed-off-by: Steven J. Hill Signed-off-by: Greg Kroah-Hartman --- drivers/i2c/algos/Kconfig | 13 ++ drivers/i2c/algos/Makefile | 2 + drivers/i2c/algos/i2c-algo-sgi.c | 189 +++++++++++++++++++++++++++++ drivers/i2c/algos/i2c-algo-sibyte.c | 231 ++++++++++++++++++++++++++++++++++++ drivers/i2c/busses/Kconfig | 6 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-sibyte.c | 71 +++++++++++ include/linux/i2c-algo-sgi.h | 27 +++++ include/linux/i2c-algo-sibyte.h | 33 ++++++ include/linux/i2c-id.h | 11 ++ 10 files changed, 584 insertions(+) create mode 100644 drivers/i2c/algos/i2c-algo-sgi.c create mode 100644 drivers/i2c/algos/i2c-algo-sibyte.c create mode 100644 drivers/i2c/busses/i2c-sibyte.c create mode 100644 include/linux/i2c-algo-sgi.h create mode 100644 include/linux/i2c-algo-sibyte.h (limited to 'include/linux') diff --git a/drivers/i2c/algos/Kconfig b/drivers/i2c/algos/Kconfig index cf9832bdc746..f13482f9eff2 100644 --- a/drivers/i2c/algos/Kconfig +++ b/drivers/i2c/algos/Kconfig @@ -53,5 +53,18 @@ config I2C_ALGO8XX tristate "MPC8xx CPM I2C interface" depends on 8xx && I2C +config I2C_ALGO_SIBYTE + tristate "SiByte SMBus interface" + depends on SIBYTE_SB1xxx_SOC && I2C + help + Supports the SiByte SOC on-chip I2C interfaces (2 channels). + +config I2C_ALGO_SGI + tristate "I2C SGI interfaces" + depends on I2C + help + Supports the SGI interfaces like the ones found on SGI Indy VINO + or SGI O2 MACE. + endmenu diff --git a/drivers/i2c/algos/Makefile b/drivers/i2c/algos/Makefile index 3545644be0f6..867fe1f67401 100644 --- a/drivers/i2c/algos/Makefile +++ b/drivers/i2c/algos/Makefile @@ -6,6 +6,8 @@ obj-$(CONFIG_I2C_ALGOBIT) += i2c-algo-bit.o obj-$(CONFIG_I2C_ALGOPCF) += i2c-algo-pcf.o obj-$(CONFIG_I2C_ALGOPCA) += i2c-algo-pca.o obj-$(CONFIG_I2C_ALGOITE) += i2c-algo-ite.o +obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o +obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o ifeq ($(CONFIG_I2C_DEBUG_ALGO),y) EXTRA_CFLAGS += -DDEBUG diff --git a/drivers/i2c/algos/i2c-algo-sgi.c b/drivers/i2c/algos/i2c-algo-sgi.c new file mode 100644 index 000000000000..b4e0a065b78b --- /dev/null +++ b/drivers/i2c/algos/i2c-algo-sgi.c @@ -0,0 +1,189 @@ +/* + * i2c-algo-sgi.c: i2c driver algorithms for SGI adapters. + * + * This file is subject to the terms and conditions of the GNU General Public + * License version 2 as published by the Free Software Foundation. + * + * Copyright (C) 2003 Ladislav Michl + */ + +#include +#include +#include +#include +#include + +#include +#include + + +#define SGI_I2C_FORCE_IDLE (0 << 0) +#define SGI_I2C_NOT_IDLE (1 << 0) +#define SGI_I2C_WRITE (0 << 1) +#define SGI_I2C_READ (1 << 1) +#define SGI_I2C_RELEASE_BUS (0 << 2) +#define SGI_I2C_HOLD_BUS (1 << 2) +#define SGI_I2C_XFER_DONE (0 << 4) +#define SGI_I2C_XFER_BUSY (1 << 4) +#define SGI_I2C_ACK (0 << 5) +#define SGI_I2C_NACK (1 << 5) +#define SGI_I2C_BUS_OK (0 << 7) +#define SGI_I2C_BUS_ERR (1 << 7) + +#define get_control() adap->getctrl(adap->data) +#define set_control(val) adap->setctrl(adap->data, val) +#define read_data() adap->rdata(adap->data) +#define write_data(val) adap->wdata(adap->data, val) + + +static int wait_xfer_done(struct i2c_algo_sgi_data *adap) +{ + int i; + + for (i = 0; i < adap->xfer_timeout; i++) { + if ((get_control() & SGI_I2C_XFER_BUSY) == 0) + return 0; + udelay(1); + } + + return -ETIMEDOUT; +} + +static int wait_ack(struct i2c_algo_sgi_data *adap) +{ + int i; + + if (wait_xfer_done(adap)) + return -ETIMEDOUT; + for (i = 0; i < adap->ack_timeout; i++) { + if ((get_control() & SGI_I2C_NACK) == 0) + return 0; + udelay(1); + } + + return -ETIMEDOUT; +} + +static int force_idle(struct i2c_algo_sgi_data *adap) +{ + int i; + + set_control(SGI_I2C_FORCE_IDLE); + for (i = 0; i < adap->xfer_timeout; i++) { + if ((get_control() & SGI_I2C_NOT_IDLE) == 0) + goto out; + udelay(1); + } + return -ETIMEDOUT; +out: + if (get_control() & SGI_I2C_BUS_ERR) + return -EIO; + return 0; +} + +static int do_address(struct i2c_algo_sgi_data *adap, unsigned int addr, + int rd) +{ + if (rd) + set_control(SGI_I2C_NOT_IDLE); + /* Check if bus is idle, eventually force it to do so */ + if (get_control() & SGI_I2C_NOT_IDLE) + if (force_idle(adap)) + return -EIO; + /* Write out the i2c chip address and specify operation */ + set_control(SGI_I2C_HOLD_BUS | SGI_I2C_WRITE | SGI_I2C_NOT_IDLE); + if (rd) + addr |= 1; + write_data(addr); + if (wait_ack(adap)) + return -EIO; + return 0; +} + +static int i2c_read(struct i2c_algo_sgi_data *adap, unsigned char *buf, + unsigned int len) +{ + int i; + + set_control(SGI_I2C_HOLD_BUS | SGI_I2C_READ | SGI_I2C_NOT_IDLE); + for (i = 0; i < len; i++) { + if (wait_xfer_done(adap)) + return -EIO; + buf[i] = read_data(); + } + set_control(SGI_I2C_RELEASE_BUS | SGI_I2C_FORCE_IDLE); + + return 0; + +} + +static int i2c_write(struct i2c_algo_sgi_data *adap, unsigned char *buf, + unsigned int len) +{ + int i; + + /* We are already in write state */ + for (i = 0; i < len; i++) { + write_data(buf[i]); + if (wait_ack(adap)) + return -EIO; + } + return 0; +} + +static int sgi_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], + int num) +{ + struct i2c_algo_sgi_data *adap = i2c_adap->algo_data; + struct i2c_msg *p; + int i, err = 0; + + for (i = 0; !err && i < num; i++) { + p = &msgs[i]; + err = do_address(adap, p->addr, p->flags & I2C_M_RD); + if (err || !p->len) + continue; + if (p->flags & I2C_M_RD) + err = i2c_read(adap, p->buf, p->len); + else + err = i2c_write(adap, p->buf, p->len); + } + + return err; +} + +static u32 sgi_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_SMBUS_EMUL; +} + +static struct i2c_algorithm sgi_algo = { + .name = "SGI algorithm", + .id = I2C_ALGO_SGI, + .master_xfer = sgi_xfer, + .functionality = sgi_func, +}; + +/* + * registering functions to load algorithms at runtime + */ +int i2c_sgi_add_bus(struct i2c_adapter *adap) +{ + adap->id |= sgi_algo.id; + adap->algo = &sgi_algo; + + return i2c_add_adapter(adap); +} + + +int i2c_sgi_del_bus(struct i2c_adapter *adap) +{ + return i2c_del_adapter(adap); +} + +EXPORT_SYMBOL(i2c_sgi_add_bus); +EXPORT_SYMBOL(i2c_sgi_del_bus); + +MODULE_AUTHOR("Ladislav Michl "); +MODULE_DESCRIPTION("I2C-Bus SGI algorithm"); +MODULE_LICENSE("GPL"); diff --git a/drivers/i2c/algos/i2c-algo-sibyte.c b/drivers/i2c/algos/i2c-algo-sibyte.c new file mode 100644 index 000000000000..e4d41caf0b26 --- /dev/null +++ b/drivers/i2c/algos/i2c-algo-sibyte.c @@ -0,0 +1,231 @@ +/* ------------------------------------------------------------------------- */ +/* i2c-algo-sibyte.c i2c driver algorithms for bit-shift adapters */ +/* ------------------------------------------------------------------------- */ +/* Copyright (C) 2001,2002,2003 Broadcom Corporation + Copyright (C) 1995-2000 Simon G. Vogl + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +/* ------------------------------------------------------------------------- */ + +/* With some changes from Kyösti Mälkki and even + Frodo Looijaard . */ + +/* Ported for SiByte SOCs by Broadcom Corporation. */ + +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +/* ----- global defines ----------------------------------------------- */ +#define SMB_CSR(a,r) ((long)(a->reg_base + r)) + +/* ----- global variables --------------------------------------------- */ + +/* module parameters: + */ +static int bit_scan=0; /* have a look at what's hanging 'round */ + + +static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr, + unsigned short flags, char read_write, + u8 command, int size, union i2c_smbus_data * data) +{ + struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data; + int data_bytes = 0; + int error; + + while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY) + ; + + switch (size) { + case I2C_SMBUS_QUICK: + csr_out32((V_SMB_ADDR(addr) | (read_write == I2C_SMBUS_READ ? M_SMB_QDATA : 0) | + V_SMB_TT_QUICKCMD), SMB_CSR(adap, R_SMB_START)); + break; + case I2C_SMBUS_BYTE: + if (read_write == I2C_SMBUS_READ) { + csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_RD1BYTE), + SMB_CSR(adap, R_SMB_START)); + data_bytes = 1; + } else { + csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD)); + csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR1BYTE), + SMB_CSR(adap, R_SMB_START)); + } + break; + case I2C_SMBUS_BYTE_DATA: + csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD)); + if (read_write == I2C_SMBUS_READ) { + csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD1BYTE), + SMB_CSR(adap, R_SMB_START)); + data_bytes = 1; + } else { + csr_out32(V_SMB_LB(data->byte), SMB_CSR(adap, R_SMB_DATA)); + csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE), + SMB_CSR(adap, R_SMB_START)); + } + break; + case I2C_SMBUS_WORD_DATA: + csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD)); + if (read_write == I2C_SMBUS_READ) { + csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD2BYTE), + SMB_CSR(adap, R_SMB_START)); + data_bytes = 2; + } else { + csr_out32(V_SMB_LB(data->word & 0xff), SMB_CSR(adap, R_SMB_DATA)); + csr_out32(V_SMB_MB(data->word >> 8), SMB_CSR(adap, R_SMB_DATA)); + csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE), + SMB_CSR(adap, R_SMB_START)); + } + break; + default: + return -1; /* XXXKW better error code? */ + } + + while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY) + ; + + error = csr_in32(SMB_CSR(adap, R_SMB_STATUS)); + if (error & M_SMB_ERROR) { + /* Clear error bit by writing a 1 */ + csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS)); + return -1; /* XXXKW better error code? */ + } + + if (data_bytes == 1) + data->byte = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xff; + if (data_bytes == 2) + data->word = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xffff; + + return 0; +} + +static int algo_control(struct i2c_adapter *adapter, + unsigned int cmd, unsigned long arg) +{ + return 0; +} + +static u32 bit_func(struct i2c_adapter *adap) +{ + return (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA); +} + + +/* -----exported algorithm data: ------------------------------------- */ + +static struct i2c_algorithm i2c_sibyte_algo = { + "SiByte algorithm", + I2C_ALGO_SIBYTE, + NULL, /* master_xfer */ + smbus_xfer, /* smbus_xfer */ + NULL, /* slave_xmit */ + NULL, /* slave_recv */ + algo_control, /* ioctl */ + bit_func, /* functionality */ +}; + +/* + * registering functions to load algorithms at runtime + */ +int i2c_sibyte_add_bus(struct i2c_adapter *i2c_adap, int speed) +{ + int i; + struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data; + + /* register new adapter to i2c module... */ + + i2c_adap->id |= i2c_sibyte_algo.id; + i2c_adap->algo = &i2c_sibyte_algo; + + /* Set the frequency to 100 kHz */ + csr_out32(speed, SMB_CSR(adap,R_SMB_FREQ)); + csr_out32(0, SMB_CSR(adap,R_SMB_CONTROL)); + + /* scan bus */ + if (bit_scan) { + union i2c_smbus_data data; + int rc; + printk(KERN_INFO " i2c-algo-sibyte.o: scanning bus %s.\n", + i2c_adap->name); + for (i = 0x00; i < 0x7f; i++) { + /* XXXKW is this a realistic probe? */ + rc = smbus_xfer(i2c_adap, i, 0, I2C_SMBUS_READ, 0, + I2C_SMBUS_BYTE_DATA, &data); + if (!rc) { + printk("(%02x)",i); + } else + printk("."); + } + printk("\n"); + } + +#ifdef MODULE + MOD_INC_USE_COUNT; +#endif + i2c_add_adapter(i2c_adap); + + return 0; +} + + +int i2c_sibyte_del_bus(struct i2c_adapter *adap) +{ + int res; + + if ((res = i2c_del_adapter(adap)) < 0) + return res; + +#ifdef MODULE + MOD_DEC_USE_COUNT; +#endif + return 0; +} + +int __init i2c_algo_sibyte_init (void) +{ + printk("i2c-algo-sibyte.o: i2c SiByte algorithm module\n"); + return 0; +} + + +EXPORT_SYMBOL(i2c_sibyte_add_bus); +EXPORT_SYMBOL(i2c_sibyte_del_bus); + +#ifdef MODULE +MODULE_AUTHOR("Kip Walker, Broadcom Corp."); +MODULE_DESCRIPTION("SiByte I2C-Bus algorithm"); +MODULE_PARM(bit_scan, "i"); +MODULE_PARM_DESC(bit_scan, "Scan for active chips on the bus"); +MODULE_LICENSE("GPL"); + +int init_module(void) +{ + return i2c_algo_sibyte_init(); +} + +void cleanup_module(void) +{ +} +#endif diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index d0e7da45523a..14bedba48216 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -323,6 +323,12 @@ config I2C_SAVAGE4 This driver can also be built as a module. If so, the module will be called i2c-savage4. +config I2C_SIBYTE + tristate "SiByte SMBus interface" + depends on SIBYTE_SB1xxx_SOC && I2C + help + Supports the SiByte SOC on-chip I2C interfaces (2 channels). + config SCx200_I2C tristate "NatSemi SCx200 I2C using GPIO pins" depends on SCx200_GPIO && I2C diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index e414a1d1ec77..fd58b2e609a3 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -29,6 +29,7 @@ obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o obj-$(CONFIG_I2C_RPXLITE) += i2c-rpx.o obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o obj-$(CONFIG_I2C_SAVAGE4) += i2c-savage4.o +obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o obj-$(CONFIG_I2C_SIS5595) += i2c-sis5595.o obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o diff --git a/drivers/i2c/busses/i2c-sibyte.c b/drivers/i2c/busses/i2c-sibyte.c new file mode 100644 index 000000000000..e5dd90bdb04a --- /dev/null +++ b/drivers/i2c/busses/i2c-sibyte.c @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2004 Steven J. Hill + * Copyright (C) 2001,2002,2003 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include +#include +#include +#include + +static struct i2c_algo_sibyte_data sibyte_board_data[2] = { + { NULL, 0, (void *) (KSEG1+A_SMB_BASE(0)) }, + { NULL, 1, (void *) (KSEG1+A_SMB_BASE(1)) } +}; + +static struct i2c_adapter sibyte_board_adapter[2] = { + { + .owner = THIS_MODULE, + .id = I2C_HW_SIBYTE, + .class = I2C_CLASS_HWMON, + .algo = NULL, + .algo_data = &sibyte_board_data[0], + .name = "SiByte SMBus 0", + }, + { + .owner = THIS_MODULE, + .id = I2C_HW_SIBYTE, + .class = I2C_CLASS_HWMON, + .algo = NULL, + .algo_data = &sibyte_board_data[1], + .name = "SiByte SMBus 1", + }, +}; + +static int __init i2c_sibyte_init(void) +{ + printk("i2c-swarm.o: i2c SMBus adapter module for SiByte board\n"); + if (i2c_sibyte_add_bus(&sibyte_board_adapter[0], K_SMB_FREQ_100KHZ) < 0) + return -ENODEV; + if (i2c_sibyte_add_bus(&sibyte_board_adapter[1], K_SMB_FREQ_400KHZ) < 0) + return -ENODEV; + return 0; +} + +static void __exit i2c_sibyte_exit(void) +{ + i2c_sibyte_del_bus(&sibyte_board_adapter[0]); + i2c_sibyte_del_bus(&sibyte_board_adapter[1]); +} + +module_init(i2c_sibyte_init); +module_exit(i2c_sibyte_exit); + +MODULE_AUTHOR("Kip Walker , Steven J. Hill "); +MODULE_DESCRIPTION("SMBus adapter routines for SiByte boards"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/i2c-algo-sgi.h b/include/linux/i2c-algo-sgi.h new file mode 100644 index 000000000000..4a0113d64064 --- /dev/null +++ b/include/linux/i2c-algo-sgi.h @@ -0,0 +1,27 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License version 2 as published by the Free Software Foundation. + * + * Copyright (C) 2003 Ladislav Michl + */ + +#ifndef I2C_ALGO_SGI_H +#define I2C_ALGO_SGI_H 1 + +#include + +struct i2c_algo_sgi_data { + void *data; /* private data for lowlevel routines */ + unsigned (*getctrl)(void *data); + void (*setctrl)(void *data, unsigned val); + unsigned (*rdata)(void *data); + void (*wdata)(void *data, unsigned val); + + int xfer_timeout; + int ack_timeout; +}; + +int i2c_sgi_add_bus(struct i2c_adapter *); +int i2c_sgi_del_bus(struct i2c_adapter *); + +#endif /* I2C_ALGO_SGI_H */ diff --git a/include/linux/i2c-algo-sibyte.h b/include/linux/i2c-algo-sibyte.h new file mode 100644 index 000000000000..03914ded8614 --- /dev/null +++ b/include/linux/i2c-algo-sibyte.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2001,2002,2003 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef I2C_ALGO_SIBYTE_H +#define I2C_ALGO_SIBYTE_H 1 + +#include + +struct i2c_algo_sibyte_data { + void *data; /* private data */ + int bus; /* which bus */ + void *reg_base; /* CSR base */ +}; + +int i2c_sibyte_add_bus(struct i2c_adapter *, int speed); +int i2c_sibyte_del_bus(struct i2c_adapter *); + +#endif /* I2C_ALGO_SIBYTE_H */ diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h index c75219a37bb5..a75f38041df5 100644 --- a/include/linux/i2c-id.h +++ b/include/linux/i2c-id.h @@ -109,6 +109,7 @@ #define I2C_DRIVERID_OVCAMCHIP 61 /* OmniVision CMOS image sens. */ #define I2C_DRIVERID_TDA7313 62 /* TDA7313 audio processor */ #define I2C_DRIVERID_MAX6900 63 /* MAX6900 real-time clock */ +#define I2C_DRIVERID_SAA7114H 64 /* video decoder */ #define I2C_DRIVERID_EXP0 0xF0 /* experimental use id's */ @@ -196,6 +197,9 @@ #define I2C_ALGO_OCP_IOP3XX 0x140000 /* XSCALE IOP3XX On-chip I2C alg */ #define I2C_ALGO_PCA 0x150000 /* PCA 9564 style adapters */ +#define I2C_ALGO_SIBYTE 0x150000 /* Broadcom SiByte SOCs */ +#define I2C_ALGO_SGI 0x160000 /* SGI algorithm */ + #define I2C_ALGO_EXP 0x800000 /* experimental */ #define I2C_ALGO_MASK 0xff0000 /* Mask for algorithms */ @@ -258,6 +262,13 @@ /* --- PowerPC on-chip adapters */ #define I2C_HW_OCP 0x00 /* IBM on-chip I2C adapter */ +/* --- Broadcom SiByte adapters */ +#define I2C_HW_SIBYTE 0x00 + +/* --- SGI adapters */ +#define I2C_HW_SGI_VINO 0x00 +#define I2C_HW_SGI_MACE 0x01 + /* --- XSCALE on-chip adapters */ #define I2C_HW_IOP321 0x00 -- cgit v1.2.3 From 57683a86839aaba3b861c3baa0da94a6140e0c36 Mon Sep 17 00:00:00 2001 From: Deepak Saxena Date: Wed, 5 Jan 2005 23:05:54 -0800 Subject: [PATCH] Update IOP3xx I2C bus driver The following patch is a major cleanup of the IOP3xx I2C bus driver that is found on Intel's IOP and IXP chipsets. The existing driver in the 2.6 tree uses hardcoded I/O addresses based on board configuration which is just going to get ugly as more chips use this unit. The update switches to using the driver model and passing in the I/O addresses via platform_device resources. The patch also updates the ID name to more closely match the actual usage of the device. I have tested this new driver on IXP46x systems and Dave Jiang has tested it on both IOP321 and IOP331 systems. ARM-specific patches to provide platform-level hooks will go upstream after this patch is integrated. An example of using the new driver (from IXP46x ARM code) follows: static struct resource ixp46x_i2c_resources[] = { [0] = { .start = 0xc8011000, .end = 0xc801101c, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_IXP4XX_I2C, .end = IRQ_IXP4XX_I2C, .flags = IORESOURCE_IRQ } }; static struct platform_device ixp46x_i2c_controller = { .name = "IOP3xx-I2C", .id = 0, .num_resources = 2, .resource = &ixp46x_i2c_resources }; static struct platform_device *ixp46x_devices[] __initdata = { &ixp46x_i2c_controller }; void __init ixp4xx_init(void) { if (cpu_is_ixp46x()) { platform_add_devices(ixp46x_devices, ARRAY_SIZE(ixp46x_devices)); } } Signed-off-by: Deepak Saxena Signed-off-by: Greg Kroah-Hartman --- drivers/i2c/busses/Kconfig | 10 +- drivers/i2c/busses/i2c-iop3xx.c | 547 +++++++++++++++++++++------------------- drivers/i2c/busses/i2c-iop3xx.h | 103 ++++---- include/linux/i2c-id.h | 4 +- 4 files changed, 339 insertions(+), 325 deletions(-) (limited to 'include/linux') diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 14bedba48216..9d44bd94b712 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -143,8 +143,14 @@ config I2C_IBM_IIC will be called i2c-ibm_iic. config I2C_IOP3XX - tristate "Intel XScale IOP3xx on-chip I2C interface" - depends on ARCH_IOP3XX && I2C + tristate "Intel IOP3xx and IXP4xx on-chip I2C interface" + depends on (ARCH_IOP3XX || ARCH_IXP4XX) && I2C + help + Say Y here if you want to use the IIC bus controller on + the Intel IOP3xx I/O Processors or IXP4xx Network Processors. + + This driver can also be built as a module. If so, the module + will be called i2c-iop3xx. config I2C_ISA tristate "ISA Bus support" diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c index 844aa3e03256..961241b19f88 100644 --- a/drivers/i2c/busses/i2c-iop3xx.c +++ b/drivers/i2c/busses/i2c-iop3xx.c @@ -1,35 +1,30 @@ /* ------------------------------------------------------------------------- */ -/* i2c-iop3xx.c i2c driver algorithms for Intel XScale IOP3xx */ +/* i2c-iop3xx.c i2c driver algorithms for Intel XScale IOP3xx & IXP46x */ /* ------------------------------------------------------------------------- */ -/* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd - * - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, version 2. - - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -/* ------------------------------------------------------------------------- */ -/* - With acknowledgements to i2c-algo-ibm_ocp.c by - Ian DaSilva, MontaVista Software, Inc. idasilva@mvista.com - - And i2c-algo-pcf.c, which was created by Simon G. Vogl and Hans Berglund: - - Copyright (C) 1995-1997 Simon G. Vogl, 1998-2000 Hans Berglund - - And which acknowledged Kyösti Mälkki , - Frodo Looijaard , Martin Bailey - - ---------------------------------------------------------------------------*/ +/* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd + * + * + * With acknowledgements to i2c-algo-ibm_ocp.c by + * Ian DaSilva, MontaVista Software, Inc. idasilva@mvista.com + * + * And i2c-algo-pcf.c, which was created by Simon G. Vogl and Hans Berglund: + * + * Copyright (C) 1995-1997 Simon G. Vogl, 1998-2000 Hans Berglund + * + * And which acknowledged Kyösti Mälkki , + * Frodo Looijaard , Martin Bailey + * + * Major cleanup by Deepak Saxena , 01/2005: + * + * - Use driver model to pass per-chip info instead of hardcoding and #ifdefs + * - Use ioremap/__raw_readl/__raw_writel instead of direct dereference + * - Make it work with IXP46x chips + * - Cleanup function names, coding style, etc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, version 2. + */ #include #include @@ -40,24 +35,18 @@ #include #include #include +#include #include +#include -#include -#include #include "i2c-iop3xx.h" +/* global unit counter */ +static int i2c_id = 0; -/* ----- global defines ----------------------------------------------- */ -#define PASSERT(x) do { if (!(x) ) \ - printk(KERN_CRIT "PASSERT %s in %s:%d\n", #x, __FILE__, __LINE__ );\ - } while (0) - - -/* ----- global variables --------------------------------------------- */ - - -static inline unsigned char iic_cook_addr(struct i2c_msg *msg) +static inline unsigned char +iic_cook_addr(struct i2c_msg *msg) { unsigned char addr; @@ -66,103 +55,110 @@ static inline unsigned char iic_cook_addr(struct i2c_msg *msg) if (msg->flags & I2C_M_RD) addr |= 1; - /* PGM: what is M_REV_DIR_ADDR - do we need it ?? */ + /* + * Read or Write? + */ if (msg->flags & I2C_M_REV_DIR_ADDR) addr ^= 1; return addr; } - -static inline void iop3xx_adap_reset(struct i2c_algo_iop3xx_data *iop3xx_adap) +static void +iop3xx_i2c_reset(struct i2c_algo_iop3xx_data *iop3xx_adap) { /* Follows devman 9.3 */ - *iop3xx_adap->biu->CR = IOP321_ICR_UNIT_RESET; - *iop3xx_adap->biu->SR = IOP321_ISR_CLEARBITS; - *iop3xx_adap->biu->CR = 0; + __raw_writel(IOP3XX_ICR_UNIT_RESET, iop3xx_adap->ioaddr + CR_OFFSET); + __raw_writel(IOP3XX_ISR_CLEARBITS, iop3xx_adap->ioaddr + SR_OFFSET); + __raw_writel(0, iop3xx_adap->ioaddr + CR_OFFSET); } -static inline void iop3xx_adap_set_slave_addr(struct i2c_algo_iop3xx_data *iop3xx_adap) +static void +iop3xx_i2c_set_slave_addr(struct i2c_algo_iop3xx_data *iop3xx_adap) { - *iop3xx_adap->biu->SAR = MYSAR; + __raw_writel(MYSAR, iop3xx_adap->ioaddr + SAR_OFFSET); } -static inline void iop3xx_adap_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) +static void +iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) { - u32 cr = IOP321_ICR_GCD|IOP321_ICR_SCLEN|IOP321_ICR_UE; + u32 cr = IOP3XX_ICR_GCD | IOP3XX_ICR_SCLEN | IOP3XX_ICR_UE; + + /* + * Everytime unit enable is asserted, GPOD needs to be cleared + * on IOP321 to avoid data corruption on the bus. + */ +#ifdef CONFIG_ARCH_IOP321 +#define IOP321_GPOD_I2C0 0x00c0 /* clear these bits to enable ch0 */ +#define IOP321_GPOD_I2C1 0x0030 /* clear these bits to enable ch1 */ + *IOP321_GPOD &= (iop3xx_adap->id == 0) ? ~IOP321_GPOD_I2C0 : + ~IOP321_GPOD_I2C1; +#endif /* NB SR bits not same position as CR IE bits :-( */ - iop3xx_adap->biu->SR_enabled = - IOP321_ISR_ALD | IOP321_ISR_BERRD | - IOP321_ISR_RXFULL | IOP321_ISR_TXEMPTY; + iop3xx_adap->SR_enabled = + IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD | + IOP3XX_ISR_RXFULL | IOP3XX_ISR_TXEMPTY; - cr |= IOP321_ICR_ALDIE | IOP321_ICR_BERRIE | - IOP321_ICR_RXFULLIE | IOP321_ICR_TXEMPTYIE; + cr |= IOP3XX_ICR_ALD_IE | IOP3XX_ICR_BERR_IE | + IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE; - *iop3xx_adap->biu->CR = cr; + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); } -static void iop3xx_adap_transaction_cleanup(struct i2c_algo_iop3xx_data *iop3xx_adap) +static void +iop3xx_i2c_transaction_cleanup(struct i2c_algo_iop3xx_data *iop3xx_adap) { - unsigned cr = *iop3xx_adap->biu->CR; + unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); - cr &= ~(IOP321_ICR_MSTART | IOP321_ICR_TBYTE | - IOP321_ICR_MSTOP | IOP321_ICR_SCLEN); - *iop3xx_adap->biu->CR = cr; -} + cr &= ~(IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE | + IOP3XX_ICR_MSTOP | IOP3XX_ICR_SCLEN); -static void iop3xx_adap_final_cleanup(struct i2c_algo_iop3xx_data *iop3xx_adap) -{ - unsigned cr = *iop3xx_adap->biu->CR; - - cr &= ~(IOP321_ICR_ALDIE | IOP321_ICR_BERRIE | - IOP321_ICR_RXFULLIE | IOP321_ICR_TXEMPTYIE); - iop3xx_adap->biu->SR_enabled = 0; - *iop3xx_adap->biu->CR = cr; + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); } /* * NB: the handler has to clear the source of the interrupt! * Then it passes the SR flags of interest to BH via adap data */ -static irqreturn_t iop3xx_i2c_handler(int this_irq, - void *dev_id, - struct pt_regs *regs) +static irqreturn_t +iop3xx_i2c_irq_handler(int this_irq, void *dev_id, struct pt_regs *regs) { struct i2c_algo_iop3xx_data *iop3xx_adap = dev_id; + u32 sr = __raw_readl(iop3xx_adap->ioaddr + SR_OFFSET); - u32 sr = *iop3xx_adap->biu->SR; - - if ((sr &= iop3xx_adap->biu->SR_enabled)) { - *iop3xx_adap->biu->SR = sr; - iop3xx_adap->biu->SR_received |= sr; + if ((sr &= iop3xx_adap->SR_enabled)) { + __raw_writel(sr, iop3xx_adap->ioaddr + SR_OFFSET); + iop3xx_adap->SR_received |= sr; wake_up_interruptible(&iop3xx_adap->waitq); } return IRQ_HANDLED; } /* check all error conditions, clear them , report most important */ -static int iop3xx_adap_error(u32 sr) +static int +iop3xx_i2c_error(u32 sr) { int rc = 0; - if ((sr&IOP321_ISR_BERRD)) { + if ((sr & IOP3XX_ISR_BERRD)) { if ( !rc ) rc = -I2C_ERR_BERR; } - if ((sr&IOP321_ISR_ALD)) { + if ((sr & IOP3XX_ISR_ALD)) { if ( !rc ) rc = -I2C_ERR_ALD; } return rc; } -static inline u32 get_srstat(struct i2c_algo_iop3xx_data *iop3xx_adap) +static inline u32 +iop3xx_i2c_get_srstat(struct i2c_algo_iop3xx_data *iop3xx_adap) { unsigned long flags; u32 sr; spin_lock_irqsave(&iop3xx_adap->lock, flags); - sr = iop3xx_adap->biu->SR_received; - iop3xx_adap->biu->SR_received = 0; + sr = iop3xx_adap->SR_received; + iop3xx_adap->SR_received = 0; spin_unlock_irqrestore(&iop3xx_adap->lock, flags); return sr; @@ -175,9 +171,10 @@ static inline u32 get_srstat(struct i2c_algo_iop3xx_data *iop3xx_adap) typedef int (* compare_func)(unsigned test, unsigned mask); /* returns 1 on correct comparison */ -static int iop3xx_adap_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, - unsigned flags, unsigned* status, - compare_func compare) +static int +iop3xx_i2c_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, + unsigned flags, unsigned* status, + compare_func compare) { unsigned sr = 0; int interrupted; @@ -187,13 +184,13 @@ static int iop3xx_adap_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, do { interrupted = wait_event_interruptible_timeout ( iop3xx_adap->waitq, - (done = compare( sr = get_srstat(iop3xx_adap),flags )), - iop3xx_adap->timeout + (done = compare( sr = iop3xx_i2c_get_srstat(iop3xx_adap) ,flags )), + 1 * HZ; ); - if ((rc = iop3xx_adap_error(sr)) < 0) { + if ((rc = iop3xx_i2c_error(sr)) < 0) { *status = sr; return rc; - }else if (!interrupted) { + } else if (!interrupted) { *status = sr; return -ETIMEDOUT; } @@ -207,141 +204,131 @@ static int iop3xx_adap_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, /* * Concrete compare_funcs */ -static int all_bits_clear(unsigned test, unsigned mask) +static int +all_bits_clear(unsigned test, unsigned mask) { return (test & mask) == 0; } -static int any_bits_set(unsigned test, unsigned mask) + +static int +any_bits_set(unsigned test, unsigned mask) { return (test & mask) != 0; } -static int iop3xx_adap_wait_tx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) +static int +iop3xx_i2c_wait_tx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) { - return iop3xx_adap_wait_event( + return iop3xx_i2c_wait_event( iop3xx_adap, - IOP321_ISR_TXEMPTY|IOP321_ISR_ALD|IOP321_ISR_BERRD, + IOP3XX_ISR_TXEMPTY | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, status, any_bits_set); } -static int iop3xx_adap_wait_rx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) +static int +iop3xx_i2c_wait_rx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) { - return iop3xx_adap_wait_event( + return iop3xx_i2c_wait_event( iop3xx_adap, - IOP321_ISR_RXFULL|IOP321_ISR_ALD|IOP321_ISR_BERRD, + IOP3XX_ISR_RXFULL | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, status, any_bits_set); } -static int iop3xx_adap_wait_idle(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) -{ - return iop3xx_adap_wait_event( - iop3xx_adap, IOP321_ISR_UNITBUSY, status, all_bits_clear); -} - -/* - * Description: This performs the IOP3xx initialization sequence - * Valid for IOP321. Maybe valid for IOP310?. - */ -static int iop3xx_adap_init (struct i2c_algo_iop3xx_data *iop3xx_adap) +static int +iop3xx_i2c_wait_idle(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) { - *IOP321_GPOD &= ~(iop3xx_adap->channel==0 ? - IOP321_GPOD_I2C0: - IOP321_GPOD_I2C1); - - iop3xx_adap_reset(iop3xx_adap); - iop3xx_adap_set_slave_addr(iop3xx_adap); - iop3xx_adap_enable(iop3xx_adap); - - return 0; + return iop3xx_i2c_wait_event( + iop3xx_adap, IOP3XX_ISR_UNITBUSY, status, all_bits_clear); } -static int iop3xx_adap_send_target_slave_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, - struct i2c_msg* msg) +static int +iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, + struct i2c_msg* msg) { - unsigned cr = *iop3xx_adap->biu->CR; + unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); int status; int rc; - *iop3xx_adap->biu->DBR = iic_cook_addr(msg); + __raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET); - cr &= ~(IOP321_ICR_MSTOP | IOP321_ICR_NACK); - cr |= IOP321_ICR_MSTART | IOP321_ICR_TBYTE; - - *iop3xx_adap->biu->CR = cr; - rc = iop3xx_adap_wait_tx_done(iop3xx_adap, &status); - /* this assert fires every time, contrary to IOP manual - PASSERT((status&IOP321_ISR_UNITBUSY)!=0); - */ - PASSERT((status&IOP321_ISR_RXREAD)==0); - + cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); + cr |= IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE; + + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); + rc = iop3xx_i2c_wait_tx_done(iop3xx_adap, &status); + return rc; } -static int iop3xx_adap_write_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char byte, int stop) +static int +iop3xx_i2c_write_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char byte, + int stop) { - unsigned cr = *iop3xx_adap->biu->CR; + unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); int status; int rc = 0; - *iop3xx_adap->biu->DBR = byte; - cr &= ~IOP321_ICR_MSTART; + __raw_writel(byte, iop3xx_adap->ioaddr + DBR_OFFSET); + cr &= ~IOP3XX_ICR_MSTART; if (stop) { - cr |= IOP321_ICR_MSTOP; + cr |= IOP3XX_ICR_MSTOP; } else { - cr &= ~IOP321_ICR_MSTOP; + cr &= ~IOP3XX_ICR_MSTOP; } - *iop3xx_adap->biu->CR = cr |= IOP321_ICR_TBYTE; - rc = iop3xx_adap_wait_tx_done(iop3xx_adap, &status); + cr |= IOP3XX_ICR_TBYTE; + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); + rc = iop3xx_i2c_wait_tx_done(iop3xx_adap, &status); return rc; } -static int iop3xx_adap_read_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, - char* byte, int stop) +static int +iop3xx_i2c_read_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char* byte, + int stop) { - unsigned cr = *iop3xx_adap->biu->CR; + unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); int status; int rc = 0; - cr &= ~IOP321_ICR_MSTART; + cr &= ~IOP3XX_ICR_MSTART; if (stop) { - cr |= IOP321_ICR_MSTOP|IOP321_ICR_NACK; + cr |= IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK; } else { - cr &= ~(IOP321_ICR_MSTOP|IOP321_ICR_NACK); + cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); } - *iop3xx_adap->biu->CR = cr |= IOP321_ICR_TBYTE; + cr |= IOP3XX_ICR_TBYTE; + __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); - rc = iop3xx_adap_wait_rx_done(iop3xx_adap, &status); + rc = iop3xx_i2c_wait_rx_done(iop3xx_adap, &status); - *byte = *iop3xx_adap->biu->DBR; + *byte = __raw_readl(iop3xx_adap->ioaddr + DBR_OFFSET); return rc; } -static int iop3xx_i2c_writebytes(struct i2c_adapter *i2c_adap, - const char *buf, int count) +static int +iop3xx_i2c_writebytes(struct i2c_adapter *i2c_adap, const char *buf, int count) { struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; int ii; int rc = 0; - for (ii = 0; rc == 0 && ii != count; ++ii) { - rc = iop3xx_adap_write_byte(iop3xx_adap, buf[ii], ii==count-1); - } + for (ii = 0; rc == 0 && ii != count; ++ii) + rc = iop3xx_i2c_write_byte(iop3xx_adap, buf[ii], ii==count-1); return rc; } -static int iop3xx_i2c_readbytes(struct i2c_adapter *i2c_adap, - char *buf, int count) +static int +iop3xx_i2c_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count) { struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; int ii; int rc = 0; - for (ii = 0; rc == 0 && ii != count; ++ii) { - rc = iop3xx_adap_read_byte(iop3xx_adap, &buf[ii], ii==count-1); - } + for (ii = 0; rc == 0 && ii != count; ++ii) + rc = iop3xx_i2c_read_byte(iop3xx_adap, &buf[ii], ii==count-1); + return rc; } @@ -352,12 +339,13 @@ static int iop3xx_i2c_readbytes(struct i2c_adapter *i2c_adap, * Each transfer (i.e. a read or a write) is separated by a repeated start * condition. */ -static int iop3xx_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg* pmsg) +static int +iop3xx_i2c_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg* pmsg) { struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; int rc; - rc = iop3xx_adap_send_target_slave_addr(iop3xx_adap, pmsg); + rc = iop3xx_i2c_send_target_addr(iop3xx_adap, pmsg); if (rc < 0) { return rc; } @@ -372,22 +360,24 @@ static int iop3xx_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg* pmsg) /* * master_xfer() - main read/write entry */ -static int iop3xx_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num) +static int +iop3xx_i2c_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], + int num) { struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; int im = 0; int ret = 0; int status; - iop3xx_adap_wait_idle(iop3xx_adap, &status); - iop3xx_adap_reset(iop3xx_adap); - iop3xx_adap_enable(iop3xx_adap); + iop3xx_i2c_wait_idle(iop3xx_adap, &status); + iop3xx_i2c_reset(iop3xx_adap); + iop3xx_i2c_enable(iop3xx_adap); for (im = 0; ret == 0 && im != num; im++) { - ret = iop3xx_handle_msg(i2c_adap, &msgs[im]); + ret = iop3xx_i2c_handle_msg(i2c_adap, &msgs[im]); } - iop3xx_adap_transaction_cleanup(iop3xx_adap); + iop3xx_i2c_transaction_cleanup(iop3xx_adap); if(ret) return ret; @@ -395,136 +385,165 @@ static int iop3xx_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[ return im; } -static int algo_control(struct i2c_adapter *adapter, unsigned int cmd, +static int +iop3xx_i2c_algo_control(struct i2c_adapter *adapter, unsigned int cmd, unsigned long arg) { return 0; } -static u32 iic_func(struct i2c_adapter *adap) +static u32 +iop3xx_i2c_func(struct i2c_adapter *adap) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; } - -/* -----exported algorithm data: ------------------------------------- */ - -static struct i2c_algorithm iic_algo = { +static struct i2c_algorithm iop3xx_i2c_algo = { .name = "IOP3xx I2C algorithm", - .id = I2C_ALGO_OCP_IOP3XX, - .master_xfer = iop3xx_master_xfer, - .algo_control = algo_control, - .functionality = iic_func, + .id = I2C_ALGO_IOP3XX, + .master_xfer = iop3xx_i2c_master_xfer, + .algo_control = iop3xx_i2c_algo_control, + .functionality = iop3xx_i2c_func, }; -/* - * registering functions to load algorithms at runtime - */ -static int i2c_iop3xx_add_bus(struct i2c_adapter *iic_adap) +static int +iop3xx_i2c_remove(struct device *device) { - struct i2c_algo_iop3xx_data *iop3xx_adap = iic_adap->algo_data; + struct platform_device *pdev = to_platform_device(device); + struct i2c_adapter *padapter = dev_get_drvdata(&pdev->dev); + struct i2c_algo_iop3xx_data *adapter_data = + (struct i2c_algo_iop3xx_data *)padapter->algo_data; + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + unsigned long cr = __raw_readl(adapter_data->ioaddr + CR_OFFSET); + + /* + * Disable the actual HW unit + */ + cr &= ~(IOP3XX_ICR_ALD_IE | IOP3XX_ICR_BERR_IE | + IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE); + __raw_writel(cr, adapter_data->ioaddr + CR_OFFSET); + + iounmap((void __iomem*)adapter_data->ioaddr); + release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); + kfree(adapter_data); + kfree(padapter); + + dev_set_drvdata(&pdev->dev, NULL); + + return 0; +} - if (!request_region( REGION_START(iop3xx_adap), - REGION_LENGTH(iop3xx_adap), - iic_adap->name)) { - return -ENODEV; +static int +iop3xx_i2c_probe(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct resource *res; + int ret; + struct i2c_adapter *new_adapter; + struct i2c_algo_iop3xx_data *adapter_data; + + new_adapter = kmalloc(sizeof(struct i2c_adapter), GFP_KERNEL); + if (!new_adapter) { + ret = -ENOMEM; + goto out; } + memset((void*)new_adapter, 0, sizeof(*new_adapter)); - init_waitqueue_head(&iop3xx_adap->waitq); - spin_lock_init(&iop3xx_adap->lock); + adapter_data = kmalloc(sizeof(struct i2c_algo_iop3xx_data), GFP_KERNEL); + if (!adapter_data) { + ret = -ENOMEM; + goto free_adapter; + } + memset((void*)adapter_data, 0, sizeof(*adapter_data)); - if (request_irq( - iop3xx_adap->biu->irq, - iop3xx_i2c_handler, - /* SA_SAMPLE_RANDOM */ 0, - iic_adap->name, - iop3xx_adap)) { - return -ENODEV; - } + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + ret = -ENODEV; + goto free_both; + } - /* register new iic_adapter to i2c module... */ - iic_adap->id |= iic_algo.id; - iic_adap->algo = &iic_algo; + if (!request_mem_region(res->start, IOP3XX_I2C_IO_SIZE, pdev->name)) { + ret = -EBUSY; + goto free_both; + } - iic_adap->timeout = 100; /* default values, should */ - iic_adap->retries = 3; /* be replaced by defines */ + /* set the adapter enumeration # */ + adapter_data->id = i2c_id++; - iop3xx_adap_init(iic_adap->algo_data); - i2c_add_adapter(iic_adap); - return 0; -} + adapter_data->ioaddr = (u32)ioremap(res->start, IOP3XX_I2C_IO_SIZE); + if (!adapter_data->ioaddr) { + ret = -ENOMEM; + goto release_region; + } -static int i2c_iop3xx_del_bus(struct i2c_adapter *iic_adap) -{ - struct i2c_algo_iop3xx_data *iop3xx_adap = iic_adap->algo_data; + res = request_irq(platform_get_irq(pdev, 0), iop3xx_i2c_irq_handler, 0, + pdev->name, adapter_data); + if (res) { + ret = -EIO; + goto unmap; + } - iop3xx_adap_final_cleanup(iop3xx_adap); - free_irq(iop3xx_adap->biu->irq, iop3xx_adap); + memcpy(new_adapter->name, pdev->name, strlen(pdev->name)); + new_adapter->id = I2C_HW_IOP3XX; + new_adapter->owner = THIS_MODULE; + new_adapter->dev.parent = &pdev->dev; - release_region(REGION_START(iop3xx_adap), REGION_LENGTH(iop3xx_adap)); + /* + * Default values...should these come in from board code? + */ + new_adapter->timeout = 100; + new_adapter->retries = 3; + new_adapter->algo = &iop3xx_i2c_algo; - return i2c_del_adapter(iic_adap); -} + init_waitqueue_head(&adapter_data->waitq); + spin_lock_init(&adapter_data->lock); -#ifdef CONFIG_ARCH_IOP321 + iop3xx_i2c_reset(adapter_data); + iop3xx_i2c_set_slave_addr(adapter_data); + iop3xx_i2c_enable(adapter_data); -static struct iop3xx_biu biu0 = { - .CR = IOP321_ICR0, - .SR = IOP321_ISR0, - .SAR = IOP321_ISAR0, - .DBR = IOP321_IDBR0, - .BMR = IOP321_IBMR0, - .irq = IRQ_IOP321_I2C_0, -}; + dev_set_drvdata(&pdev->dev, new_adapter); + new_adapter->algo_data = adapter_data; -static struct iop3xx_biu biu1 = { - .CR = IOP321_ICR1, - .SR = IOP321_ISR1, - .SAR = IOP321_ISAR1, - .DBR = IOP321_IDBR1, - .BMR = IOP321_IBMR1, - .irq = IRQ_IOP321_I2C_1, -}; + i2c_add_adapter(new_adapter); -#define ADAPTER_NAME_ROOT "IOP321 i2c biu adapter " -#else -#error Please define the BIU struct iop3xx_biu for your processor arch -#endif + return 0; -static struct i2c_algo_iop3xx_data algo_iop3xx_data0 = { - .channel = 0, - .biu = &biu0, - .timeout = 1*HZ, -}; -static struct i2c_algo_iop3xx_data algo_iop3xx_data1 = { - .channel = 1, - .biu = &biu1, - .timeout = 1*HZ, -}; +unmap: + iounmap((void __iomem*)adapter_data->ioaddr); -static struct i2c_adapter iop3xx_ops0 = { - .owner = THIS_MODULE, - .name = ADAPTER_NAME_ROOT "0", - .id = I2C_HW_IOP321, - .algo_data = &algo_iop3xx_data0, -}; -static struct i2c_adapter iop3xx_ops1 = { - .owner = THIS_MODULE, - .name = ADAPTER_NAME_ROOT "1", - .id = I2C_HW_IOP321, - .algo_data = &algo_iop3xx_data1, +release_region: + release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); + +free_both: + kfree(adapter_data); + +free_adapter: + kfree(new_adapter); + +out: + return ret; +} + + +static struct device_driver iop3xx_i2c_driver = { + .name = "IOP3xx-I2C", + .bus = &platform_bus_type, + .probe = iop3xx_i2c_probe, + .remove = iop3xx_i2c_remove }; -static int __init i2c_iop3xx_init (void) +static int __init +i2c_iop3xx_init (void) { - return i2c_iop3xx_add_bus(&iop3xx_ops0) || - i2c_iop3xx_add_bus(&iop3xx_ops1); + return driver_register(&iop3xx_i2c_driver); } -static void __exit i2c_iop3xx_exit (void) +static void __exit +i2c_iop3xx_exit (void) { - i2c_iop3xx_del_bus(&iop3xx_ops0); - i2c_iop3xx_del_bus(&iop3xx_ops1); + driver_unregister(&iop3xx_i2c_driver); + return; } module_init (i2c_iop3xx_init); diff --git a/drivers/i2c/busses/i2c-iop3xx.h b/drivers/i2c/busses/i2c-iop3xx.h index f375881842a1..e46ebaea7b1e 100644 --- a/drivers/i2c/busses/i2c-iop3xx.h +++ b/drivers/i2c/busses/i2c-iop3xx.h @@ -25,20 +25,20 @@ /* * iop321 hardware bit definitions */ -#define IOP321_ICR_FAST_MODE 0x8000 /* 1=400kBps, 0=100kBps */ -#define IOP321_ICR_UNIT_RESET 0x4000 /* 1=RESET */ -#define IOP321_ICR_SADIE 0x2000 /* 1=Slave Detect Interrupt Enable */ -#define IOP321_ICR_ALDIE 0x1000 /* 1=Arb Loss Detect Interrupt Enable */ -#define IOP321_ICR_SSDIE 0x0800 /* 1=Slave STOP Detect Interrupt Enable */ -#define IOP321_ICR_BERRIE 0x0400 /* 1=Bus Error Interrupt Enable */ -#define IOP321_ICR_RXFULLIE 0x0200 /* 1=Receive Full Interrupt Enable */ -#define IOP321_ICR_TXEMPTYIE 0x0100 /* 1=Transmit Empty Interrupt Enable */ -#define IOP321_ICR_GCD 0x0080 /* 1=General Call Disable */ +#define IOP3XX_ICR_FAST_MODE 0x8000 /* 1=400kBps, 0=100kBps */ +#define IOP3XX_ICR_UNIT_RESET 0x4000 /* 1=RESET */ +#define IOP3XX_ICR_SAD_IE 0x2000 /* 1=Slave Detect Interrupt Enable */ +#define IOP3XX_ICR_ALD_IE 0x1000 /* 1=Arb Loss Detect Interrupt Enable */ +#define IOP3XX_ICR_SSD_IE 0x0800 /* 1=Slave STOP Detect Interrupt Enable */ +#define IOP3XX_ICR_BERR_IE 0x0400 /* 1=Bus Error Interrupt Enable */ +#define IOP3XX_ICR_RXFULL_IE 0x0200 /* 1=Receive Full Interrupt Enable */ +#define IOP3XX_ICR_TXEMPTY_IE 0x0100 /* 1=Transmit Empty Interrupt Enable */ +#define IOP3XX_ICR_GCD 0x0080 /* 1=General Call Disable */ /* - * IOP321_ICR_GCD: 1 disables response as slave. "This bit must be set + * IOP3XX_ICR_GCD: 1 disables response as slave. "This bit must be set * when sending a master mode general call message from the I2C unit" */ -#define IOP321_ICR_UE 0x0040 /* 1=Unit Enable */ +#define IOP3XX_ICR_UE 0x0040 /* 1=Unit Enable */ /* * "NOTE: To avoid I2C bus integrity problems, * the user needs to ensure that the GPIO Output Data Register - @@ -47,38 +47,38 @@ * The user prepares to enable I2C port 0 and * I2C port 1 by clearing GPOD bits 7:6 and GPOD bits 5:4, respectively. */ -#define IOP321_ICR_SCLEN 0x0020 /* 1=SCL enable for master mode */ -#define IOP321_ICR_MABORT 0x0010 /* 1=Send a STOP with no data +#define IOP3XX_ICR_SCLEN 0x0020 /* 1=SCL enable for master mode */ +#define IOP3XX_ICR_MABORT 0x0010 /* 1=Send a STOP with no data * NB TBYTE must be clear */ -#define IOP321_ICR_TBYTE 0x0008 /* 1=Send/Receive a byte. i2c clears */ -#define IOP321_ICR_NACK 0x0004 /* 1=reply with NACK */ -#define IOP321_ICR_MSTOP 0x0002 /* 1=send a STOP after next data byte */ -#define IOP321_ICR_MSTART 0x0001 /* 1=initiate a START */ +#define IOP3XX_ICR_TBYTE 0x0008 /* 1=Send/Receive a byte. i2c clears */ +#define IOP3XX_ICR_NACK 0x0004 /* 1=reply with NACK */ +#define IOP3XX_ICR_MSTOP 0x0002 /* 1=send a STOP after next data byte */ +#define IOP3XX_ICR_MSTART 0x0001 /* 1=initiate a START */ -#define IOP321_ISR_BERRD 0x0400 /* 1=BUS ERROR Detected */ -#define IOP321_ISR_SAD 0x0200 /* 1=Slave ADdress Detected */ -#define IOP321_ISR_GCAD 0x0100 /* 1=General Call Address Detected */ -#define IOP321_ISR_RXFULL 0x0080 /* 1=Receive Full */ -#define IOP321_ISR_TXEMPTY 0x0040 /* 1=Transmit Empty */ -#define IOP321_ISR_ALD 0x0020 /* 1=Arbitration Loss Detected */ -#define IOP321_ISR_SSD 0x0010 /* 1=Slave STOP Detected */ -#define IOP321_ISR_BBUSY 0x0008 /* 1=Bus BUSY */ -#define IOP321_ISR_UNITBUSY 0x0004 /* 1=Unit Busy */ -#define IOP321_ISR_NACK 0x0002 /* 1=Unit Rx or Tx a NACK */ -#define IOP321_ISR_RXREAD 0x0001 /* 1=READ 0=WRITE (R/W bit of slave addr */ +#define IOP3XX_ISR_BERRD 0x0400 /* 1=BUS ERROR Detected */ +#define IOP3XX_ISR_SAD 0x0200 /* 1=Slave ADdress Detected */ +#define IOP3XX_ISR_GCAD 0x0100 /* 1=General Call Address Detected */ +#define IOP3XX_ISR_RXFULL 0x0080 /* 1=Receive Full */ +#define IOP3XX_ISR_TXEMPTY 0x0040 /* 1=Transmit Empty */ +#define IOP3XX_ISR_ALD 0x0020 /* 1=Arbitration Loss Detected */ +#define IOP3XX_ISR_SSD 0x0010 /* 1=Slave STOP Detected */ +#define IOP3XX_ISR_BBUSY 0x0008 /* 1=Bus BUSY */ +#define IOP3XX_ISR_UNITBUSY 0x0004 /* 1=Unit Busy */ +#define IOP3XX_ISR_NACK 0x0002 /* 1=Unit Rx or Tx a NACK */ +#define IOP3XX_ISR_RXREAD 0x0001 /* 1=READ 0=WRITE (R/W bit of slave addr */ -#define IOP321_ISR_CLEARBITS 0x07f0 +#define IOP3XX_ISR_CLEARBITS 0x07f0 -#define IOP321_ISAR_SAMASK 0x007f +#define IOP3XX_ISAR_SAMASK 0x007f -#define IOP321_IDBR_MASK 0x00ff +#define IOP3XX_IDBR_MASK 0x00ff -#define IOP321_IBMR_SCL 0x0002 -#define IOP321_IBMR_SDA 0x0001 +#define IOP3XX_IBMR_SCL 0x0002 +#define IOP3XX_IBMR_SDA 0x0001 -#define IOP321_GPOD_I2C0 0x00c0 /* clear these bits to enable ch0 */ -#define IOP321_GPOD_I2C1 0x0030 /* clear these bits to enable ch1 */ +#define IOP3XX_GPOD_I2C0 0x00c0 /* clear these bits to enable ch0 */ +#define IOP3XX_GPOD_I2C1 0x0030 /* clear these bits to enable ch1 */ #define MYSAR 0x02 /* SWAG a suitable slave address */ @@ -87,32 +87,21 @@ #define I2C_ERR_ALD (I2C_ERR+1) -struct iop3xx_biu { /* Bus Interface Unit - the hardware */ -/* physical hardware defs - regs*/ - u32 *CR; - u32 *SR; - u32 *SAR; - u32 *DBR; - u32 *BMR; -/* irq bit vector */ - u32 irq; -/* stored flags */ - u32 SR_enabled, SR_received; -}; +#define CR_OFFSET 0 +#define SR_OFFSET 0x4 +#define SAR_OFFSET 0x8 +#define DBR_OFFSET 0xc +#define CCR_OFFSET 0x10 +#define BMR_OFFSET 0x14 -struct i2c_algo_iop3xx_data { - int channel; +#define IOP3XX_I2C_IO_SIZE 0x18 +struct i2c_algo_iop3xx_data { + u32 ioaddr; wait_queue_head_t waitq; spinlock_t lock; - int timeout; - struct iop3xx_biu* biu; + u32 SR_enabled, SR_received; + int id; }; -#define REGION_START(adap) ((u32)((adap)->biu->CR)) -#define REGION_END(adap) ((u32)((adap)->biu->BMR+1)) -#define REGION_LENGTH(adap) (REGION_END(adap)-REGION_START(adap)) - -#define IRQ_STATUS_MASK(adap) (1<biu->irq) - #endif /* I2C_IOP3XX_H */ diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h index a75f38041df5..802732f51a23 100644 --- a/include/linux/i2c-id.h +++ b/include/linux/i2c-id.h @@ -194,7 +194,7 @@ #define I2C_ALGO_MPC8XX 0x110000 /* MPC8xx PowerPC I2C algorithm */ #define I2C_ALGO_OCP 0x120000 /* IBM or otherwise On-chip I2C algorithm */ #define I2C_ALGO_BITHS 0x130000 /* enhanced bit style adapters */ -#define I2C_ALGO_OCP_IOP3XX 0x140000 /* XSCALE IOP3XX On-chip I2C alg */ +#define I2C_ALGO_IOP3XX 0x140000 /* XSCALE IOP3XX On-chip I2C alg */ #define I2C_ALGO_PCA 0x150000 /* PCA 9564 style adapters */ #define I2C_ALGO_SIBYTE 0x150000 /* Broadcom SiByte SOCs */ @@ -270,7 +270,7 @@ #define I2C_HW_SGI_MACE 0x01 /* --- XSCALE on-chip adapters */ -#define I2C_HW_IOP321 0x00 +#define I2C_HW_IOP3XX 0x00 /* --- SMBus only adapters */ #define I2C_HW_SMBUS_PIIX4 0x00 -- cgit v1.2.3 From b3aa40315f5f2eb84e9f53f87974e08c1343e416 Mon Sep 17 00:00:00 2001 From: "Mark M. Hoffman" Date: Thu, 6 Jan 2005 19:14:41 -0800 Subject: [PATCH] I2C: add new sensors driver: SMSC LPC47B397-NC This patch (3rd time's a charm) adds support for the SMSC LPC47B397-NC sensor chip. It was sponsored by In-Store Broadcasting Network. Signed-off-by: Craig Kelly (In-Store Broadcasting Network) Signed-off-by: Glenn Ball (Utilitek Systems, Inc.) Signed-off-by: Mark M. Hoffman --- Documentation/i2c/chips/smsc47b397.txt | 146 ++++++++++++++ drivers/i2c/chips/Kconfig | 12 ++ drivers/i2c/chips/Makefile | 1 + drivers/i2c/chips/smsc47b397.c | 353 +++++++++++++++++++++++++++++++++ include/linux/i2c-id.h | 1 + 5 files changed, 513 insertions(+) create mode 100644 Documentation/i2c/chips/smsc47b397.txt create mode 100644 drivers/i2c/chips/smsc47b397.c (limited to 'include/linux') diff --git a/Documentation/i2c/chips/smsc47b397.txt b/Documentation/i2c/chips/smsc47b397.txt new file mode 100644 index 000000000000..389edae7f8df --- /dev/null +++ b/Documentation/i2c/chips/smsc47b397.txt @@ -0,0 +1,146 @@ +November 23, 2004 + +The following specification describes the SMSC LPC47B397-NC sensor chip +(for which there is no public datasheet available). This document was +provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected +by Mark M. Hoffman . + +* * * * * + +Methods for detecting the HP SIO and reading the thermal data on a dc7100. + +The thermal information on the dc7100 is contained in the SIO Hardware Monitor +(HWM). The information is accessed through an index/data pair. The index/data +pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The +HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB) +and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and +0x480 and 0x481 for the index/data pair. + +Reading temperature information. +The temperature information is located in the following registers: +Temp1 0x25 (Currently, this reflects the CPU temp on all systems). +Temp2 0x26 +Temp3 0x27 +Temp4 0x80 + +Programming Example +The following is an example of how to read the HWM temperature registers: +MOV DX,480H +MOV AX,25H +OUT DX,AL +MOV DX,481H +IN AL,DX + +AL contains the data in hex, the temperature in Celsius is the decimal +equivalent. + +Ex: If AL contains 0x2A, the temperature is 42 degrees C. + +Reading tach information. +The fan speed information is located in the following registers: + LSB MSB +Tach1 0x28 0x29 (Currently, this reflects the CPU + fan speed on all systems). +Tach2 0x2A 0x2B +Tach3 0x2C 0x2D +Tach4 0x2E 0x2F + +Important!!! +Reading the tach LSB locks the tach MSB. +The LSB Must be read first. + +How to convert the tach reading to RPM. +The tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB) +The SIO counts the number of 90kHz (11.111us) pulses per revolution. +RPM = 60/(TCount * 11.111us) + +Example: +Reg 0x28 = 0x9B +Reg 0x29 = 0x08 + +TCount = 0x89B = 2203 + +RPM = 60 / (2203 * 11.11111 E-6) = 2451 RPM + +Obtaining the SIO version. + +CONFIGURATION SEQUENCE +To program the configuration registers, the following sequence must be followed: +1. Enter Configuration Mode +2. Configure the Configuration Registers +3. Exit Configuration Mode. + +Enter Configuration Mode +To place the chip into the Configuration State The config key (0x55) is written +to the CONFIG PORT (0x2E). + +Configuration Mode +In configuration mode, the INDEX PORT is located at the CONFIG PORT address and +the DATA PORT is at INDEX PORT address + 1. + +The desired configuration registers are accessed in two steps: +a. Write the index of the Logical Device Number Configuration Register + (i.e., 0x07) to the INDEX PORT and then write the number of the + desired logical device to the DATA PORT. + +b. Write the address of the desired configuration register within the + logical device to the INDEX PORT and then write or read the config- + uration register through the DATA PORT. + +Note: If accessing the Global Configuration Registers, step (a) is not required. + +Exit Configuration Mode +To exit the Configuration State the write 0xAA to the CONFIG PORT (0x2E). +The chip returns to the RUN State. (This is important). + +Programming Example +The following is an example of how to read the SIO Device ID located at 0x20 + +; ENTER CONFIGURATION MODE +MOV DX,02EH +MOV AX,055H +OUT DX,AL +; GLOBAL CONFIGURATION REGISTER +MOV DX,02EH +MOV AL,20H +OUT DX,AL +; READ THE DATA +MOV DX,02FH +IN AL,DX +; EXIT CONFIGURATION MODE +MOV DX,02EH +MOV AX,0AAH +OUT DX,AL + +The registers of interest for identifying the SIO on the dc7100 are Device ID +(0x20) and Device Rev (0x21). + +The Device ID will read 0X6F +The Device Rev currently reads 0x01 + +Obtaining the HWM Base Address. +The following is an example of how to read the HWM Base Address located in +Logical Device 8. + +; ENTER CONFIGURATION MODE +MOV DX,02EH +MOV AX,055H +OUT DX,AL +; CONFIGURE REGISTER CRE0, +; LOGICAL DEVICE 8 +MOV DX,02EH +MOV AL,07H +OUT DX,AL ;Point to LD# Config Reg +MOV DX,02FH +MOV AL, 08H +OUT DX,AL;Point to Logical Device 8 +; +MOV DX,02EH +MOV AL,60H +OUT DX,AL ; Point to HWM Base Addr MSB +MOV DX,02FH +IN AL,DX ; Get MSB of HWM Base Addr +; EXIT CONFIGURATION MODE +MOV DX,02EH +MOV AX,0AAH +OUT DX,AL diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig index f1f35409ab8d..1c4ba5619908 100644 --- a/drivers/i2c/chips/Kconfig +++ b/drivers/i2c/chips/Kconfig @@ -239,6 +239,18 @@ config SENSORS_PC87360 This driver can also be built as a module. If so, the module will be called pc87360. +config SENSORS_SMSC47B397 + tristate "SMSC LPC47B397-NC" + depends on I2C && EXPERIMENTAL + select I2C_SENSOR + select I2C_ISA + help + If you say yes here you get support for the SMSC LPC47B397-NC + sensor chip. + + This driver can also be built as a module. If so, the module + will be called smsc47b397. + config SENSORS_SMSC47M1 tristate "SMSC LPC47M10x and compatibles" depends on I2C && EXPERIMENTAL diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile index 90dd7dd0ca14..74dd56873a8b 100644 --- a/drivers/i2c/chips/Makefile +++ b/drivers/i2c/chips/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_SENSORS_PC87360) += pc87360.o obj-$(CONFIG_SENSORS_PCF8574) += pcf8574.o obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o obj-$(CONFIG_SENSORS_RTC8564) += rtc8564.o +obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o obj-$(CONFIG_SENSORS_VIA686A) += via686a.o obj-$(CONFIG_SENSORS_W83L785TS) += w83l785ts.o diff --git a/drivers/i2c/chips/smsc47b397.c b/drivers/i2c/chips/smsc47b397.c new file mode 100644 index 000000000000..aab9f246d7e2 --- /dev/null +++ b/drivers/i2c/chips/smsc47b397.c @@ -0,0 +1,353 @@ +/* + smsc47b397.c - Part of lm_sensors, Linux kernel modules + for hardware monitoring + + Supports the SMSC LPC47B397-NC Super-I/O chip. + + Author/Maintainer: Mark M. Hoffman + Copyright (C) 2004 Utilitek Systems, Inc. + + derived in part from smsc47m1.c: + Copyright (C) 2002 Mark D. Studebaker + Copyright (C) 2004 Jean Delvare + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include +#include +#include +#include +#include +#include +#include + +static unsigned short normal_i2c[] = { I2C_CLIENT_END }; +/* Address is autodetected, there is no default value */ +static unsigned int normal_isa[] = { 0x0000, I2C_CLIENT_ISA_END }; +static struct i2c_force_data forces[] = {{NULL}}; + +enum chips { any_chip, smsc47b397 }; +static struct i2c_address_data addr_data = { + .normal_i2c = normal_i2c, + .normal_isa = normal_isa, + .probe = normal_i2c, /* cheat */ + .ignore = normal_i2c, /* cheat */ + .forces = forces, +}; + +/* Super-I/0 registers and commands */ + +#define REG 0x2e /* The register to read/write */ +#define VAL 0x2f /* The value to read/write */ + +static inline void superio_outb(int reg, int val) +{ + outb(reg, REG); + outb(val, VAL); +} + +static inline int superio_inb(int reg) +{ + outb(reg, REG); + return inb(VAL); +} + +/* select superio logical device */ +static inline void superio_select(int ld) +{ + superio_outb(0x07, ld); +} + +static inline void superio_enter(void) +{ + outb(0x55, REG); +} + +static inline void superio_exit(void) +{ + outb(0xAA, REG); +} + +#define SUPERIO_REG_DEVID 0x20 +#define SUPERIO_REG_DEVREV 0x21 +#define SUPERIO_REG_BASE_MSB 0x60 +#define SUPERIO_REG_BASE_LSB 0x61 +#define SUPERIO_REG_LD8 0x08 + +#define SMSC_EXTENT 0x02 + +/* 0 <= nr <= 3 */ +static u8 smsc47b397_reg_temp[] = {0x25, 0x26, 0x27, 0x80}; +#define SMSC47B397_REG_TEMP(nr) (smsc47b397_reg_temp[(nr)]) + +/* 0 <= nr <= 3 */ +#define SMSC47B397_REG_FAN_LSB(nr) (0x28 + 2 * (nr)) +#define SMSC47B397_REG_FAN_MSB(nr) (0x29 + 2 * (nr)) + +struct smsc47b397_data { + struct i2c_client client; + struct semaphore lock; + + struct semaphore update_lock; + unsigned long last_updated; /* in jiffies */ + int valid; + + /* register values */ + u16 fan[4]; + u8 temp[4]; +}; + +static int smsc47b397_read_value(struct i2c_client *client, u8 reg) +{ + struct smsc47b397_data *data = i2c_get_clientdata(client); + int res; + + down(&data->lock); + outb(reg, client->addr); + res = inb_p(client->addr + 1); + up(&data->lock); + return res; +} + +static struct smsc47b397_data *smsc47b397_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct smsc47b397_data *data = i2c_get_clientdata(client); + int i; + + down(&data->update_lock); + + if (time_after(jiffies - data->last_updated, (unsigned long)HZ) + || time_before(jiffies, data->last_updated) || !data->valid) { + + dev_dbg(&client->dev, "starting device update...\n"); + + /* 4 temperature inputs, 4 fan inputs */ + for (i = 0; i < 4; i++) { + data->temp[i] = smsc47b397_read_value(client, + SMSC47B397_REG_TEMP(i)); + + /* must read LSB first */ + data->fan[i] = smsc47b397_read_value(client, + SMSC47B397_REG_FAN_LSB(i)); + data->fan[i] |= smsc47b397_read_value(client, + SMSC47B397_REG_FAN_MSB(i)) << 8; + } + + data->last_updated = jiffies; + data->valid = 1; + + dev_dbg(&client->dev, "... device update complete\n"); + } + + up(&data->update_lock); + + return data; +} + +/* TEMP: 0.001C/bit (-128C to +127C) + REG: 1C/bit, two's complement */ +static int temp_from_reg(u8 reg) +{ + return (s8)reg * 1000; +} + +/* 0 <= nr <= 3 */ +static ssize_t show_temp(struct device *dev, char *buf, int nr) +{ + struct smsc47b397_data *data = smsc47b397_update_device(dev); + return sprintf(buf, "%d\n", temp_from_reg(data->temp[nr])); +} + +#define sysfs_temp(num) \ +static ssize_t show_temp##num(struct device *dev, char *buf) \ +{ \ + return show_temp(dev, buf, num-1); \ +} \ +static DEVICE_ATTR(temp##num##_input, S_IRUGO, show_temp##num, NULL) + +sysfs_temp(1); +sysfs_temp(2); +sysfs_temp(3); +sysfs_temp(4); + +#define device_create_file_temp(client, num) \ + device_create_file(&client->dev, &dev_attr_temp##num##_input) + +/* FAN: 1 RPM/bit + REG: count of 90kHz pulses / revolution */ +static int fan_from_reg(u16 reg) +{ + return 90000 * 60 / reg; +} + +/* 0 <= nr <= 3 */ +static ssize_t show_fan(struct device *dev, char *buf, int nr) +{ + struct smsc47b397_data *data = smsc47b397_update_device(dev); + return sprintf(buf, "%d\n", fan_from_reg(data->fan[nr])); +} + +#define sysfs_fan(num) \ +static ssize_t show_fan##num(struct device *dev, char *buf) \ +{ \ + return show_fan(dev, buf, num-1); \ +} \ +static DEVICE_ATTR(fan##num##_input, S_IRUGO, show_fan##num, NULL) + +sysfs_fan(1); +sysfs_fan(2); +sysfs_fan(3); +sysfs_fan(4); + +#define device_create_file_fan(client, num) \ + device_create_file(&client->dev, &dev_attr_fan##num##_input) + +static int smsc47b397_detect(struct i2c_adapter *adapter, int addr, int kind); + +static int smsc47b397_attach_adapter(struct i2c_adapter *adapter) +{ + if (!(adapter->class & I2C_CLASS_HWMON)) + return 0; + return i2c_detect(adapter, &addr_data, smsc47b397_detect); +} + +static int smsc47b397_detach_client(struct i2c_client *client) +{ + int err; + + if ((err = i2c_detach_client(client))) { + dev_err(&client->dev, "Client deregistration failed, " + "client not detached.\n"); + return err; + } + + release_region(client->addr, SMSC_EXTENT); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static struct i2c_driver smsc47b397_driver = { + .owner = THIS_MODULE, + .name = "smsc47b397", + .id = I2C_DRIVERID_SMSC47B397, + .flags = I2C_DF_NOTIFY, + .attach_adapter = smsc47b397_attach_adapter, + .detach_client = smsc47b397_detach_client, +}; + +static int smsc47b397_detect(struct i2c_adapter *adapter, int addr, int kind) +{ + struct i2c_client *new_client; + struct smsc47b397_data *data; + int err = 0; + + if (!i2c_is_isa_adapter(adapter)) { + return 0; + } + + if (!request_region(addr, SMSC_EXTENT, smsc47b397_driver.name)) { + dev_err(&adapter->dev, "Region 0x%x already in use!\n", addr); + return -EBUSY; + } + + if (!(data = kmalloc(sizeof(struct smsc47b397_data), GFP_KERNEL))) { + err = -ENOMEM; + goto error_release; + } + memset(data, 0x00, sizeof(struct smsc47b397_data)); + + new_client = &data->client; + i2c_set_clientdata(new_client, data); + new_client->addr = addr; + init_MUTEX(&data->lock); + new_client->adapter = adapter; + new_client->driver = &smsc47b397_driver; + new_client->flags = 0; + + strlcpy(new_client->name, "smsc47b397", I2C_NAME_SIZE); + + init_MUTEX(&data->update_lock); + + if ((err = i2c_attach_client(new_client))) + goto error_free; + + device_create_file_temp(new_client, 1); + device_create_file_temp(new_client, 2); + device_create_file_temp(new_client, 3); + device_create_file_temp(new_client, 4); + + device_create_file_fan(new_client, 1); + device_create_file_fan(new_client, 2); + device_create_file_fan(new_client, 3); + device_create_file_fan(new_client, 4); + + return 0; + +error_free: + kfree(new_client); +error_release: + release_region(addr, SMSC_EXTENT); + return err; +} + +static int __init smsc47b397_find(unsigned int *addr) +{ + u8 id, rev; + + superio_enter(); + id = superio_inb(SUPERIO_REG_DEVID); + + if (id != 0x6f) { + superio_exit(); + return -ENODEV; + } + + rev = superio_inb(SUPERIO_REG_DEVREV); + + superio_select(SUPERIO_REG_LD8); + *addr = (superio_inb(SUPERIO_REG_BASE_MSB) << 8) + | superio_inb(SUPERIO_REG_BASE_LSB); + + printk(KERN_INFO "smsc47b397: found SMSC LPC47B397-NC " + "(base address 0x%04x, revision %u)\n", *addr, rev); + + superio_exit(); + return 0; +} + +static int __init smsc47b397_init(void) +{ + int ret; + + if ((ret = smsc47b397_find(normal_isa))) + return ret; + + return i2c_add_driver(&smsc47b397_driver); +} + +static void __exit smsc47b397_exit(void) +{ + i2c_del_driver(&smsc47b397_driver); +} + +MODULE_AUTHOR("Mark M. Hoffman "); +MODULE_DESCRIPTION("SMSC LPC47B397 driver"); +MODULE_LICENSE("GPL"); + +module_init(smsc47b397_init); +module_exit(smsc47b397_exit); diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h index 802732f51a23..bfa2d557d47a 100644 --- a/include/linux/i2c-id.h +++ b/include/linux/i2c-id.h @@ -167,6 +167,7 @@ #define I2C_DRIVERID_ASB100 1043 #define I2C_DRIVERID_FSCHER 1046 #define I2C_DRIVERID_W83L785TS 1047 +#define I2C_DRIVERID_SMSC47B397 1050 /* * ---- Adapter types ---------------------------------------------------- -- cgit v1.2.3