From 8b29f7aa52330411ee0b8127b32ac17d50b16f76 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 14 Feb 2019 15:52:09 +0100 Subject: irqchip: davinci-aintc: add a new config structure Add a config structure that will be used by aintc-based platforms. It contains the register range resource, number of interrupts and a list of priorities. Acked-by: Marc Zyngier Reviewed-by: David Lechner Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- include/linux/irqchip/irq-davinci-aintc.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 include/linux/irqchip/irq-davinci-aintc.h (limited to 'include/linux') diff --git a/include/linux/irqchip/irq-davinci-aintc.h b/include/linux/irqchip/irq-davinci-aintc.h new file mode 100644 index 000000000000..2b2ace3c1b22 --- /dev/null +++ b/include/linux/irqchip/irq-davinci-aintc.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2019 Texas Instruments + */ + +#ifndef _LINUX_IRQ_DAVINCI_AINTC_ +#define _LINUX_IRQ_DAVINCI_AINTC_ + +#include + +/** + * struct davinci_aintc_config - configuration data for davinci-aintc driver. + * + * @reg: register range to map + * @num_irqs: number of HW interrupts supported by the controller + * @prios: an array of size num_irqs containing priority settings for + * each interrupt + */ +struct davinci_aintc_config { + struct resource reg; + unsigned int num_irqs; + u8 *prios; +}; + +#endif /* _LINUX_IRQ_DAVINCI_AINTC_ */ -- cgit v1.2.3 From 06a2871614295eb3c504821adc4dee15748890ac Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 14 Feb 2019 15:52:11 +0100 Subject: ARM: davinci: aintc: use the new config structure Modify the aintc driver to take all its configuration from the new config structure. Stop referencing davinci_soc_info in any way. Move the declaration for davinci_aintc_init() to irq-davinci-aintc.h and make it take the new config structure as parameter. Convert all users to the new version. Signed-off-by: Bartosz Golaszewski Reviewed-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm355.c | 2 +- arch/arm/mach-davinci/dm365.c | 2 +- arch/arm/mach-davinci/dm644x.c | 2 +- arch/arm/mach-davinci/dm646x.c | 2 +- arch/arm/mach-davinci/include/mach/common.h | 2 -- arch/arm/mach-davinci/irq.c | 39 +++++++++++++++-------------- include/linux/irqchip/irq-davinci-aintc.h | 2 ++ 7 files changed, 26 insertions(+), 25 deletions(-) (limited to 'include/linux') diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index ff79c1a17fae..c7cd765114af 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -805,7 +805,7 @@ static const struct davinci_aintc_config dm355_aintc_config = { void __init dm355_init_irq(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm355_aintc_config); } static int __init dm355_init_devices(void) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 44dc3ca94dd3..bde3c3b94cc9 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1064,7 +1064,7 @@ static const struct davinci_aintc_config dm365_aintc_config = { void __init dm365_init_irq(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm365_aintc_config); } static int __init dm365_init_devices(void) diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 0b0ecac36486..6d3498058283 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -741,7 +741,7 @@ static const struct davinci_aintc_config dm644x_aintc_config = { void __init dm644x_init_irq(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm644x_aintc_config); } void __init dm644x_init_devices(void) diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 4e871d00e4e9..a0a8b336c1a4 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -702,7 +702,7 @@ static const struct davinci_aintc_config dm646x_aintc_config = { void __init dm646x_init_irq(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm646x_aintc_config); } static int __init dm646x_init_devices(void) diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 8c9c011f96f6..14e0e1c40611 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -24,8 +24,6 @@ void davinci_timer_init(struct clk *clk); -extern void davinci_aintc_init(void); - struct davinci_timer_instance { u32 base; u32 bottom_irq; diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index 509be44eda22..1b2eeddfabd1 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -82,13 +83,14 @@ davinci_aintc_handle_irq(struct pt_regs *regs) } /* ARM Interrupt Controller Initialization */ -void __init davinci_aintc_init(void) +void __init davinci_aintc_init(const struct davinci_aintc_config *config) { - unsigned i, j; - const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios; + unsigned int irq_off, reg_off, prio, shift; int ret, irq_base; + const u8 *prios; - davinci_aintc_base = ioremap(davinci_soc_info.intc_base, SZ_4K); + davinci_aintc_base = ioremap(config->reg.start, + resource_size(&config->reg)); if (WARN_ON(!davinci_aintc_base)) return; @@ -114,23 +116,21 @@ void __init davinci_aintc_init(void) davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0); davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1); - for (i = DAVINCI_AINTC_IRQ_INTPRI0_REG; - i <= DAVINCI_AINTC_IRQ_INTPRI7_REG; i += 4) { - u32 pri; - - for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++) - pri |= (*davinci_def_priorities & 0x07) << j; - davinci_aintc_writel(pri, i); + prios = config->prios; + for (reg_off = DAVINCI_AINTC_IRQ_INTPRI0_REG; + reg_off <= DAVINCI_AINTC_IRQ_INTPRI7_REG; reg_off += 4) { + for (shift = 0, prio = 0; shift < 32; shift += 4, prios++) + prio |= (*prios & 0x07) << shift; + davinci_aintc_writel(prio, reg_off); } - irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0); + irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0); if (WARN_ON(irq_base < 0)) return; davinci_aintc_irq_domain = irq_domain_add_legacy(NULL, - davinci_soc_info.intc_irq_num, - irq_base, 0, &irq_domain_simple_ops, - NULL); + config->num_irqs, irq_base, 0, + &irq_domain_simple_ops, NULL); if (WARN_ON(!davinci_aintc_irq_domain)) return; @@ -140,10 +140,11 @@ void __init davinci_aintc_init(void) if (WARN_ON(ret)) return; - for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; - i += 32, j += 0x04) - davinci_aintc_setup_gc(davinci_aintc_base + j, - irq_base + i, 32); + for (irq_off = 0, reg_off = 0; + irq_off < config->num_irqs; + irq_off += 32, reg_off += 0x04) + davinci_aintc_setup_gc(davinci_aintc_base + reg_off, + irq_base + irq_off, 32); irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq); set_handle_irq(davinci_aintc_handle_irq); diff --git a/include/linux/irqchip/irq-davinci-aintc.h b/include/linux/irqchip/irq-davinci-aintc.h index 2b2ace3c1b22..ea4e087fac98 100644 --- a/include/linux/irqchip/irq-davinci-aintc.h +++ b/include/linux/irqchip/irq-davinci-aintc.h @@ -22,4 +22,6 @@ struct davinci_aintc_config { u8 *prios; }; +void davinci_aintc_init(const struct davinci_aintc_config *config); + #endif /* _LINUX_IRQ_DAVINCI_AINTC_ */ -- cgit v1.2.3 From 94af2c4d14d09c2c2d07b4ea2778668890241ea8 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 14 Feb 2019 15:52:19 +0100 Subject: irqchip: davinci-cp-intc: add a new config structure Add a config structure that will be used by cp-intc-based platforms. It contains the register range resource and the number of interrupts. Acked-by: Marc Zyngier Reviewed-by: David Lechner Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- include/linux/irqchip/irq-davinci-cp-intc.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 include/linux/irqchip/irq-davinci-cp-intc.h (limited to 'include/linux') diff --git a/include/linux/irqchip/irq-davinci-cp-intc.h b/include/linux/irqchip/irq-davinci-cp-intc.h new file mode 100644 index 000000000000..2270a6167b98 --- /dev/null +++ b/include/linux/irqchip/irq-davinci-cp-intc.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2019 Texas Instruments + */ + +#ifndef _LINUX_IRQ_DAVINCI_CP_INTC_ +#define _LINUX_IRQ_DAVINCI_CP_INTC_ + +#include + +/** + * struct davinci_cp_intc_config - configuration data for davinci-cp-intc + * driver. + * + * @reg: register range to map + * @num_irqs: number of HW interrupts supported by the controller + */ +struct davinci_cp_intc_config { + struct resource reg; + unsigned int num_irqs; +}; + +#endif /* _LINUX_IRQ_DAVINCI_CP_INTC_ */ -- cgit v1.2.3 From 6567954b8e8e7cbb74b1340038dcac7ecc9e2e1b Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 14 Feb 2019 15:52:23 +0100 Subject: ARM: davinci: cp-intc: use the new-style config structure Modify the cp-intc driver to take all its configuration from the new config structure. Stop referencing davinci_soc_info in any way. Move the declaration for davinci_cp_intc_init() to irq-davinci-cp-intc.h and make it take the new config structure as parameter. Convert all users to the new version. Also: since the two da8xx SoCs default all irq priorities to 7, just drop the priority configuration at all and hardcode the channels to 7. It will simplify the driver code and make our lives easier when it comes to device-tree support. Reviewed-by: David Lechner Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/cp_intc.c | 99 ++++++++++++++--------------- arch/arm/mach-davinci/da830.c | 2 +- arch/arm/mach-davinci/da850.c | 2 +- arch/arm/mach-davinci/include/mach/common.h | 1 - include/linux/irqchip/irq-davinci-cp-intc.h | 2 + 5 files changed, 50 insertions(+), 56 deletions(-) (limited to 'include/linux') diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c index dcd43b067a6a..f56a4275083f 100644 --- a/arch/arm/mach-davinci/cp_intc.c +++ b/arch/arm/mach-davinci/cp_intc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -20,7 +21,6 @@ #include #include -#include #define DAVINCI_CP_INTC_CTRL 0x04 #define DAVINCI_CP_INTC_HOST_CTRL 0x0c @@ -158,22 +158,15 @@ static const struct irq_domain_ops davinci_cp_intc_irq_domain_ops = { .xlate = irq_domain_xlate_onetwocell, }; -static int __init davinci_cp_intc_of_init(struct device_node *node, - struct device_node *parent) +static int __init +davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config, + struct device_node *node) { - u32 num_irq = davinci_soc_info.intc_irq_num; - u8 *irq_prio = davinci_soc_info.intc_irq_prios; - unsigned num_reg = BITS_TO_LONGS(num_irq); - int i, irq_base; - - if (node) { - davinci_cp_intc_base = of_iomap(node, 0); - if (of_property_read_u32(node, "ti,intc-size", &num_irq)) - pr_warn("unable to get intc-size, default to %d\n", - num_irq); - } else { - davinci_cp_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K); - } + unsigned int num_regs = BITS_TO_LONGS(config->num_irqs); + int offset, irq_base; + + davinci_cp_intc_base = ioremap(config->reg.start, + resource_size(&config->reg)); if (WARN_ON(!davinci_cp_intc_base)) return -EINVAL; @@ -183,51 +176,29 @@ static int __init davinci_cp_intc_of_init(struct device_node *node, davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_ENABLE(0)); /* Disable system interrupts */ - for (i = 0; i < num_reg; i++) - davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_ENABLE_CLR(i)); + for (offset = 0; offset < num_regs; offset++) + davinci_cp_intc_write(~0, + DAVINCI_CP_INTC_SYS_ENABLE_CLR(offset)); /* Set to normal mode, no nesting, no priority hold */ davinci_cp_intc_write(0, DAVINCI_CP_INTC_CTRL); davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_CTRL); /* Clear system interrupt status */ - for (i = 0; i < num_reg; i++) - davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_STAT_CLR(i)); + for (offset = 0; offset < num_regs; offset++) + davinci_cp_intc_write(~0, + DAVINCI_CP_INTC_SYS_STAT_CLR(offset)); /* Enable nIRQ (what about nFIQ?) */ davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET); - /* - * Priority is determined by host channel: lower channel number has - * higher priority i.e. channel 0 has highest priority and channel 31 - * had the lowest priority. - */ - num_reg = (num_irq + 3) >> 2; /* 4 channels per register */ - if (irq_prio) { - unsigned j, k; - u32 val; - - for (k = i = 0; i < num_reg; i++) { - for (val = j = 0; j < 4; j++, k++) { - val >>= 8; - if (k < num_irq) - val |= irq_prio[k] << 24; - } - - davinci_cp_intc_write(val, DAVINCI_CP_INTC_CHAN_MAP(i)); - } - } else { - /* - * Default everything to channel 15 if priority not specified. - * Note that channel 0-1 are mapped to nFIQ and channels 2-31 - * are mapped to nIRQ. - */ - for (i = 0; i < num_reg; i++) - davinci_cp_intc_write(0x0f0f0f0f, - DAVINCI_CP_INTC_CHAN_MAP(i)); - } + /* Default all priorities to channel 7. */ + num_regs = (config->num_irqs + 3) >> 2; /* 4 channels per register */ + for (offset = 0; offset < num_regs; offset++) + davinci_cp_intc_write(0x07070707, + DAVINCI_CP_INTC_CHAN_MAP(offset)); - irq_base = irq_alloc_descs(-1, 0, num_irq, 0); + irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0); if (irq_base < 0) { pr_warn("Couldn't allocate IRQ numbers\n"); irq_base = 0; @@ -235,7 +206,7 @@ static int __init davinci_cp_intc_of_init(struct device_node *node, /* create a legacy host */ davinci_cp_intc_irq_domain = irq_domain_add_legacy( - node, num_irq, irq_base, 0, + node, config->num_irqs, irq_base, 0, &davinci_cp_intc_irq_domain_ops, NULL); if (!davinci_cp_intc_irq_domain) { @@ -251,9 +222,31 @@ static int __init davinci_cp_intc_of_init(struct device_node *node, return 0; } -void __init davinci_cp_intc_init(void) +int __init davinci_cp_intc_init(const struct davinci_cp_intc_config *config) { - davinci_cp_intc_of_init(NULL, NULL); + return davinci_cp_intc_do_init(config, NULL); } +static int __init davinci_cp_intc_of_init(struct device_node *node, + struct device_node *parent) +{ + struct davinci_cp_intc_config config = { }; + int ret; + + ret = of_address_to_resource(node, 0, &config.reg); + if (ret) { + pr_err("%s: unable to get the register range from device-tree\n", + __func__); + return ret; + } + + ret = of_property_read_u32(node, "ti,intc-size", &config.num_irqs); + if (ret) { + pr_err("%s: unable to read the 'ti,intc-size' property\n", + __func__); + return ret; + } + + return davinci_cp_intc_do_init(&config, node); +} IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", davinci_cp_intc_of_init); diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 0eb48ed2d423..7ce0b5f1200d 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -833,7 +833,7 @@ static const struct davinci_cp_intc_config da830_cp_intc_config = { void __init da830_init_irq(void) { - davinci_cp_intc_init(); + davinci_cp_intc_init(&da830_cp_intc_config); } void __init da830_init_time(void) diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index fe274ab63fc8..62a00fa94696 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -771,7 +771,7 @@ static const struct davinci_cp_intc_config da850_cp_intc_config = { void __init da850_init_irq(void) { - davinci_cp_intc_init(); + davinci_cp_intc_init(&da850_cp_intc_config); } void __init da850_init_time(void) diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 7ad79171b4b5..14e0e1c40611 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -22,7 +22,6 @@ #define DAVINCI_INTC_START NR_IRQS #define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum)) -void davinci_cp_intc_init(void); void davinci_timer_init(struct clk *clk); struct davinci_timer_instance { diff --git a/include/linux/irqchip/irq-davinci-cp-intc.h b/include/linux/irqchip/irq-davinci-cp-intc.h index 2270a6167b98..8d71ed5b5a61 100644 --- a/include/linux/irqchip/irq-davinci-cp-intc.h +++ b/include/linux/irqchip/irq-davinci-cp-intc.h @@ -20,4 +20,6 @@ struct davinci_cp_intc_config { unsigned int num_irqs; }; +int davinci_cp_intc_init(const struct davinci_cp_intc_config *config); + #endif /* _LINUX_IRQ_DAVINCI_CP_INTC_ */ -- cgit v1.2.3