From 1e4e3efeffd6aa07789093d6d40053dcaa981116 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Tue, 1 Feb 2005 16:38:11 -0800 Subject: [PATCH] ppc64: mask lower bits in tlbie We werent masking the lower bits of the VA in a tlbie(l) instruction. While most CPUs ignore this we should play it safe and follow the spec. Signed-off-by: Anton Blanchard Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-ppc64/mmu.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h index daebba6b7a17..188987e9d9d4 100644 --- a/include/asm-ppc64/mmu.h +++ b/include/asm-ppc64/mmu.h @@ -122,10 +122,13 @@ static inline void __tlbie(unsigned long va, int large) /* clear top 16 bits, non SLS segment */ va &= ~(0xffffULL << 48); - if (large) + if (large) { + va &= HPAGE_MASK; asm volatile("tlbie %0,1" : : "r"(va) : "memory"); - else + } else { + va &= PAGE_MASK; asm volatile("tlbie %0,0" : : "r"(va) : "memory"); + } } static inline void tlbie(unsigned long va, int large) @@ -139,6 +142,7 @@ static inline void __tlbiel(unsigned long va) { /* clear top 16 bits, non SLS segment */ va &= ~(0xffffULL << 48); + va &= PAGE_MASK; /* * Thanks to Alan Modra we are now able to use machine specific -- cgit v1.2.3