From 7a928ead369c5d24be14ed57227477679966fa5d Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 20 Apr 2004 17:58:21 +0100 Subject: [ARM] Add find_first_bit and find_next_bit. --- include/asm-arm/bitops.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h index 8ae0be984492..7fb3046c6729 100644 --- a/include/asm-arm/bitops.h +++ b/include/asm-arm/bitops.h @@ -212,6 +212,8 @@ extern int _test_and_clear_bit_le(int nr, volatile unsigned long * p); extern int _test_and_change_bit_le(int nr, volatile unsigned long * p); extern int _find_first_zero_bit_le(void * p, unsigned size); extern int _find_next_zero_bit_le(void * p, int size, int offset); +extern int _find_first_bit_le(const unsigned long *p, unsigned size); +extern int _find_next_bit_le(const unsigned long *p, int size, int offset); /* * Big endian assembly bitops. nr = 0 -> byte 3 bit 0. @@ -224,7 +226,8 @@ extern int _test_and_clear_bit_be(int nr, volatile unsigned long * p); extern int _test_and_change_bit_be(int nr, volatile unsigned long * p); extern int _find_first_zero_bit_be(void * p, unsigned size); extern int _find_next_zero_bit_be(void * p, int size, int offset); - +extern int _find_first_bit_be(const unsigned long *p, unsigned size); +extern int _find_next_bit_be(unsigned long *p, int size, int offset); /* * The __* form of bitops are non-atomic and may be reordered. @@ -255,6 +258,8 @@ extern int _find_next_zero_bit_be(void * p, int size, int offset); #define test_bit(nr,p) __test_bit(nr,p) #define find_first_zero_bit(p,sz) _find_first_zero_bit_le(p,sz) #define find_next_zero_bit(p,sz,off) _find_next_zero_bit_le(p,sz,off) +#define find_first_bit(p,sz) _find_first_bit_le(p,sz) +#define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off) #define WORD_BITOFF_TO_LE(x) ((x)) @@ -272,6 +277,8 @@ extern int _find_next_zero_bit_be(void * p, int size, int offset); #define test_bit(nr,p) __test_bit(nr,p) #define find_first_zero_bit(p,sz) _find_first_zero_bit_be(p,sz) #define find_next_zero_bit(p,sz,off) _find_next_zero_bit_be(p,sz,off) +#define find_first_bit(p,sz) _find_first_bit_be(p,sz) +#define find_next_bit(p,sz,off) _find_next_bit_be(p,sz,off) #define WORD_BITOFF_TO_LE(x) ((x) ^ 0x18) -- cgit v1.2.3 From b7fbe52c11d0c7b535ba75487d7e0913ede3671b Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Tue, 20 Apr 2004 17:41:53 -0700 Subject: [PATCH] compute_creds race From: Andy Lutomirski Fixes from me, Olaf Dietsche In fs/exec.c, compute_creds does: task_lock(current); if (bprm->e_uid != current->uid || bprm->e_gid != current->gid) { current->mm->dumpable = 0; if (must_not_trace_exec(current) || atomic_read(¤t->fs->count) > 1 || atomic_read(¤t->files->count) > 1 || atomic_read(¤t->sighand->count) > 1) { if(!capable(CAP_SETUID)) { bprm->e_uid = current->uid; bprm->e_gid = current->gid; } } } current->suid = current->euid = current->fsuid = bprm->e_uid; current->sgid = current->egid = current->fsgid = bprm->e_gid; task_unlock(current); security_bprm_compute_creds(bprm); I assume the task_lock is to prevent another process (on SMP or preempt) from ptracing the execing process between the check and the assignment. If that's the concern then the fact that the lock is dropped before the call to security_brpm_compute_creds means that, if security_bprm_compute_creds does anything interesting, there's a race. For my (nearly complete) caps patch, I obviously need to fix this. But I think it may be exploitable now. Suppose there are two processes, A (the malicious code) and B (which uses exec). B starts out unprivileged (A and B have, e.g., uid and euid = 500). 1. A ptraces B. 2. B calls exec on some setuid-root program. 3. in cap_bprm_set_security, B sets bprm->cap_permitted to the full set. 4. B gets to compute_creds in exec.c, calls task_lock, and does not change its uid. 5. B calls task_unlock. 6. A detaches from B (on preempt or SMP). 7. B gets to task_lock in cap_bprm_compute_creds, changes its capabilities, and returns from compute_creds into load_elf_binary. 8. load_elf_binary calls create_elf_tables (line 852 in 2.6.5-mm1), which calls cap_bprm_secureexec (through LSM), which returns false (!). 9. exec finishes. The setuid program is now running with uid=euid=500 but full permitted capabilities. There are two (or three) ways to effectively get local root now: 1. IIRC, linux 2.4 doesn't check capabilities in ptrace, so A could just ptrace B again. 2. LD_PRELOAD. 3. There are probably programs that will misbehave on their own under these circumstances. Is there some reason why this is not doable? The patch renames bprm_compute_creds to bprm_apply_creds and moves all uid logic into the hook, where the test and the resulting modification can both happen under task_lock(). This way, out-of-tree LSMs will fail to compile instead of malfunctioning. It should also make life easier for LSMs and will certainly make it easier for me to finish the cap patch. --- fs/exec.c | 31 +------------------------------ include/linux/security.h | 18 +++++++++--------- security/capability.c | 2 +- security/commoncap.c | 38 ++++++++++++++++++++++++-------------- security/dummy.c | 31 +++++++++++++++++++++++++++---- security/root_plug.c | 2 +- security/selinux/hooks.c | 8 ++++---- 7 files changed, 67 insertions(+), 63 deletions(-) (limited to 'include') diff --git a/fs/exec.c b/fs/exec.c index c37b1478fdac..47285fe301ff 100644 --- a/fs/exec.c +++ b/fs/exec.c @@ -870,15 +870,6 @@ out: EXPORT_SYMBOL(flush_old_exec); -/* - * We mustn't allow tracing of suid binaries, unless - * the tracer has the capability to trace anything.. - */ -static inline int must_not_trace_exec(struct task_struct * p) -{ - return (p->ptrace & PT_PTRACED) && !(p->ptrace & PT_PTRACE_CAP); -} - /* * Fill the binprm structure from the inode. * Check permissions, then read the first 128 (BINPRM_BUF_SIZE) bytes @@ -945,27 +936,7 @@ EXPORT_SYMBOL(prepare_binprm); void compute_creds(struct linux_binprm *bprm) { - task_lock(current); - if (bprm->e_uid != current->uid || bprm->e_gid != current->gid) { - current->mm->dumpable = 0; - - if (must_not_trace_exec(current) - || atomic_read(¤t->fs->count) > 1 - || atomic_read(¤t->files->count) > 1 - || atomic_read(¤t->sighand->count) > 1) { - if(!capable(CAP_SETUID)) { - bprm->e_uid = current->uid; - bprm->e_gid = current->gid; - } - } - } - - current->suid = current->euid = current->fsuid = bprm->e_uid; - current->sgid = current->egid = current->fsgid = bprm->e_gid; - - task_unlock(current); - - security_bprm_compute_creds(bprm); + security_bprm_apply_creds(bprm); } EXPORT_SYMBOL(compute_creds); diff --git a/include/linux/security.h b/include/linux/security.h index 9baa2ed4ac96..2d16f6577669 100644 --- a/include/linux/security.h +++ b/include/linux/security.h @@ -44,7 +44,7 @@ extern int cap_capget (struct task_struct *target, kernel_cap_t *effective, kern extern int cap_capset_check (struct task_struct *target, kernel_cap_t *effective, kernel_cap_t *inheritable, kernel_cap_t *permitted); extern void cap_capset_set (struct task_struct *target, kernel_cap_t *effective, kernel_cap_t *inheritable, kernel_cap_t *permitted); extern int cap_bprm_set_security (struct linux_binprm *bprm); -extern void cap_bprm_compute_creds (struct linux_binprm *bprm); +extern void cap_bprm_apply_creds (struct linux_binprm *bprm); extern int cap_bprm_secureexec(struct linux_binprm *bprm); extern int cap_inode_setxattr(struct dentry *dentry, char *name, void *value, size_t size, int flags); extern int cap_inode_removexattr(struct dentry *dentry, char *name); @@ -102,7 +102,7 @@ struct swap_info_struct; * @bprm_free_security: * @bprm contains the linux_binprm structure to be modified. * Deallocate and clear the @bprm->security field. - * @bprm_compute_creds: + * @bprm_apply_creds: * Compute and set the security attributes of a process being transformed * by an execve operation based on the old attributes (current->security) * and the information saved in @bprm->security by the set_security hook. @@ -115,7 +115,7 @@ struct swap_info_struct; * @bprm contains the linux_binprm structure. * @bprm_set_security: * Save security information in the bprm->security field, typically based - * on information about the bprm->file, for later use by the compute_creds + * on information about the bprm->file, for later use by the apply_creds * hook. This hook may also optionally check permissions (e.g. for * transitions between security domains). * This hook may be called multiple times during a single execve, e.g. for @@ -924,7 +924,7 @@ struct swap_info_struct; * Check permission before allowing the @parent process to trace the * @child process. * Security modules may also want to perform a process tracing check - * during an execve in the set_security or compute_creds hooks of + * during an execve in the set_security or apply_creds hooks of * binprm_security_ops if the process is being traced and its security * attributes would be changed by the execve. * @parent contains the task_struct structure for parent process. @@ -1026,7 +1026,7 @@ struct security_operations { int (*bprm_alloc_security) (struct linux_binprm * bprm); void (*bprm_free_security) (struct linux_binprm * bprm); - void (*bprm_compute_creds) (struct linux_binprm * bprm); + void (*bprm_apply_creds) (struct linux_binprm * bprm); int (*bprm_set_security) (struct linux_binprm * bprm); int (*bprm_check_security) (struct linux_binprm * bprm); int (*bprm_secureexec) (struct linux_binprm * bprm); @@ -1290,9 +1290,9 @@ static inline void security_bprm_free (struct linux_binprm *bprm) { security_ops->bprm_free_security (bprm); } -static inline void security_bprm_compute_creds (struct linux_binprm *bprm) +static inline void security_bprm_apply_creds (struct linux_binprm *bprm) { - security_ops->bprm_compute_creds (bprm); + security_ops->bprm_apply_creds (bprm); } static inline int security_bprm_set (struct linux_binprm *bprm) { @@ -1962,9 +1962,9 @@ static inline int security_bprm_alloc (struct linux_binprm *bprm) static inline void security_bprm_free (struct linux_binprm *bprm) { } -static inline void security_bprm_compute_creds (struct linux_binprm *bprm) +static inline void security_bprm_apply_creds (struct linux_binprm *bprm) { - cap_bprm_compute_creds (bprm); + cap_bprm_apply_creds (bprm); } static inline int security_bprm_set (struct linux_binprm *bprm) diff --git a/security/capability.c b/security/capability.c index ba7daa4592dd..f1e81ba6b79d 100644 --- a/security/capability.c +++ b/security/capability.c @@ -35,7 +35,7 @@ static struct security_operations capability_ops = { .netlink_send = cap_netlink_send, .netlink_recv = cap_netlink_recv, - .bprm_compute_creds = cap_bprm_compute_creds, + .bprm_apply_creds = cap_bprm_apply_creds, .bprm_set_security = cap_bprm_set_security, .bprm_secureexec = cap_bprm_secureexec, diff --git a/security/commoncap.c b/security/commoncap.c index e902b60ecc30..07265810c353 100644 --- a/security/commoncap.c +++ b/security/commoncap.c @@ -115,13 +115,15 @@ int cap_bprm_set_security (struct linux_binprm *bprm) return 0; } -/* Copied from fs/exec.c */ static inline int must_not_trace_exec (struct task_struct *p) { - return (p->ptrace & PT_PTRACED) && !(p->ptrace & PT_PTRACE_CAP); + return ((p->ptrace & PT_PTRACED) && !(p->ptrace & PT_PTRACE_CAP)) + || atomic_read(&p->fs->count) > 1 + || atomic_read(&p->files->count) > 1 + || atomic_read(&p->sighand->count) > 1; } -void cap_bprm_compute_creds (struct linux_binprm *bprm) +void cap_bprm_apply_creds (struct linux_binprm *bprm) { /* Derived from fs/exec.c:compute_creds. */ kernel_cap_t new_permitted, working; @@ -132,18 +134,26 @@ void cap_bprm_compute_creds (struct linux_binprm *bprm) new_permitted = cap_combine (new_permitted, working); task_lock(current); + + if (bprm->e_uid != current->uid || bprm->e_gid != current->gid) { + current->mm->dumpable = 0; + + if (must_not_trace_exec(current) && !capable(CAP_SETUID)) { + bprm->e_uid = current->uid; + bprm->e_gid = current->gid; + } + } + + current->suid = current->euid = current->fsuid = bprm->e_uid; + current->sgid = current->egid = current->fsgid = bprm->e_gid; + if (!cap_issubset (new_permitted, current->cap_permitted)) { current->mm->dumpable = 0; - if (must_not_trace_exec (current) - || atomic_read (¤t->fs->count) > 1 - || atomic_read (¤t->files->count) > 1 - || atomic_read (¤t->sighand->count) > 1) { - if (!capable (CAP_SETPCAP)) { - new_permitted = cap_intersect (new_permitted, - current-> - cap_permitted); - } + if (must_not_trace_exec (current) && !capable (CAP_SETPCAP)) { + new_permitted = cap_intersect (new_permitted, + current-> + cap_permitted); } } @@ -315,7 +325,7 @@ int cap_vm_enough_memory(long pages) vm_acct_memory(pages); - /* + /* * Sometimes we want to use more memory than we have */ if (sysctl_overcommit_memory == 1) @@ -377,7 +387,7 @@ EXPORT_SYMBOL(cap_capget); EXPORT_SYMBOL(cap_capset_check); EXPORT_SYMBOL(cap_capset_set); EXPORT_SYMBOL(cap_bprm_set_security); -EXPORT_SYMBOL(cap_bprm_compute_creds); +EXPORT_SYMBOL(cap_bprm_apply_creds); EXPORT_SYMBOL(cap_bprm_secureexec); EXPORT_SYMBOL(cap_inode_setxattr); EXPORT_SYMBOL(cap_inode_removexattr); diff --git a/security/dummy.c b/security/dummy.c index 3bf46b0f5997..c34991da5d6e 100644 --- a/security/dummy.c +++ b/security/dummy.c @@ -26,6 +26,8 @@ #include #include #include +#include +#include static int dummy_ptrace (struct task_struct *parent, struct task_struct *child) { @@ -116,7 +118,7 @@ static int dummy_vm_enough_memory(long pages) vm_acct_memory(pages); - /* + /* * Sometimes we want to use more memory than we have */ if (sysctl_overcommit_memory == 1) @@ -169,9 +171,30 @@ static void dummy_bprm_free_security (struct linux_binprm *bprm) return; } -static void dummy_bprm_compute_creds (struct linux_binprm *bprm) +static inline int must_not_trace_exec (struct task_struct *p) { - return; + return ((p->ptrace & PT_PTRACED) && !(p->ptrace & PT_PTRACE_CAP)) + || atomic_read(&p->fs->count) > 1 + || atomic_read(&p->files->count) > 1 + || atomic_read(&p->sighand->count) > 1; +} + +static void dummy_bprm_apply_creds (struct linux_binprm *bprm) +{ + task_lock(current); + if (bprm->e_uid != current->uid || bprm->e_gid != current->gid) { + current->mm->dumpable = 0; + + if (must_not_trace_exec(current) && !capable(CAP_SETUID)) { + bprm->e_uid = current->uid; + bprm->e_gid = current->gid; + } + } + + current->suid = current->euid = current->fsuid = bprm->e_uid; + current->sgid = current->egid = current->fsgid = bprm->e_gid; + + task_unlock(current); } static int dummy_bprm_set_security (struct linux_binprm *bprm) @@ -887,7 +910,7 @@ void security_fixup_ops (struct security_operations *ops) set_to_dummy_if_null(ops, vm_enough_memory); set_to_dummy_if_null(ops, bprm_alloc_security); set_to_dummy_if_null(ops, bprm_free_security); - set_to_dummy_if_null(ops, bprm_compute_creds); + set_to_dummy_if_null(ops, bprm_apply_creds); set_to_dummy_if_null(ops, bprm_set_security); set_to_dummy_if_null(ops, bprm_check_security); set_to_dummy_if_null(ops, bprm_secureexec); diff --git a/security/root_plug.c b/security/root_plug.c index c683d6133321..ec8955dcba29 100644 --- a/security/root_plug.c +++ b/security/root_plug.c @@ -90,7 +90,7 @@ static struct security_operations rootplug_security_ops = { .capset_set = cap_capset_set, .capable = cap_capable, - .bprm_compute_creds = cap_bprm_compute_creds, + .bprm_apply_creds = cap_bprm_apply_creds, .bprm_set_security = cap_bprm_set_security, .task_post_setuid = cap_task_post_setuid, diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c index 5e765cd7535b..358e66212b0f 100644 --- a/security/selinux/hooks.c +++ b/security/selinux/hooks.c @@ -1745,7 +1745,7 @@ static inline void flush_unauthorized_files(struct files_struct * files) spin_unlock(&files->file_lock); } -static void selinux_bprm_compute_creds(struct linux_binprm *bprm) +static void selinux_bprm_apply_creds(struct linux_binprm *bprm) { struct task_security_struct *tsec, *psec; struct bprm_security_struct *bsec; @@ -1755,7 +1755,7 @@ static void selinux_bprm_compute_creds(struct linux_binprm *bprm) struct rlimit *rlim, *initrlim; int rc, i; - secondary_ops->bprm_compute_creds(bprm); + secondary_ops->bprm_apply_creds(bprm); tsec = current->security; @@ -2560,7 +2560,7 @@ static int selinux_task_setrlimit(unsigned int resource, struct rlimit *new_rlim /* Control the ability to change the hard limit (whether lowering or raising it), so that the hard limit can later be used as a safe reset point for the soft limit - upon context transitions. See selinux_bprm_compute_creds. */ + upon context transitions. See selinux_bprm_apply_creds. */ if (old_rlim->rlim_max != new_rlim->rlim_max) return task_has_perm(current, current, PROCESS__SETRLIMIT); @@ -3971,7 +3971,7 @@ struct security_operations selinux_ops = { .bprm_alloc_security = selinux_bprm_alloc_security, .bprm_free_security = selinux_bprm_free_security, - .bprm_compute_creds = selinux_bprm_compute_creds, + .bprm_apply_creds = selinux_bprm_apply_creds, .bprm_set_security = selinux_bprm_set_security, .bprm_check_security = selinux_bprm_check_security, .bprm_secureexec = selinux_bprm_secureexec, -- cgit v1.2.3 From 137718ec5f67102faf88e87e900d3188936e039b Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Tue, 20 Apr 2004 17:42:39 -0700 Subject: [PATCH] lockfs - vfs bits From: Christoph Hellwig These are the generic lockfs bits. Basically it takes the XFS freezing statemachine into the VFS. It's all behind the kernel-doc documented freeze_bdev and thaw_bdev interfaces. Based on an older patch from Chris Mason. --- fs/block_dev.c | 1 + fs/buffer.c | 71 +++++++++++++++++++++++++++++++++++++++++++++ fs/super.c | 8 +++++ include/linux/buffer_head.h | 2 ++ include/linux/fs.h | 16 ++++++++++ 5 files changed, 98 insertions(+) (limited to 'include') diff --git a/fs/block_dev.c b/fs/block_dev.c index b0314046ec4b..1b43058d8dc0 100644 --- a/fs/block_dev.c +++ b/fs/block_dev.c @@ -251,6 +251,7 @@ static void init_once(void * foo, kmem_cache_t * cachep, unsigned long flags) { memset(bdev, 0, sizeof(*bdev)); sema_init(&bdev->bd_sem, 1); + sema_init(&bdev->bd_mount_sem, 1); INIT_LIST_HEAD(&bdev->bd_inodes); INIT_LIST_HEAD(&bdev->bd_list); inode_init_once(&ei->vfs_inode); diff --git a/fs/buffer.c b/fs/buffer.c index 21b8ae31e827..7fc4e91f0ce9 100644 --- a/fs/buffer.c +++ b/fs/buffer.c @@ -227,6 +227,77 @@ int fsync_bdev(struct block_device *bdev) return sync_blockdev(bdev); } +/** + * freeze_bdev -- lock a filesystem and force it into a consistent state + * @bdev: blockdevice to lock + * + * This takes the block device bd_mount_sem to make sure no new mounts + * happen on bdev until thaw_bdev() is called. + * If a superblock is found on this device, we take the s_umount semaphore + * on it to make sure nobody unmounts until the snapshot creation is done. + */ +struct super_block *freeze_bdev(struct block_device *bdev) +{ + struct super_block *sb; + + down(&bdev->bd_mount_sem); + sb = get_super(bdev); + if (sb && !(sb->s_flags & MS_RDONLY)) { + sb->s_frozen = SB_FREEZE_WRITE; + wmb(); + + sync_inodes_sb(sb, 0); + DQUOT_SYNC(sb); + + lock_super(sb); + if (sb->s_dirt && sb->s_op->write_super) + sb->s_op->write_super(sb); + unlock_super(sb); + + if (sb->s_op->sync_fs) + sb->s_op->sync_fs(sb, 1); + + sync_blockdev(sb->s_bdev); + sync_inodes_sb(sb, 1); + + sb->s_frozen = SB_FREEZE_TRANS; + wmb(); + + sync_blockdev(sb->s_bdev); + + if (sb->s_op->write_super_lockfs) + sb->s_op->write_super_lockfs(sb); + } + + sync_blockdev(bdev); + return sb; /* thaw_bdev releases s->s_umount and bd_mount_sem */ +} +EXPORT_SYMBOL(freeze_bdev); + +/** + * thaw_bdev -- unlock filesystem + * @bdev: blockdevice to unlock + * @sb: associated superblock + * + * Unlocks the filesystem and marks it writeable again after freeze_bdev(). + */ +void thaw_bdev(struct block_device *bdev, struct super_block *sb) +{ + if (sb) { + BUG_ON(sb->s_bdev != bdev); + + if (sb->s_op->unlockfs) + sb->s_op->unlockfs(sb); + sb->s_frozen = SB_UNFROZEN; + wmb(); + wake_up(&sb->s_wait_unfrozen); + drop_super(sb); + } + + up(&bdev->bd_mount_sem); +} +EXPORT_SYMBOL(thaw_bdev); + /* * sync everything. Start out by waking pdflush, because that writes back * all queues in parallel. diff --git a/fs/super.c b/fs/super.c index f20abf04f8a5..e62838940bc7 100644 --- a/fs/super.c +++ b/fs/super.c @@ -77,6 +77,7 @@ static struct super_block *alloc_super(void) sema_init(&s->s_dquot.dqio_sem, 1); sema_init(&s->s_dquot.dqonoff_sem, 1); init_rwsem(&s->s_dquot.dqptr_sem); + init_waitqueue_head(&s->s_wait_unfrozen); s->s_maxbytes = MAX_NON_LFS; s->dq_op = sb_dquot_ops; s->s_qcop = sb_quotactl_ops; @@ -623,7 +624,14 @@ struct super_block *get_sb_bdev(struct file_system_type *fs_type, if (IS_ERR(bdev)) return (struct super_block *)bdev; + /* + * once the super is inserted into the list by sget, s_umount + * will protect the lockfs code from trying to start a snapshot + * while we are mounting + */ + down(&bdev->bd_mount_sem); s = sget(fs_type, test_bdev_super, set_bdev_super, bdev); + up(&bdev->bd_mount_sem); if (IS_ERR(s)) goto out; diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h index ebe0b1221579..99cb4139354b 100644 --- a/include/linux/buffer_head.h +++ b/include/linux/buffer_head.h @@ -157,6 +157,8 @@ void __wait_on_buffer(struct buffer_head *); wait_queue_head_t *bh_waitq_head(struct buffer_head *bh); void wake_up_buffer(struct buffer_head *bh); int fsync_bdev(struct block_device *); +struct super_block *freeze_bdev(struct block_device *); +void thaw_bdev(struct block_device *, struct super_block *); int fsync_super(struct super_block *); int fsync_no_super(struct block_device *); struct buffer_head *__find_get_block(struct block_device *, sector_t, int); diff --git a/include/linux/fs.h b/include/linux/fs.h index ed06629b972e..8971ae34dbdf 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -345,6 +345,7 @@ struct block_device { struct inode * bd_inode; /* will die */ int bd_openers; struct semaphore bd_sem; /* open/close mutex */ + struct semaphore bd_mount_sem; /* mount mutex */ struct list_head bd_inodes; void * bd_holder; int bd_holders; @@ -749,6 +750,9 @@ struct super_block { struct list_head s_instances; struct quota_info s_dquot; /* Diskquota specific options */ + int s_frozen; + wait_queue_head_t s_wait_unfrozen; + char s_id[32]; /* Informational name */ void *s_fs_info; /* Filesystem private info */ @@ -760,6 +764,18 @@ struct super_block { struct semaphore s_vfs_rename_sem; /* Kludge */ }; +/* + * Snapshotting support. + */ +enum { + SB_UNFROZEN = 0, + SB_FREEZE_WRITE = 1, + SB_FREEZE_TRANS = 2, +}; + +#define vfs_check_frozen(sb, level) \ + wait_event((sb)->s_wait_unfrozen, ((sb)->s_frozen < (level))) + /* * Superblock locking. */ -- cgit v1.2.3 From 014df416805b44b22d335e376ac30d6b6fc301b5 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Tue, 20 Apr 2004 17:43:30 -0700 Subject: [PATCH] i4l: add compat ioctl's for CAPI From: Marcel Holtmann This patch adds the needed compat ioctl's for the CAPI on 64bit platforms. --- fs/compat_ioctl.c | 4 +++- include/linux/compat_ioctl.h | 16 +++++++++++++++- 2 files changed, 18 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c index de45d833d0f4..56ef9138e9cc 100644 --- a/fs/compat_ioctl.c +++ b/fs/compat_ioctl.c @@ -70,8 +70,10 @@ #include /* siocdevprivate_ioctl */ #include -#include #include +#include + +#include #include /* Ugly hack. */ diff --git a/include/linux/compat_ioctl.h b/include/linux/compat_ioctl.h index 278c533b6994..aa9733c90045 100644 --- a/include/linux/compat_ioctl.h +++ b/include/linux/compat_ioctl.h @@ -597,7 +597,7 @@ COMPATIBLE_IOCTL(RNDGETPOOL) COMPATIBLE_IOCTL(RNDADDENTROPY) COMPATIBLE_IOCTL(RNDZAPENTCNT) COMPATIBLE_IOCTL(RNDCLEARPOOL) -/* Bluetooth ioctls */ +/* Bluetooth */ COMPATIBLE_IOCTL(HCIDEVUP) COMPATIBLE_IOCTL(HCIDEVDOWN) COMPATIBLE_IOCTL(HCIDEVRESET) @@ -631,6 +631,20 @@ COMPATIBLE_IOCTL(CMTPCONNADD) COMPATIBLE_IOCTL(CMTPCONNDEL) COMPATIBLE_IOCTL(CMTPGETCONNLIST) COMPATIBLE_IOCTL(CMTPGETCONNINFO) +/* CAPI */ +COMPATIBLE_IOCTL(CAPI_REGISTER) +COMPATIBLE_IOCTL(CAPI_GET_MANUFACTURER) +COMPATIBLE_IOCTL(CAPI_GET_VERSION) +COMPATIBLE_IOCTL(CAPI_GET_SERIAL) +COMPATIBLE_IOCTL(CAPI_GET_PROFILE) +COMPATIBLE_IOCTL(CAPI_MANUFACTURER_CMD) +COMPATIBLE_IOCTL(CAPI_GET_ERRCODE) +COMPATIBLE_IOCTL(CAPI_INSTALLED) +COMPATIBLE_IOCTL(CAPI_GET_FLAGS) +COMPATIBLE_IOCTL(CAPI_SET_FLAGS) +COMPATIBLE_IOCTL(CAPI_CLR_FLAGS) +COMPATIBLE_IOCTL(CAPI_NCCI_OPENCOUNT) +COMPATIBLE_IOCTL(CAPI_NCCI_GETUNIT) /* Misc. */ COMPATIBLE_IOCTL(0x41545900) /* ATYIO_CLKR */ COMPATIBLE_IOCTL(0x41545901) /* ATYIO_CLKW */ -- cgit v1.2.3 From d8371fcd7cc2ad658932083728ad1984f5328a4f Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 22 Apr 2004 01:33:52 +0100 Subject: [ARM] Add support for ARM Versatile platform. This cset adds minimal support for ARM Ltd's ARM926EJ-S "Versatile" platform. --- arch/arm/Kconfig | 15 +- arch/arm/Makefile | 1 + arch/arm/boot/Makefile | 3 + arch/arm/kernel/debug.S | 29 ++ arch/arm/kernel/entry-armv.S | 31 ++ arch/arm/mach-versatile/Makefile | 5 + arch/arm/mach-versatile/core.c | 507 ++++++++++++++++++++++++++++ arch/arm/mm/Kconfig | 5 +- include/asm-arm/arch-versatile/dma.h | 27 ++ include/asm-arm/arch-versatile/hardware.h | 45 +++ include/asm-arm/arch-versatile/io.h | 29 ++ include/asm-arm/arch-versatile/irqs.h | 211 ++++++++++++ include/asm-arm/arch-versatile/memory.h | 61 ++++ include/asm-arm/arch-versatile/param.h | 19 ++ include/asm-arm/arch-versatile/platform.h | 488 ++++++++++++++++++++++++++ include/asm-arm/arch-versatile/serial.h | 37 ++ include/asm-arm/arch-versatile/system.h | 51 +++ include/asm-arm/arch-versatile/time.h | 158 +++++++++ include/asm-arm/arch-versatile/timex.h | 23 ++ include/asm-arm/arch-versatile/uncompress.h | 54 +++ include/asm-arm/arch-versatile/vmalloc.h | 33 ++ 21 files changed, 1825 insertions(+), 7 deletions(-) create mode 100644 arch/arm/mach-versatile/Makefile create mode 100644 arch/arm/mach-versatile/core.c create mode 100644 include/asm-arm/arch-versatile/dma.h create mode 100644 include/asm-arm/arch-versatile/hardware.h create mode 100644 include/asm-arm/arch-versatile/io.h create mode 100644 include/asm-arm/arch-versatile/irqs.h create mode 100644 include/asm-arm/arch-versatile/memory.h create mode 100644 include/asm-arm/arch-versatile/param.h create mode 100644 include/asm-arm/arch-versatile/platform.h create mode 100644 include/asm-arm/arch-versatile/serial.h create mode 100644 include/asm-arm/arch-versatile/system.h create mode 100644 include/asm-arm/arch-versatile/time.h create mode 100644 include/asm-arm/arch-versatile/timex.h create mode 100644 include/asm-arm/arch-versatile/uncompress.h create mode 100644 include/asm-arm/arch-versatile/vmalloc.h (limited to 'include') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3a1fd4205e01..43329eaf2f9b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -145,6 +145,11 @@ config ARCH_S3C2410 config ARCH_OMAP bool "TI OMAP" +config ARCH_VERSATILE_PB + bool "Versatile PB" + help + This enables support for ARM Ltd Versatile PB board. + endchoice source "arch/arm/mach-clps711x/Kconfig" @@ -262,7 +267,7 @@ config ICST525 config ARM_AMBA bool - depends on ARCH_INTEGRATOR + depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB default y config ISA @@ -514,7 +519,7 @@ config CMDLINE config LEDS bool "Timer and CPU usage LEDs" - depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP + depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB help If you say Y here, the LEDs on your machine will be used to provide useful information about your current system status. @@ -527,8 +532,8 @@ config LEDS system, but the driver will do nothing. config LEDS_TIMER - bool "Timer LED" if LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T) - depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP + bool "Timer LED" if LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE_PB) + depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_FTVPCI || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB default y if ARCH_EBSA110 help If you say Y here, one of the system LEDs (the green one on the @@ -543,7 +548,7 @@ config LEDS_TIMER config LEDS_CPU bool "CPU usage LED" - depends on LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T) + depends on LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE_PB) help If you say Y here, the red LED will be used to give a good real time indication of CPU usage, by lighting whenever the idle task diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 1f9f913fb63f..0dea4d3f5b4a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -94,6 +94,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000 machine-$(CONFIG_ARCH_ADIFCC) := adifcc machine-$(CONFIG_ARCH_OMAP) := omap machine-$(CONFIG_ARCH_S3C2410) := s3c2410 + machine-$(CONFIG_ARCH_VERSATILE_PB) := versatile TEXTADDR := $(textaddr-y) ifeq ($(incdir-y),) diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index 32581b7883c3..65ba5bf38ae6 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -56,6 +56,9 @@ params_phys-$(CONFIG_ARCH_OMAP) := 0x10000100 initrd_phys-$(CONFIG_ARCH_OMAP) := 0x10800000 zreladdr-$(CONFIG_ARCH_S3C2410) := 0x30008000 params_phys-$(CONFIG_ARCH_S3C2410) := 0x30000100 + zreladdr-$(CONFIG_ARCH_VERSATILE_PB) := 0x00008000 +params_phys-$(CONFIG_ARCH_VERSATILE_PB) := 0x00000100 +initrd_phys-$(CONFIG_ARCH_VERSATILE_PB) := 0x00800000 ZRELADDR := $(zreladdr-y) ZTEXTADDR := $(ztextaddr-y) diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index 5db32be694c0..319b21e4fc78 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -550,6 +550,35 @@ 1002: @ exit busyuart .endm + +#elif defined(CONFIG_ARCH_VERSATILE_PB) + +#include + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x10000000 + movne \rx, #0xf1000000 @ virtual base + orr \rx, \rx, #0x001F0000 + orr \rx, \rx, #0x00001000 + .endm + + .macro senduart,rd,rx + strb \rd, [\rx, #UART01x_DR] + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #0x18] @ UARTFLG + tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full + bne 1001b + .endm + + .macro busyuart,rd,rx +1001: ldr \rd, [\rx, #0x18] @ UARTFLG + tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy + bne 1001b + .endm #else #error Unknown architecture #endif diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 9f65d5d21c1c..0bb77b9fb0ab 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -463,6 +463,37 @@ ENTRY(soft_irq_mask) .macro irq_prio_table .endm +#elif defined(CONFIG_ARCH_VERSATILE_PB) + + .macro disable_fiq + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE) + ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status + mov \irqnr, #0 + teq \irqstat, #0 + beq 1003f + +1001: tst \irqstat, #15 + bne 1002f + add \irqnr, \irqnr, #4 + movs \irqstat, \irqstat, lsr #4 + bne 1001b +1002: tst \irqstat, #1 + bne 1003f + add \irqnr, \irqnr, #1 + movs \irqstat, \irqstat, lsr #1 + bne 1002b +1003: /* EQ will be set if no irqs pending */ + +@ clz \irqnr, \irqstat +@1003: /* EQ will be set if we reach MAXIRQNUM */ + .endm + + .macro irq_prio_table + .endm + #elif defined(CONFIG_ARCH_CLPS711X) #include diff --git a/arch/arm/mach-versatile/Makefile b/arch/arm/mach-versatile/Makefile new file mode 100644 index 000000000000..fbf6db8a2cbe --- /dev/null +++ b/arch/arm/mach-versatile/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the linux kernel. +# + +obj-y := core.o diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c new file mode 100644 index 000000000000..22c0254b4d0d --- /dev/null +++ b/arch/arm/mach-versatile/core.c @@ -0,0 +1,507 @@ +/* + * linux/arch/arm/mach-versatile/core.c + * + * Copyright (C) 1999 - 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* + * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx + * is the (PA >> 12). + * + * Setup a VA for the Versatile Vectored Interrupt Controller. + */ +#define VA_VIC_BASE IO_ADDRESS(VERSATILE_VIC_BASE) +#define VA_SIC_BASE IO_ADDRESS(VERSATILE_SIC_BASE) + +static void vic_mask_irq(unsigned int irq) +{ + irq -= IRQ_VIC_START; + writel(1 << irq, VA_VIC_BASE + VIC_IRQ_ENABLE_CLEAR); +} + +static void vic_unmask_irq(unsigned int irq) +{ + irq -= IRQ_VIC_START; + writel(1 << irq, VA_VIC_BASE + VIC_IRQ_ENABLE); +} + +static struct irqchip vic_chip = { + .ack = vic_mask_irq, + .mask = vic_mask_irq, + .unmask = vic_unmask_irq, +}; + +static void sic_mask_irq(unsigned int irq) +{ + irq -= IRQ_SIC_START; + writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); +} + +static void sic_unmask_irq(unsigned int irq) +{ + irq -= IRQ_SIC_START; + writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET); +} + +static struct irqchip sic_chip = { + .ack = sic_mask_irq, + .mask = sic_mask_irq, + .unmask = sic_unmask_irq, +}; + +static void +sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) +{ + unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS); + + if (status == 0) { + do_bad_IRQ(irq, desc, regs); + return; + } + + do { + irq = ffs(status) - 1; + status &= ~(1 << irq); + + irq += IRQ_SIC_START; + + desc = irq_desc + irq; + desc->handle(irq, desc, regs); + } while (status); +} + +#if 1 +#define IRQ_MMCI0A IRQ_VICSOURCE22 +#define IRQ_MMCI1A IRQ_VICSOURCE23 +#define IRQ_AACI IRQ_VICSOURCE24 +#define IRQ_ETH IRQ_VICSOURCE25 +#define PIC_MASK 0xFFD00000 +#else +#define IRQ_MMCI0A IRQ_SIC_MMCI0A +#define IRQ_MMCI1A IRQ_SIC_MMCI1A +#define IRQ_AACI IRQ_SIC_AACI +#define IRQ_ETH IRQ_SIC_ETH +#define PIC_MASK 0 +#endif + +static void __init versatile_init_irq(void) +{ + unsigned int i, value; + + /* Disable all interrupts initially. */ + + writel(0, VA_VIC_BASE + VIC_INT_SELECT); + writel(0, VA_VIC_BASE + VIC_IRQ_ENABLE); + writel(~0, VA_VIC_BASE + VIC_IRQ_ENABLE_CLEAR); + writel(0, VA_VIC_BASE + VIC_IRQ_STATUS); + writel(0, VA_VIC_BASE + VIC_ITCR); + writel(~0, VA_VIC_BASE + VIC_IRQ_SOFT_CLEAR); + + /* + * Make sure we clear all existing interrupts + */ + writel(0, VA_VIC_BASE + VIC_VECT_ADDR); + for (i = 0; i < 19; i++) { + value = readl(VA_VIC_BASE + VIC_VECT_ADDR); + writel(value, VA_VIC_BASE + VIC_VECT_ADDR); + } + + for (i = 0; i < 16; i++) { + value = readl(VA_VIC_BASE + VIC_VECT_CNTL0 + (i * 4)); + writel(value | VICVectCntl_Enable | i, VA_VIC_BASE + VIC_VECT_CNTL0 + (i * 4)); + } + + writel(32, VA_VIC_BASE + VIC_DEF_VECT_ADDR); + + for (i = IRQ_VIC_START; i <= IRQ_VIC_END; i++) { + if (i != IRQ_VICSOURCE31) { + set_irq_chip(i, &vic_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + } + + set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq); + vic_unmask_irq(IRQ_VICSOURCE31); + + /* Do second interrupt controller */ + writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); + + for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) { + if ((PIC_MASK & (1 << (i - IRQ_SIC_START))) == 0) { + set_irq_chip(i, &sic_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + } + + /* + * Interrupts on secondary controller from 0 to 8 are routed to + * source 31 on PIC. + * Interrupts from 21 to 31 are routed directly to the VIC on + * the corresponding number on primary controller. This is controlled + * by setting PIC_ENABLEx. + */ + writel(PIC_MASK, VA_SIC_BASE + SIC_INT_PIC_ENABLE); +} + +static struct map_desc versatile_io_desc[] __initdata = { + { IO_ADDRESS(VERSATILE_SYS_BASE), VERSATILE_SYS_BASE, SZ_4K, MT_DEVICE }, + { IO_ADDRESS(VERSATILE_SIC_BASE), VERSATILE_SIC_BASE, SZ_4K, MT_DEVICE }, + { IO_ADDRESS(VERSATILE_VIC_BASE), VERSATILE_VIC_BASE, SZ_4K, MT_DEVICE }, + { IO_ADDRESS(VERSATILE_SCTL_BASE), VERSATILE_SCTL_BASE, SZ_4K * 9, MT_DEVICE }, +#ifdef CONFIG_DEBUG_LL + { IO_ADDRESS(VERSATILE_UART0_BASE), VERSATILE_UART0_BASE, SZ_4K, MT_DEVICE }, +#endif +#ifdef FIXME + { PCI_MEMORY_VADDR, PHYS_PCI_MEM_BASE, SZ_16M, MT_DEVICE }, + { PCI_CONFIG_VADDR, PHYS_PCI_CONFIG_BASE, SZ_16M, MT_DEVICE }, + { PCI_V3_VADDR, PHYS_PCI_V3_BASE, SZ_512K, MT_DEVICE }, + { PCI_IO_VADDR, PHYS_PCI_IO_BASE, SZ_64K, MT_DEVICE }, +#endif +}; + +static void __init versatile_map_io(void) +{ + iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc)); +} + +#define VERSATILE_REFCOUNTER (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_24MHz_OFFSET) + +/* + * This is the VersatilePB sched_clock implementation. This has + * a resolution of 41.7ns, and a maximum value of about 179s. + */ +unsigned long long sched_clock(void) +{ + unsigned long long v; + + v = (unsigned long long)readl(VERSATILE_REFCOUNTER) * 125; + do_div(v, 3); + + return v; +} + + +#define VERSATILE_FLASHCTRL (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET) + +static int versatile_flash_init(void) +{ + u32 val; + + val = __raw_readl(VERSATILE_FLASHCTRL); + val &= ~VERSATILE_FLASHPROG_FLVPPEN; + __raw_writel(val, VERSATILE_FLASHCTRL); + + return 0; +} + +static void versatile_flash_exit(void) +{ + u32 val; + + val = __raw_readl(VERSATILE_FLASHCTRL); + val &= ~VERSATILE_FLASHPROG_FLVPPEN; + __raw_writel(val, VERSATILE_FLASHCTRL); +} + +static void versatile_flash_set_vpp(int on) +{ + u32 val; + + val = __raw_readl(VERSATILE_FLASHCTRL); + if (on) + val |= VERSATILE_FLASHPROG_FLVPPEN; + else + val &= ~VERSATILE_FLASHPROG_FLVPPEN; + __raw_writel(val, VERSATILE_FLASHCTRL); +} + +static struct flash_platform_data versatile_flash_data = { + .map_name = "cfi_probe", + .width = 4, + .init = versatile_flash_init, + .exit = versatile_flash_exit, + .set_vpp = versatile_flash_set_vpp, +}; + +static struct resource versatile_flash_resource = { + .start = VERSATILE_FLASH_BASE, + .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device versatile_flash_device = { + .name = "armflash", + .id = 0, + .dev = { + .platform_data = &versatile_flash_data, + }, + .num_resources = 1, + .resource = &versatile_flash_resource, +}; + +static struct resource smc91x_resources[] = { + [0] = { + .start = VERSATILE_ETH_BASE, + .end = VERSATILE_ETH_BASE + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_ETH, + .end = IRQ_ETH, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = 0, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; + +#define VERSATILE_SYSMCI (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET) + +static unsigned int mmc_status(struct device *dev) +{ + struct amba_device *adev = container_of(dev, struct amba_device, dev); + u32 mask; + + if (adev->res.start == VERSATILE_MMCI0_BASE) + mask = 1; + else + mask = 2; + + return readl(VERSATILE_SYSMCI) & mask; +} + +static struct mmc_platform_data mmc0_plat_data = { + .mclk = 33000000, + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, + .status = mmc_status, +}; + +static struct mmc_platform_data mmc1_plat_data = { + .mclk = 33000000, + .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, + .status = mmc_status, +}; + +#define AMBA_DEVICE(name,busid,base,plat) \ +static struct amba_device name##_device = { \ + .dev = { \ + .coherent_dma_mask = ~0, \ + .bus_id = busid, \ + .platform_data = plat, \ + }, \ + .res = { \ + .start = VERSATILE_##base##_BASE, \ + .end = (VERSATILE_##base##_BASE) + SZ_4K - 1,\ + .flags = IORESOURCE_MEM, \ + }, \ + .irq = base##_IRQ, \ + .dma = base##_DMA, \ +} + +#define AACI_IRQ { IRQ_AACI, NO_IRQ } +#define AACI_DMA { 0x80, 0x81 } +#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } +#define MMCI0_DMA { 0x84, 0 } +#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } +#define KMI0_DMA { 0, 0 } +#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } +#define KMI1_DMA { 0, 0 } +#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } +#define UART3_DMA { 0x86, 0x87 } +#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } +#define SCI1_DMA { 0x88, 0x89 } +#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } +#define MMCI1_DMA { 0x85, 0 } + +/* + * These devices are connected directly to the multi-layer AHB switch + */ +#define SMC_IRQ { NO_IRQ, NO_IRQ } +#define SMC_DMA { 0, 0 } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_DMA { 0, 0 } +#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } +#define CLCD_DMA { 0, 0 } +#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } +#define DMAC_DMA { 0, 0 } + +/* + * These devices are connected via the core APB bridge + */ +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define SCTL_DMA { 0, 0 } +#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } +#define WATCHDOG_DMA { 0, 0 } +#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } +#define GPIO0_DMA { 0, 0 } +#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } +#define GPIO1_DMA { 0, 0 } +#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } +#define GPIO2_DMA { 0, 0 } +#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } +#define GPIO3_DMA { 0, 0 } +#define RTC_IRQ { IRQ_RTCINT, NO_IRQ } +#define RTC_DMA { 0, 0 } + +/* + * These devices are connected via the DMA APB bridge + */ +#define SCI_IRQ { IRQ_SCIINT, NO_IRQ } +#define SCI_DMA { 7, 6 } +#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } +#define UART0_DMA { 15, 14 } +#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } +#define UART1_DMA { 13, 12 } +#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } +#define UART2_DMA { 11, 10 } +#define SSP_IRQ { IRQ_SSPINT, NO_IRQ } +#define SSP_DMA { 9, 8 } + +/* FPGA Primecells */ +AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); +AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); +AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); +AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); + +/* DevChip Primecells */ +AMBA_DEVICE(smc, "dev:00", SMC, NULL); +AMBA_DEVICE(mpmc, "dev:10", MPMC, NULL); +AMBA_DEVICE(clcd, "dev:20", CLCD, NULL); +AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); +AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:e4", GPIO0, NULL); +AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL); +AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL); +AMBA_DEVICE(gpio3, "dev:e7", GPIO3, NULL); +AMBA_DEVICE(rtc, "dev:e8", RTC, NULL); +AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); +AMBA_DEVICE(uart1, "dev:f2", UART1, NULL); +AMBA_DEVICE(uart2, "dev:f3", UART2, NULL); +AMBA_DEVICE(ssp0, "dev:f4", SSP, NULL); + +static struct amba_device *amba_devs[] __initdata = { + &dmac_device, + &uart0_device, + &uart1_device, + &uart2_device, + &uart3_device, + &smc_device, + &mpmc_device, + &clcd_device, + &sctl_device, + &wdog_device, + &gpio0_device, + &gpio1_device, + &gpio2_device, + &gpio3_device, + &rtc_device, + &sci0_device, + &ssp0_device, + &aaci_device, + &mmc0_device, + &kmi0_device, + &kmi1_device, + &sci1_device, + &mmc1_device, +}; + +#define VA_LEDS_BASE (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_LED_OFFSET) + +static void versatile_leds_event(led_event_t ledevt) +{ + unsigned long flags; + u32 val; + + local_irq_save(flags); + val = readl(VA_LEDS_BASE); + + switch (ledevt) { + case led_idle_start: + val = val & ~VERSATILE_SYS_LED0; + break; + + case led_idle_end: + val = val | VERSATILE_SYS_LED0; + break; + + case led_timer: + val = val ^ VERSATILE_SYS_LED1; + break; + + case led_halted: + val = 0; + break; + + default: + break; + } + + writel(val, VA_LEDS_BASE); + local_irq_restore(flags); +} + +static void __init versatile_init(void) +{ + int i; + + platform_add_device(&versatile_flash_device); + platform_add_device(&smc91x_device); + + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { + struct amba_device *d = amba_devs[i]; + amba_device_register(d, &iomem_resource); + } + + leds_event = versatile_leds_event; +} + +MACHINE_START(VERSATILE_PB, "ARM-Versatile PB") + MAINTAINER("ARM Ltd/Deep Blue Solutions Ltd") + BOOT_MEM(0x00000000, 0x101f1000, 0xf11f1000) + BOOT_PARAMS(0x00000100) + MAPIO(versatile_map_io) + INITIRQ(versatile_init_irq) + INIT_MACHINE(versatile_init) +MACHINE_END diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 67c0834959ac..d7968d6896ee 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -114,8 +114,9 @@ config CPU_ARM925T # ARM926T config CPU_ARM926T - bool "Support ARM926T processor" - depends on ARCH_INTEGRATOR || ARCH_OMAP1610 + bool "Support ARM926T processor" if ARCH_INTEGRATOR + depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || ARCH_OMAP1610 + default y if ARCH_VERSATILE_PB select CPU_32v5 select CPU_ABRT_EV5TJ select CPU_COPY_V4WB diff --git a/include/asm-arm/arch-versatile/dma.h b/include/asm-arm/arch-versatile/dma.h new file mode 100644 index 000000000000..dcc8ac26eac0 --- /dev/null +++ b/include/asm-arm/arch-versatile/dma.h @@ -0,0 +1,27 @@ +/* + * linux/include/asm-arm/arch-versatile/dma.h + * + * Copyright (C) 2003 ARM Limited. + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_ADDRESS 0xffffffff +#define MAX_DMA_CHANNELS 0 + +#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-versatile/hardware.h b/include/asm-arm/arch-versatile/hardware.h new file mode 100644 index 000000000000..535b1f041b73 --- /dev/null +++ b/include/asm-arm/arch-versatile/hardware.h @@ -0,0 +1,45 @@ +/* + * linux/include/asm-arm/arch-versatile/hardware.h + * + * This file contains the hardware definitions of the Versatile PB board. + * + * Copyright (C) 2003 ARM Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include +#include + +// FIXME = PCI settings need to be fixed!!!!! + +/* + * Similar to above, but for PCI addresses (memory, IO, Config and the + * V3 chip itself). WARNING: this has to mirror definitions in platform.h + */ +#define PCI_MEMORY_VADDR 0xe8000000 +#define PCI_CONFIG_VADDR 0xec000000 +#define PCI_V3_VADDR 0xed000000 +#define PCI_IO_VADDR 0xee000000 + +#define PCIO_BASE PCI_IO_VADDR +#define PCIMEM_BASE PCI_MEMORY_VADDR + +/* macro to get at IO space when running virtually */ +#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) + +#endif diff --git a/include/asm-arm/arch-versatile/io.h b/include/asm-arm/arch-versatile/io.h new file mode 100644 index 000000000000..542bc6b5d03c --- /dev/null +++ b/include/asm-arm/arch-versatile/io.h @@ -0,0 +1,29 @@ +/* + * linux/include/asm-arm/arch-versatile/io.h + * + * Copyright (C) 2003 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffff + +#define __io(a) ((a)) +#define __mem_pci(a) ((unsigned long)(a)) +#define __mem_isa(a) ((unsigned long)(a)) + +#endif diff --git a/include/asm-arm/arch-versatile/irqs.h b/include/asm-arm/arch-versatile/irqs.h new file mode 100644 index 000000000000..745aa841b31a --- /dev/null +++ b/include/asm-arm/arch-versatile/irqs.h @@ -0,0 +1,211 @@ +/* + * linux/include/asm-arm/arch-versatile/irqs.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include + +/* + * IRQ interrupts definitions are the same the INT definitions + * held within platform.h + */ +#define IRQ_VIC_START 0 +#define IRQ_WDOGINT (IRQ_VIC_START + INT_WDOGINT) +#define IRQ_SOFTINT (IRQ_VIC_START + INT_SOFTINT) +#define IRQ_COMMRx (IRQ_VIC_START + INT_COMMRx) +#define IRQ_COMMTx (IRQ_VIC_START + INT_COMMTx) +#define IRQ_TIMERINT0_1 (IRQ_VIC_START + INT_TIMERINT0_1) +#define IRQ_TIMERINT2_3 (IRQ_VIC_START + INT_TIMERINT2_3) +#define IRQ_GPIOINT0 (IRQ_VIC_START + INT_GPIOINT0) +#define IRQ_GPIOINT1 (IRQ_VIC_START + INT_GPIOINT1) +#define IRQ_GPIOINT2 (IRQ_VIC_START + INT_GPIOINT2) +#define IRQ_GPIOINT3 (IRQ_VIC_START + INT_GPIOINT3) +#define IRQ_RTCINT (IRQ_VIC_START + INT_RTCINT) +#define IRQ_SSPINT (IRQ_VIC_START + INT_SSPINT) +#define IRQ_UARTINT0 (IRQ_VIC_START + INT_UARTINT0) +#define IRQ_UARTINT1 (IRQ_VIC_START + INT_UARTINT1) +#define IRQ_UARTINT2 (IRQ_VIC_START + INT_UARTINT2) +#define IRQ_SCIINT (IRQ_VIC_START + INT_SCIINT) +#define IRQ_CLCDINT (IRQ_VIC_START + INT_CLCDINT) +#define IRQ_DMAINT (IRQ_VIC_START + INT_DMAINT) +#define IRQ_PWRFAILINT (IRQ_VIC_START + INT_PWRFAILINT) +#define IRQ_MBXINT (IRQ_VIC_START + INT_MBXINT) +#define IRQ_GNDINT (IRQ_VIC_START + INT_GNDINT) +#define IRQ_VICSOURCE21 (IRQ_VIC_START + INT_VICSOURCE21) +#define IRQ_VICSOURCE22 (IRQ_VIC_START + INT_VICSOURCE22) +#define IRQ_VICSOURCE23 (IRQ_VIC_START + INT_VICSOURCE23) +#define IRQ_VICSOURCE24 (IRQ_VIC_START + INT_VICSOURCE24) +#define IRQ_VICSOURCE25 (IRQ_VIC_START + INT_VICSOURCE25) +#define IRQ_VICSOURCE26 (IRQ_VIC_START + INT_VICSOURCE26) +#define IRQ_VICSOURCE27 (IRQ_VIC_START + INT_VICSOURCE27) +#define IRQ_VICSOURCE28 (IRQ_VIC_START + INT_VICSOURCE28) +#define IRQ_VICSOURCE29 (IRQ_VIC_START + INT_VICSOURCE29) +#define IRQ_VICSOURCE30 (IRQ_VIC_START + INT_VICSOURCE30) +#define IRQ_VICSOURCE31 (IRQ_VIC_START + INT_VICSOURCE31) +#define IRQ_VIC_END (IRQ_VIC_START + 31) + +#define IRQMASK_WDOGINT INTMASK_WDOGINT +#define IRQMASK_SOFTINT INTMASK_SOFTINT +#define IRQMASK_COMMRx INTMASK_COMMRx +#define IRQMASK_COMMTx INTMASK_COMMTx +#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1 +#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3 +#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0 +#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1 +#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2 +#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3 +#define IRQMASK_RTCINT INTMASK_RTCINT +#define IRQMASK_SSPINT INTMASK_SSPINT +#define IRQMASK_UARTINT0 INTMASK_UARTINT0 +#define IRQMASK_UARTINT1 INTMASK_UARTINT1 +#define IRQMASK_UARTINT2 INTMASK_UARTINT2 +#define IRQMASK_SCIINT INTMASK_SCIINT +#define IRQMASK_CLCDINT INTMASK_CLCDINT +#define IRQMASK_DMAINT INTMASK_DMAINT +#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT +#define IRQMASK_MBXINT INTMASK_MBXINT +#define IRQMASK_GNDINT INTMASK_GNDINT +#define IRQMASK_VICSOURCE21 INTMASK_VICSOURCE21 +#define IRQMASK_VICSOURCE22 INTMASK_VICSOURCE22 +#define IRQMASK_VICSOURCE23 INTMASK_VICSOURCE23 +#define IRQMASK_VICSOURCE24 INTMASK_VICSOURCE24 +#define IRQMASK_VICSOURCE25 INTMASK_VICSOURCE25 +#define IRQMASK_VICSOURCE26 INTMASK_VICSOURCE26 +#define IRQMASK_VICSOURCE27 INTMASK_VICSOURCE27 +#define IRQMASK_VICSOURCE28 INTMASK_VICSOURCE28 +#define IRQMASK_VICSOURCE29 INTMASK_VICSOURCE29 +#define IRQMASK_VICSOURCE30 INTMASK_VICSOURCE30 +#define IRQMASK_VICSOURCE31 INTMASK_VICSOURCE31 + +/* + * FIQ interrupts definitions are the same the INT definitions. + */ +#define FIQ_WDOGINT INT_WDOGINT +#define FIQ_SOFTINT INT_SOFTINT +#define FIQ_COMMRx INT_COMMRx +#define FIQ_COMMTx INT_COMMTx +#define FIQ_TIMERINT0_1 INT_TIMERINT0_1 +#define FIQ_TIMERINT2_3 INT_TIMERINT2_3 +#define FIQ_GPIOINT0 INT_GPIOINT0 +#define FIQ_GPIOINT1 INT_GPIOINT1 +#define FIQ_GPIOINT2 INT_GPIOINT2 +#define FIQ_GPIOINT3 INT_GPIOINT3 +#define FIQ_RTCINT INT_RTCINT +#define FIQ_SSPINT INT_SSPINT +#define FIQ_UARTINT0 INT_UARTINT0 +#define FIQ_UARTINT1 INT_UARTINT1 +#define FIQ_UARTINT2 INT_UARTINT2 +#define FIQ_SCIINT INT_SCIINT +#define FIQ_CLCDINT INT_CLCDINT +#define FIQ_DMAINT INT_DMAINT +#define FIQ_PWRFAILINT INT_PWRFAILINT +#define FIQ_MBXINT INT_MBXINT +#define FIQ_GNDINT INT_GNDINT +#define FIQ_VICSOURCE21 INT_VICSOURCE21 +#define FIQ_VICSOURCE22 INT_VICSOURCE22 +#define FIQ_VICSOURCE23 INT_VICSOURCE23 +#define FIQ_VICSOURCE24 INT_VICSOURCE24 +#define FIQ_VICSOURCE25 INT_VICSOURCE25 +#define FIQ_VICSOURCE26 INT_VICSOURCE26 +#define FIQ_VICSOURCE27 INT_VICSOURCE27 +#define FIQ_VICSOURCE28 INT_VICSOURCE28 +#define FIQ_VICSOURCE29 INT_VICSOURCE29 +#define FIQ_VICSOURCE30 INT_VICSOURCE30 +#define FIQ_VICSOURCE31 INT_VICSOURCE31 + + +#define FIQMASK_WDOGINT INTMASK_WDOGINT +#define FIQMASK_SOFTINT INTMASK_SOFTINT +#define FIQMASK_COMMRx INTMASK_COMMRx +#define FIQMASK_COMMTx INTMASK_COMMTx +#define FIQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1 +#define FIQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3 +#define FIQMASK_GPIOINT0 INTMASK_GPIOINT0 +#define FIQMASK_GPIOINT1 INTMASK_GPIOINT1 +#define FIQMASK_GPIOINT2 INTMASK_GPIOINT2 +#define FIQMASK_GPIOINT3 INTMASK_GPIOINT3 +#define FIQMASK_RTCINT INTMASK_RTCINT +#define FIQMASK_SSPINT INTMASK_SSPINT +#define FIQMASK_UARTINT0 INTMASK_UARTINT0 +#define FIQMASK_UARTINT1 INTMASK_UARTINT1 +#define FIQMASK_UARTINT2 INTMASK_UARTINT2 +#define FIQMASK_SCIINT INTMASK_SCIINT +#define FIQMASK_CLCDINT INTMASK_CLCDINT +#define FIQMASK_DMAINT INTMASK_DMAINT +#define FIQMASK_PWRFAILINT INTMASK_PWRFAILINT +#define FIQMASK_MBXINT INTMASK_MBXINT +#define FIQMASK_GNDINT INTMASK_GNDINT +#define FIQMASK_VICSOURCE21 INTMASK_VICSOURCE21 +#define FIQMASK_VICSOURCE22 INTMASK_VICSOURCE22 +#define FIQMASK_VICSOURCE23 INTMASK_VICSOURCE23 +#define FIQMASK_VICSOURCE24 INTMASK_VICSOURCE24 +#define FIQMASK_VICSOURCE25 INTMASK_VICSOURCE25 +#define FIQMASK_VICSOURCE26 INTMASK_VICSOURCE26 +#define FIQMASK_VICSOURCE27 INTMASK_VICSOURCE27 +#define FIQMASK_VICSOURCE28 INTMASK_VICSOURCE28 +#define FIQMASK_VICSOURCE29 INTMASK_VICSOURCE29 +#define FIQMASK_VICSOURCE30 INTMASK_VICSOURCE30 +#define FIQMASK_VICSOURCE31 INTMASK_VICSOURCE31 + +/* + * Secondary interrupt controller + */ +#define IRQ_SIC_START 32 +#define IRQ_SIC_MMCI0B (IRQ_SIC_START + SIC_INT_MMCI0B) +#define IRQ_SIC_MMCI1B (IRQ_SIC_START + SIC_INT_MMCI1B) +#define IRQ_SIC_KMI0 (IRQ_SIC_START + SIC_INT_KMI0) +#define IRQ_SIC_KMI1 (IRQ_SIC_START + SIC_INT_KMI1) +#define IRQ_SIC_SCI3 (IRQ_SIC_START + SIC_INT_SCI3) +#define IRQ_SIC_UART3 (IRQ_SIC_START + SIC_INT_UART3) +#define IRQ_SIC_CLCD (IRQ_SIC_START + SIC_INT_CLCD) +#define IRQ_SIC_TOUCH (IRQ_SIC_START + SIC_INT_TOUCH) +#define IRQ_SIC_KEYPAD (IRQ_SIC_START + SIC_INT_KEYPAD) +#define IRQ_SIC_DoC (IRQ_SIC_START + SIC_INT_DoC) +#define IRQ_SIC_MMCI0A (IRQ_SIC_START + SIC_INT_MMCI0A) +#define IRQ_SIC_MMCI1A (IRQ_SIC_START + SIC_INT_MMCI1A) +#define IRQ_SIC_AACI (IRQ_SIC_START + SIC_INT_AACI) +#define IRQ_SIC_ETH (IRQ_SIC_START + SIC_INT_ETH) +#define IRQ_SIC_USB (IRQ_SIC_START + SIC_INT_USB) +#define IRQ_SIC_PCI0 (IRQ_SIC_START + SIC_INT_PCI0) +#define IRQ_SIC_PCI1 (IRQ_SIC_START + SIC_INT_PCI1) +#define IRQ_SIC_PCI2 (IRQ_SIC_START + SIC_INT_PCI2) +#define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3) +#define IRQ_SIC_END 63 + +#define SIC_IRQMASK_MMCI0B SIC_INTMASK_MMCI0B +#define SIC_IRQMASK_MMCI1B SIC_INTMASK_MMCI1B +#define SIC_IRQMASK_KMI0 SIC_INTMASK_KMI0 +#define SIC_IRQMASK_KMI1 SIC_INTMASK_KMI1 +#define SIC_IRQMASK_SCI3 SIC_INTMASK_SCI3 +#define SIC_IRQMASK_UART3 SIC_INTMASK_UART3 +#define SIC_IRQMASK_CLCD SIC_INTMASK_CLCD +#define SIC_IRQMASK_TOUCH SIC_INTMASK_TOUCH +#define SIC_IRQMASK_KEYPAD SIC_INTMASK_KEYPAD +#define SIC_IRQMASK_DoC SIC_INTMASK_DoC +#define SIC_IRQMASK_MMCI0A SIC_INTMASK_MMCI0A +#define SIC_IRQMASK_MMCI1A SIC_INTMASK_MMCI1A +#define SIC_IRQMASK_AACI SIC_INTMASK_AACI +#define SIC_IRQMASK_ETH SIC_INTMASK_ETH +#define SIC_IRQMASK_USB SIC_INTMASK_USB +#define SIC_IRQMASK_PCI0 SIC_INTMASK_PCI0 +#define SIC_IRQMASK_PCI1 SIC_INTMASK_PCI1 +#define SIC_IRQMASK_PCI2 SIC_INTMASK_PCI2 +#define SIC_IRQMASK_PCI3 SIC_INTMASK_PCI3 + +#define NR_IRQS 64 diff --git a/include/asm-arm/arch-versatile/memory.h b/include/asm-arm/arch-versatile/memory.h new file mode 100644 index 000000000000..4b7295b4a89a --- /dev/null +++ b/include/asm-arm/arch-versatile/memory.h @@ -0,0 +1,61 @@ +/* + * linux/include/asm-arm/arch-versatile/memory.h + * + * Copyright (C) 2003 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_MMU_H +#define __ASM_ARCH_MMU_H + +/* + * Task size: 3GB + */ +#define TASK_SIZE (0xbf000000UL) +#define TASK_SIZE_26 (0x04000000UL) + +/* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (0x40000000) + +/* + * Page offset: 3GB + */ +#define PAGE_OFFSET (0xc0000000UL) +#define PHYS_OFFSET (0x00000000UL) + +/* + * On Versatile PB, the dram is contiguous + */ +#define __virt_to_phys__is_a_macro +#define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET) +#define __phys_to_virt__is_a_macro +#define __phys_to_virt(ppage) ((ppage) + PAGE_OFFSET) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus__is_a_macro +#define __virt_to_bus(x) ((x) - PAGE_OFFSET) +#define __bus_to_virt__is_a_macro +#define __bus_to_virt(x) ((x) + PAGE_OFFSET) + +#endif diff --git a/include/asm-arm/arch-versatile/param.h b/include/asm-arm/arch-versatile/param.h new file mode 100644 index 000000000000..34b897335f87 --- /dev/null +++ b/include/asm-arm/arch-versatile/param.h @@ -0,0 +1,19 @@ +/* + * linux/include/asm-arm/arch-versatile/param.h + * + * Copyright (C) 2002 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/include/asm-arm/arch-versatile/platform.h b/include/asm-arm/arch-versatile/platform.h new file mode 100644 index 000000000000..68be3f036600 --- /dev/null +++ b/include/asm-arm/arch-versatile/platform.h @@ -0,0 +1,488 @@ +/* + * linux/include/asm-arm/arch-versatile/platform.h + * + * Copyright (c) ARM Limited 2003. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __address_h +#define __address_h 1 + +/* + * Memory definitions + */ +#define VERSATILE_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/ +#define VERSATILE_BOOT_ROM_HI 0x30000000 +#define VERSATILE_BOOT_ROM_BASE VERSATILE_BOOT_ROM_HI /* Normal position */ +#define VERSATILE_BOOT_ROM_SIZE SZ_64M + +#define VERSATILE_SSRAM_BASE /* VERSATILE_SSMC_BASE ? */ +#define VERSATILE_SSRAM_SIZE SZ_2M + +#define VERSATILE_FLASH_BASE 0x34000000 +#define VERSATILE_FLASH_SIZE SZ_64M + +/* + * SDRAM + */ +#define VERSATILE_SDRAM_BASE 0x00000000 + +/* + * Logic expansion modules + * + */ + + +/* ------------------------------------------------------------------------ + * Versatile PB Registers + * ------------------------------------------------------------------------ + * + */ +#define VERSATILE_SYS_ID_OFFSET 0x00 +#define VERSATILE_SYS_SW_OFFSET 0x04 +#define VERSATILE_SYS_LED_OFFSET 0x08 +#define VERSATILE_SYS_OSC0_OFFSET 0x0C +#define VERSATILE_SYS_OSC1_OFFSET 0x10 +#define VERSATILE_SYS_OSC2_OFFSET 0x14 +#define VERSATILE_SYS_OSC3_OFFSET 0x18 +#define VERSATILE_SYS_OSC4_OFFSET 0x1C +#define VERSATILE_SYS_LOCK_OFFSET 0x20 +#define VERSATILE_SYS_100HZ_OFFSET 0x24 +#define VERSATILE_SYS_CFGDATA1_OFFSET 0x28 +#define VERSATILE_SYS_CFGDATA2_OFFSET 0x2C +#define VERSATILE_SYS_FLAGS_OFFSET 0x30 +#define VERSATILE_SYS_FLAGSSET_OFFSET 0x30 +#define VERSATILE_SYS_FLAGSCLR_OFFSET 0x34 +#define VERSATILE_SYS_NVFLAGS_OFFSET 0x38 +#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38 +#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C +#define VERSATILE_SYS_RESETCTL_OFFSET 0x40 +#define VERSATILE_SYS_PICCTL_OFFSET 0x44 +#define VERSATILE_SYS_MCI_OFFSET 0x48 +#define VERSATILE_SYS_FLASH_OFFSET 0x4C +#define VERSATILE_SYS_CLCD_OFFSET 0x50 +#define VERSATILE_SYS_CLCDSER_OFFSET 0x54 +#define VERSATILE_SYS_BOOTCS_OFFSET 0x58 +#define VERSATILE_SYS_24MHz_OFFSET 0x5C +#define VERSATILE_SYS_MISC_OFFSET 0x60 +#define VERSATILE_SYS_TEST_OSC0_OFFSET 0x80 +#define VERSATILE_SYS_TEST_OSC1_OFFSET 0x84 +#define VERSATILE_SYS_TEST_OSC2_OFFSET 0x88 +#define VERSATILE_SYS_TEST_OSC3_OFFSET 0x8C +#define VERSATILE_SYS_TEST_OSC4_OFFSET 0x90 + +#define VERSATILE_SYS_BASE 0x10000000 +#define VERSATILE_SYS_ID (VERSATILE_SYS_BASE + VERSATILE_SYS_ID_OFFSET) +#define VERSATILE_SYS_SW (VERSATILE_SYS_BASE + VERSATILE_SYS_SW_OFFSET) +#define VERSATILE_SYS_LED (VERSATILE_SYS_BASE + VERSATILE_SYS_LED_OFFSET) +#define VERSATILE_SYS_OSC0 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC0_OFFSET) +#define VERSATILE_SYS_OSC1 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC1_OFFSET) +#define VERSATILE_SYS_OSC2 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC2_OFFSET) +#define VERSATILE_SYS_OSC3 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC3_OFFSET) +#define VERSATILE_SYS_OSC4 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC4_OFFSET) +#define VERSATILE_SYS_LOCK (VERSATILE_SYS_BASE + VERSATILE_SYS_LOCK_OFFSET) +#define VERSATILE_SYS_100HZ (VERSATILE_SYS_BASE + VERSATILE_SYS_100HZ_OFFSET) +#define VERSATILE_SYS_CFGDATA1 (VERSATILE_SYS_BASE + VERSATILE_SYS_CFGDATA1_OFFSET) +#define VERSATILE_SYS_CFGDATA2 (VERSATILE_SYS_BASE + VERSATILE_SYS_CFGDATA2_OFFSET) +#define VERSATILE_SYS_FLAGS (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGS_OFFSET) +#define VERSATILE_SYS_FLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGSSET_OFFSET) +#define VERSATILE_SYS_FLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGSCLR_OFFSET) +#define VERSATILE_SYS_NVFLAGS (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGS_OFFSET) +#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET) +#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET) +#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET) +#define VERSATILE_SYS_PICCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PICCTL_OFFSET) +#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET) +#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) +#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET) +#define VERSATILE_SYS_CLCDSER (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCDSER_OFFSET) +#define VERSATILE_SYS_BOOTCS (VERSATILE_SYS_BASE + VERSATILE_SYS_BOOTCS_OFFSET) +#define VERSATILE_SYS_24MHz (VERSATILE_SYS_BASE + VERSATILE_SYS_24MHz_OFFSET) +#define VERSATILE_SYS_MISC (VERSATILE_SYS_BASE + VERSATILE_SYS_MISC_OFFSET) +#define VERSATILE_SYS_TEST_OSC0 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC0_OFFSET) +#define VERSATILE_SYS_TEST_OSC1 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC1_OFFSET) +#define VERSATILE_SYS_TEST_OSC2 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC2_OFFSET) +#define VERSATILE_SYS_TEST_OSC3 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC3_OFFSET) +#define VERSATILE_SYS_TEST_OSC4 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC4_OFFSET) + +/* + * Values for VERSATILE_SYS_RESET_CTRL + */ +#define VERSATILE_SYS_CTRL_RESET_CONFIGCLR 0x01 +#define VERSATILE_SYS_CTRL_RESET_CONFIGINIT 0x02 +#define VERSATILE_SYS_CTRL_RESET_DLLRESET 0x03 +#define VERSATILE_SYS_CTRL_RESET_PLLRESET 0x04 +#define VERSATILE_SYS_CTRL_RESET_POR 0x05 +#define VERSATILE_SYS_CTRL_RESET_DoC 0x06 + +#define VERSATILE_SYS_CTRL_LED (1 << 0) + + +/* ------------------------------------------------------------------------ + * Versatile PB control registers + * ------------------------------------------------------------------------ + */ + +/* + * VERSATILE_IDFIELD + * + * 31:24 = manufacturer (0x41 = ARM) + * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus) + * 15:12 = FPGA (0x3 = XVC600 or XVC600E) + * 11:4 = build value + * 3:0 = revision number (0x1 = rev B (AHB)) + */ + +/* + * VERSATILE_SYS_LOCK + * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL, + * SYS_CLD, SYS_BOOTCS + */ +#define VERSATILE_SYS_LOCK_LOCKED (1 << 16) +#define VERSATILE_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */ + +/* + * VERSATILE_SYS_FLASH + */ +#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */ + +/* + * VERSATILE_INTREG + * - used to acknowledge and control MMCI and UART interrupts + */ +#define VERSATILE_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */ +#define VERSATILE_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */ +#define VERSATILE_INTREG_CARDIN 0x08 /* MMCI card in detect */ + /* write 1 to acknowledge and clear */ +#define VERSATILE_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */ +#define VERSATILE_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */ + +/* + * VERSATILE peripheral addresses + */ +#define VERSATILE_PCI_CORE_BASE 0x10001000 /* PCI core control */ +#define VERSATILE_I2C_BASE 0x10002000 /* I2C control */ +#define VERSATILE_SIC_BASE 0x10003000 /* Secondary interrupt controller */ +#define VERSATILE_AACI_BASE 0x10004000 /* Audio */ +#define VERSATILE_MMCI0_BASE 0x10005000 /* MMC interface */ +#define VERSATILE_KMI0_BASE 0x10006000 /* KMI interface */ +#define VERSATILE_KMI1_BASE 0x10007000 /* KMI 2nd interface */ +#define VERSATILE_CHAR_LCD_BASE 0x10008000 /* Character LCD */ +#define VERSATILE_UART3_BASE 0x10009000 /* UART 3 */ +#define VERSATILE_SCI1_BASE 0x1000A000 +#define VERSATILE_MMCI1_BASE 0x1000B000 /* MMC Interface */ + /* 0x1000C000 - 0x1000CFFF = reserved */ +#define VERSATILE_ETH_BASE 0x10010000 /* Ethernet */ +#define VERSATILE_USB_BASE 0x10020000 /* USB */ + /* 0x10030000 - 0x100FFFFF = reserved */ +#define VERSATILE_SMC_BASE 0x10100000 /* SMC */ +#define VERSATILE_MPMC_BASE 0x10110000 /* MPMC */ +#define VERSATILE_CLCD_BASE 0x10120000 /* CLCD */ +#define VERSATILE_DMAC_BASE 0x10130000 /* DMA controller */ +#define VERSATILE_VIC_BASE 0x10140000 /* Vectored interrupt controller */ +#define VERSATILE_PERIPH_BASE 0x10150000 /* off-chip peripherals alias from */ + /* 0x10000000 - 0x100FFFFF */ +#define VERSATILE_AHBM_BASE 0x101D0000 /* AHB monitor */ +#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ +#define VERSATILE_WATCHDOG_BASE 0x101E1000 /* Watchdog */ +#define VERSATILE_TIMER0_1_BASE 0x101E2000 /* Timer 0 and 1 */ +#define VERSATILE_TIMER2_3_BASE 0x101E3000 /* Timer 2 and 3 */ +#define VERSATILE_GPIO0_BASE 0x101E4000 /* GPIO port 0 */ +#define VERSATILE_GPIO1_BASE 0x101E5000 /* GPIO port 1 */ +#define VERSATILE_GPIO2_BASE 0x101E6000 /* GPIO port 2 */ +#define VERSATILE_GPIO3_BASE 0x101E7000 /* GPIO port 3 */ +#define VERSATILE_RTC_BASE 0x101E8000 /* Real Time Clock */ + /* 0x101E9000 - reserved */ +#define VERSATILE_SCI_BASE 0x101F0000 /* Smart card controller */ +#define VERSATILE_UART0_BASE 0x101F1000 /* Uart 0 */ +#define VERSATILE_UART1_BASE 0x101F2000 /* Uart 1 */ +#define VERSATILE_UART2_BASE 0x101F3000 /* Uart 2 */ +#define VERSATILE_SSP_BASE 0x101F4000 /* Synchronous Serial Port */ + +#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */ +#define VERSATILE_MBX_BASE 0x40000000 /* MBX */ +#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */ +#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ +#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */ + +/* + * Disk on Chip + */ +#define VERSATILE_DOC_BASE 0x2C000000 +#define VERSATILE_DOC_SIZE (16 << 20) +#define VERSATILE_DOC_PAGE_SIZE 512 +#define VERSATILE_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE) + +#define ERASE_UNIT_PAGES 32 +#define START_PAGE 0x80 + +/* + * LED settings, bits [7:0] + */ +#define VERSATILE_SYS_LED0 (1 << 0) +#define VERSATILE_SYS_LED1 (1 << 1) +#define VERSATILE_SYS_LED2 (1 << 2) +#define VERSATILE_SYS_LED3 (1 << 3) +#define VERSATILE_SYS_LED4 (1 << 4) +#define VERSATILE_SYS_LED5 (1 << 5) +#define VERSATILE_SYS_LED6 (1 << 6) +#define VERSATILE_SYS_LED7 (1 << 7) + +#define ALL_LEDS 0xFF + +#define LED_BANK VERSATILE_SYS_LED + +/* + * Control registers + */ +#define VERSATILE_IDFIELD_OFFSET 0x0 /* Versatile build information */ +#define VERSATILE_FLASHPROG_OFFSET 0x4 /* Flash devices */ +#define VERSATILE_INTREG_OFFSET 0x8 /* Interrupt control */ +#define VERSATILE_DECODE_OFFSET 0xC /* Fitted logic modules */ + + +/* ------------------------------------------------------------------------ + * Versatile PB Interrupt Controller - control registers + * ------------------------------------------------------------------------ + * + * Offsets from interrupt controller base + * + * System Controller interrupt controller base is + * + * VERSATILE_IC_BASE + * + * Core Module interrupt controller base is + * + * VERSATILE_SYS_IC + * + */ +#define VIC_IRQ_STATUS 0 +#define VIC_FIQ_STATUS 0x04 +#define VIC_IRQ_RAW_STATUS 0x08 +#define VIC_INT_SELECT 0x0C /* 1 = FIQ, 0 = IRQ */ +#define VIC_IRQ_ENABLE 0x10 /* 1 = enable, 0 = disable */ +#define VIC_IRQ_ENABLE_CLEAR 0x14 +#define VIC_IRQ_SOFT 0x18 +#define VIC_IRQ_SOFT_CLEAR 0x1C +#define VIC_PROTECT 0x20 +#define VIC_VECT_ADDR 0x30 +#define VIC_DEF_VECT_ADDR 0x34 +#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */ +#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */ +#define VIC_ITCR 0x300 /* VIC test control register */ + +#define VIC_FIQ_RAW_STATUS 0x08 +#define VIC_FIQ_ENABLE 0x10 /* 1 = enable, 0 = disable */ +#define VIC_FIQ_ENABLE_CLEAR 0x14 +#define VIC_FIQ_SOFT 0x18 +#define VIC_FIQ_SOFT_CLEAR 0x1C + +#define SIC_IRQ_STATUS 0 +#define SIC_IRQ_RAW_STATUS 0x04 +#define SIC_IRQ_ENABLE 0x08 +#define SIC_IRQ_ENABLE_SET 0x08 +#define SIC_IRQ_ENABLE_CLEAR 0x0C +#define SIC_INT_SOFT_SET 0x10 +#define SIC_INT_SOFT_CLEAR 0x14 +#define SIC_INT_PIC_ENABLE 0x20 /* read status of pass through mask */ +#define SIC_INT_PIC_ENABLES 0x20 /* set interrupt pass through bits */ +#define SIC_INT_PIC_ENABLEC 0x24 /* Clear interrupt pass through bits */ + +#define VICVectCntl_Enable (1 << 5) + +/* ------------------------------------------------------------------------ + * Interrupts - bit assignment (primary) + * ------------------------------------------------------------------------ + */ + +#define INT_WDOGINT 0 /* Watchdog timer */ +#define INT_SOFTINT 1 /* Software interrupt */ +#define INT_COMMRx 2 /* Debug Comm Rx interrupt */ +#define INT_COMMTx 3 /* Debug Comm Tx interrupt */ +#define INT_TIMERINT0_1 4 /* Timer 0 and 1 */ +#define INT_TIMERINT2_3 5 /* Timer 2 and 3 */ +#define INT_GPIOINT0 6 /* GPIO 0 */ +#define INT_GPIOINT1 7 /* GPIO 1 */ +#define INT_GPIOINT2 8 /* GPIO 2 */ +#define INT_GPIOINT3 9 /* GPIO 3 */ +#define INT_RTCINT 10 /* Real Time Clock */ +#define INT_SSPINT 11 /* Synchronous Serial Port */ +#define INT_UARTINT0 12 /* UART 0 on development chip */ +#define INT_UARTINT1 13 /* UART 1 on development chip */ +#define INT_UARTINT2 14 /* UART 2 on development chip */ +#define INT_SCIINT 15 /* Smart Card Interface */ +#define INT_CLCDINT 16 /* CLCD controller */ +#define INT_DMAINT 17 /* DMA controller */ +#define INT_PWRFAILINT 18 /* Power failure */ +#define INT_MBXINT 19 /* Graphics processor */ +#define INT_GNDINT 20 /* Reserved */ + /* External interrupt signals from logic tiles or secondary controller */ +#define INT_VICSOURCE21 21 /* Disk on Chip */ +#define INT_VICSOURCE22 22 /* MCI0A */ +#define INT_VICSOURCE23 23 /* MCI1A */ +#define INT_VICSOURCE24 24 /* AACI */ +#define INT_VICSOURCE25 25 /* Ethernet */ +#define INT_VICSOURCE26 26 /* USB */ +#define INT_VICSOURCE27 27 /* PCI 0 */ +#define INT_VICSOURCE28 28 /* PCI 1 */ +#define INT_VICSOURCE29 29 /* PCI 2 */ +#define INT_VICSOURCE30 30 /* PCI 3 */ +#define INT_VICSOURCE31 31 /* SIC source */ + +/* + * Interrupt bit positions + * + */ +#define INTMASK_WDOGINT (1 << INT_WDOGINT) +#define INTMASK_SOFTINT (1 << INT_SOFTINT) +#define INTMASK_COMMRx (1 << INT_COMMRx) +#define INTMASK_COMMTx (1 << INT_COMMTx) +#define INTMASK_TIMERINT0_1 (1 << INT_TIMERINT0_1) +#define INTMASK_TIMERINT2_3 (1 << INT_TIMERINT2_3) +#define INTMASK_GPIOINT0 (1 << INT_GPIOINT0) +#define INTMASK_GPIOINT1 (1 << INT_GPIOINT1) +#define INTMASK_GPIOINT2 (1 << INT_GPIOINT2) +#define INTMASK_GPIOINT3 (1 << INT_GPIOINT3) +#define INTMASK_RTCINT (1 << INT_RTCINT) +#define INTMASK_SSPINT (1 << INT_SSPINT) +#define INTMASK_UARTINT0 (1 << INT_UARTINT0) +#define INTMASK_UARTINT1 (1 << INT_UARTINT1) +#define INTMASK_UARTINT2 (1 << INT_UARTINT2) +#define INTMASK_SCIINT (1 << INT_SCIINT) +#define INTMASK_CLCDINT (1 << INT_CLCDINT) +#define INTMASK_DMAINT (1 << INT_DMAINT) +#define INTMASK_PWRFAILINT (1 << INT_PWRFAILINT) +#define INTMASK_MBXINT (1 << INT_MBXINT) +#define INTMASK_GNDINT (1 << INT_GNDINT) +#define INTMASK_VICSOURCE21 (1 << INT_VICSOURCE21) +#define INTMASK_VICSOURCE22 (1 << INT_VICSOURCE22) +#define INTMASK_VICSOURCE23 (1 << INT_VICSOURCE23) +#define INTMASK_VICSOURCE24 (1 << INT_VICSOURCE24) +#define INTMASK_VICSOURCE25 (1 << INT_VICSOURCE25) +#define INTMASK_VICSOURCE26 (1 << INT_VICSOURCE26) +#define INTMASK_VICSOURCE27 (1 << INT_VICSOURCE27) +#define INTMASK_VICSOURCE28 (1 << INT_VICSOURCE28) +#define INTMASK_VICSOURCE29 (1 << INT_VICSOURCE29) +#define INTMASK_VICSOURCE30 (1 << INT_VICSOURCE30) +#define INTMASK_VICSOURCE31 (1 << INT_VICSOURCE31) + + +#define VERSATILE_SC_VALID_INT 0x003FFFFF + +#define MAXIRQNUM 31 +#define MAXFIQNUM 31 +#define MAXSWINUM 31 + +/* ------------------------------------------------------------------------ + * Interrupts - bit assignment (secondary) + * ------------------------------------------------------------------------ + */ +#define SIC_INT_MMCI0B 1 /* Multimedia Card 0B */ +#define SIC_INT_MMCI1B 2 /* Multimedia Card 1B */ +#define SIC_INT_KMI0 3 /* Keyboard/Mouse port 0 */ +#define SIC_INT_KMI1 4 /* Keyboard/Mouse port 1 */ +#define SIC_INT_SCI3 5 /* Smart Card interface */ +#define SIC_INT_UART3 6 /* UART 3 empty or data available */ +#define SIC_INT_CLCD 7 /* Character LCD */ +#define SIC_INT_TOUCH 8 /* Touchscreen */ +#define SIC_INT_KEYPAD 9 /* Key pressed on display keypad */ + /* 10:20 - reserved */ +#define SIC_INT_DoC 21 /* Disk on Chip memory controller */ +#define SIC_INT_MMCI0A 22 /* MMC 0A */ +#define SIC_INT_MMCI1A 23 /* MMC 1A */ +#define SIC_INT_AACI 24 /* Audio Codec */ +#define SIC_INT_ETH 25 /* Ethernet controller */ +#define SIC_INT_USB 26 /* USB controller */ +#define SIC_INT_PCI0 27 +#define SIC_INT_PCI1 28 +#define SIC_INT_PCI2 29 +#define SIC_INT_PCI3 30 + + +#define SIC_INTMASK_MMCI0B (1 << SIC_INT_MMCI0B) +#define SIC_INTMASK_MMCI1B (1 << SIC_INT_MMCI1B) +#define SIC_INTMASK_KMI0 (1 << SIC_INT_KMI0) +#define SIC_INTMASK_KMI1 (1 << SIC_INT_KMI1) +#define SIC_INTMASK_SCI3 (1 << SIC_INT_SCI3) +#define SIC_INTMASK_UART3 (1 << SIC_INT_UART3) +#define SIC_INTMASK_CLCD (1 << SIC_INT_CLCD) +#define SIC_INTMASK_TOUCH (1 << SIC_INT_TOUCH) +#define SIC_INTMASK_KEYPAD (1 << SIC_INT_KEYPAD) +#define SIC_INTMASK_DoC (1 << SIC_INT_DoC) +#define SIC_INTMASK_MMCI0A (1 << SIC_INT_MMCI0A) +#define SIC_INTMASK_MMCI1A (1 << SIC_INT_MMCI1A) +#define SIC_INTMASK_AACI (1 << SIC_INT_AACI) +#define SIC_INTMASK_ETH (1 << SIC_INT_ETH) +#define SIC_INTMASK_USB (1 << SIC_INT_USB) +#define SIC_INTMASK_PCI0 (1 << SIC_INT_PCI0) +#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1) +#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2) +#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3) +/* + * Application Flash + * + */ +#define FLASH_BASE VERSATILE_FLASH_BASE +#define FLASH_SIZE VERSATILE_FLASH_SIZE +#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) +#define FLASH_BLOCK_SIZE SZ_128K + +/* + * Boot Flash + * + */ +#define EPROM_BASE VERSATILE_BOOT_ROM_HI +#define EPROM_SIZE VERSATILE_BOOT_ROM_SIZE +#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) + +/* + * Clean base - dummy + * + */ +#define CLEAN_BASE EPROM_BASE + +/* + * System controller bit assignment + */ +#define VERSATILE_REFCLK 0 +#define VERSATILE_TIMCLK 1 + +#define VERSATILE_TIMER1_EnSel 15 +#define VERSATILE_TIMER2_EnSel 17 +#define VERSATILE_TIMER3_EnSel 19 +#define VERSATILE_TIMER4_EnSel 21 + + +#define MAX_TIMER 2 +#define MAX_PERIOD 699050 +#define TICKS_PER_uSEC 1 + +/* + * These are useconds NOT ticks. + * + */ +#define mSEC_1 1000 +#define mSEC_5 (mSEC_1 * 5) +#define mSEC_10 (mSEC_1 * 10) +#define mSEC_25 (mSEC_1 * 25) +#define SEC_1 (mSEC_1 * 1000) + +#define VERSATILE_CSR_BASE 0x10000000 +#define VERSATILE_CSR_SIZE 0x10000000 + +#endif + +/* END */ diff --git a/include/asm-arm/arch-versatile/serial.h b/include/asm-arm/arch-versatile/serial.h new file mode 100644 index 000000000000..f578f8910b3e --- /dev/null +++ b/include/asm-arm/arch-versatile/serial.h @@ -0,0 +1,37 @@ +/* + * linux/include/asm-arm/arch-versatile/serial.h + * + * Copyright (C) 2003 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SERIAL_H +#define __ASM_ARCH_SERIAL_H + +/* + * This assumes you have a 14.7456 MHz clock UART. + */ +#define BASE_BAUD 115200 + + /* UART CLK PORT IRQ FLAGS */ +#define STD_SERIAL_PORT_DEFNS \ + { 0, BASE_BAUD, 0, 0, ASYNC_SKIP_TEST }, /* ttyS0 */ \ + { 0, BASE_BAUD, 0, 0, ASYNC_SKIP_TEST }, /* ttyS1 */ \ + { 0, BASE_BAUD, 0, 0, ASYNC_SKIP_TEST }, /* ttyS2 */ \ + { 0, BASE_BAUD, 0, 0, ASYNC_SKIP_TEST }, /* ttyS3 */ + +#define EXTRA_SERIAL_PORT_DEFNS + +#endif diff --git a/include/asm-arm/arch-versatile/system.h b/include/asm-arm/arch-versatile/system.h new file mode 100644 index 000000000000..8889a189739f --- /dev/null +++ b/include/asm-arm/arch-versatile/system.h @@ -0,0 +1,51 @@ +/* + * linux/include/asm-arm/arch-versatile/system.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include +#include + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +static inline void arch_reset(char mode) +{ + unsigned int hdr_ctrl = (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_RESETCTL_OFFSET); + unsigned int val; + + /* + * To reset, we hit the on-board reset register + * in the system FPGA + */ + val = __raw_readl(hdr_ctrl); + val |= VERSATILE_SYS_CTRL_RESET_CONFIGCLR; + __raw_writel(val, hdr_ctrl); +} + +#endif diff --git a/include/asm-arm/arch-versatile/time.h b/include/asm-arm/arch-versatile/time.h new file mode 100644 index 000000000000..7d97d9565a4b --- /dev/null +++ b/include/asm-arm/arch-versatile/time.h @@ -0,0 +1,158 @@ +/* + * linux/include/asm-arm/arch-versatile/time.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include + +/* + * Where is the timer (VA)? + */ +#define TIMER0_VA_BASE IO_ADDRESS(VERSATILE_TIMER0_1_BASE) +#define TIMER1_VA_BASE (IO_ADDRESS(VERSATILE_TIMER0_1_BASE) + 0x20) +#define TIMER2_VA_BASE IO_ADDRESS(VERSATILE_TIMER2_3_BASE) +#define TIMER3_VA_BASE (IO_ADDRESS(VERSATILE_TIMER2_3_BASE) + 0x20) +#define VA_IC_BASE IO_ADDRESS(VERSATILE_VIC_BASE) + +/* + * How long is the timer interval? + */ +#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10) +#if TIMER_INTERVAL >= 0x100000 +#define TIMER_RELOAD (TIMER_INTERVAL >> 8) /* Divide by 256 */ +#define TIMER_CTRL 0x88 /* Enable, Clock / 256 */ +#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC) +#elif TIMER_INTERVAL >= 0x10000 +#define TIMER_RELOAD (TIMER_INTERVAL >> 4) /* Divide by 16 */ +#define TIMER_CTRL 0x84 /* Enable, Clock / 16 */ +#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC) +#else +#define TIMER_RELOAD (TIMER_INTERVAL) +#define TIMER_CTRL 0x80 /* Enable */ +#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC) +#endif + +#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable */ + +/* + * What does it look like? + */ +typedef struct TimerStruct { + unsigned long TimerLoad; + unsigned long TimerValue; + unsigned long TimerControl; + unsigned long TimerClear; +} TimerStruct_t; + +extern unsigned long (*gettimeoffset)(void); + +/* + * Returns number of ms since last clock interrupt. Note that interrupts + * will have been disabled by do_gettimeoffset() + */ +static unsigned long versatile_gettimeoffset(void) +{ + volatile TimerStruct_t *timer0 = (TimerStruct_t *)TIMER0_VA_BASE; + unsigned long ticks1, ticks2, status; + + /* + * Get the current number of ticks. Note that there is a race + * condition between us reading the timer and checking for + * an interrupt. We get around this by ensuring that the + * counter has not reloaded between our two reads. + */ + ticks2 = timer0->TimerValue & 0xffff; + do { + ticks1 = ticks2; + status = __raw_readl(VA_IC_BASE + VIC_IRQ_RAW_STATUS); + ticks2 = timer0->TimerValue & 0xffff; + } while (ticks2 > ticks1); + + /* + * Number of ticks since last interrupt. + */ + ticks1 = TIMER_RELOAD - ticks2; + + /* + * Interrupt pending? If so, we've reloaded once already. + * + * FIXME: Need to check this is effectively timer 0 that expires + */ + if (status & IRQMASK_TIMERINT0_1) + ticks1 += TIMER_RELOAD; + + /* + * Convert the ticks to usecs + */ + return TICKS2USECS(ticks1); +} + +/* + * IRQ handler for the timer + */ +static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE; + + // ...clear the interrupt + timer0->TimerClear = 1; + + do_leds(); + do_timer(regs); + do_profile(regs); + + return IRQ_HANDLED; +} + +/* + * Set up timer interrupt, and return the current time in seconds. + */ +void __init time_init(void) +{ + volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE; + volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE; + volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE; + volatile TimerStruct_t *timer3 = (volatile TimerStruct_t *)TIMER3_VA_BASE; + + /* + * set clock frequency: + * VERSATILE_REFCLK is 32KHz + * VERSATILE_TIMCLK is 1MHz + */ + *(volatile unsigned int *)IO_ADDRESS(VERSATILE_SCTL_BASE) |= + ((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | + (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel)); + + timer_irq.handler = versatile_timer_interrupt; + + /* + * Initialise to a known state (all timers off) + */ + timer0->TimerControl = 0; + timer1->TimerControl = 0; + timer2->TimerControl = 0; + timer3->TimerControl = 0; + + timer0->TimerLoad = TIMER_RELOAD; + timer0->TimerValue = TIMER_RELOAD; + timer0->TimerControl = TIMER_CTRL | 0x40 | TIMER_CTRL_IE; /* periodic + IE */ + + /* + * Make irqs happen for the system timer + */ + setup_irq(IRQ_TIMERINT0_1, &timer_irq); + gettimeoffset = versatile_gettimeoffset; +} diff --git a/include/asm-arm/arch-versatile/timex.h b/include/asm-arm/arch-versatile/timex.h new file mode 100644 index 000000000000..61da0c6ab38a --- /dev/null +++ b/include/asm-arm/arch-versatile/timex.h @@ -0,0 +1,23 @@ +/* + * linux/include/asm-arm/arch-versatile/timex.h + * + * Versatile PB architecture timex specifications + * + * Copyright (C) 2003 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/include/asm-arm/arch-versatile/uncompress.h b/include/asm-arm/arch-versatile/uncompress.h new file mode 100644 index 000000000000..148ad3755abf --- /dev/null +++ b/include/asm-arm/arch-versatile/uncompress.h @@ -0,0 +1,54 @@ +/* + * linux/include/asm-arm/arch-versatile/uncompress.h + * + * Copyright (C) 2003 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include + +#define AMBA_UART_DR (*(volatile unsigned char *)0x101F1000) +#define AMBA_UART_LCRH (*(volatile unsigned char *)0x101F102C) +#define AMBA_UART_CR (*(volatile unsigned char *)0x101F1030) +#define AMBA_UART_FR (*(volatile unsigned char *)0x101F1018) + +/* + * This does not append a newline + */ +static void puts(const char *s) +{ + while (*s) { + while (AMBA_UART_FR & (1 << 5)) + barrier(); + + AMBA_UART_DR = *s; + + if (*s == '\n') { + while (AMBA_UART_FR & (1 << 5)) + barrier(); + + AMBA_UART_DR = '\r'; + } + s++; + } + while (AMBA_UART_FR & (1 << 3)) + barrier(); +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-versatile/vmalloc.h b/include/asm-arm/arch-versatile/vmalloc.h new file mode 100644 index 000000000000..adfb34829bfc --- /dev/null +++ b/include/asm-arm/arch-versatile/vmalloc.h @@ -0,0 +1,33 @@ +/* + * linux/include/asm-arm/arch-versatile/vmalloc.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x18000000) -- cgit v1.2.3 From d8932719104b259b0c15633d8766c872621eb851 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Wed, 21 Apr 2004 23:34:05 -0700 Subject: [PATCH] remove show_trace_task() It no longer has any callers. --- arch/alpha/kernel/traps.c | 12 ------------ arch/arm26/kernel/traps.c | 12 ------------ arch/cris/kernel/traps.c | 8 -------- arch/h8300/kernel/traps.c | 6 ------ arch/i386/kernel/traps.c | 10 ---------- arch/mips/kernel/traps.c | 5 ----- arch/parisc/kernel/traps.c | 5 ----- arch/ppc64/kernel/process.c | 6 ------ arch/s390/kernel/traps.c | 11 ----------- arch/sh/kernel/traps.c | 6 ------ arch/sparc64/kernel/traps.c | 7 ------- arch/um/kernel/sysrq.c | 11 ----------- arch/v850/kernel/process.c | 7 ------- arch/x86_64/kernel/traps.c | 10 ---------- include/linux/sched.h | 1 - 15 files changed, 117 deletions(-) (limited to 'include') diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c index 8906f66b65e7..52348791ce1e 100644 --- a/arch/alpha/kernel/traps.c +++ b/arch/alpha/kernel/traps.c @@ -137,18 +137,6 @@ dik_show_trace(unsigned long *sp) printk("\n"); } -void show_trace_task(struct task_struct * tsk) -{ - struct thread_info *ti = tsk->thread_info; - unsigned long fp, sp = ti->pcb.ksp, base = (unsigned long) ti; - - if (sp > base && sp+6*8 < base + 16*1024) { - fp = ((unsigned long*)sp)[6]; - if (fp > sp && fp < base + 16*1024) - dik_show_trace((unsigned long *)fp); - } -} - static int kstack_depth_to_print = 24; void show_stack(struct task_struct *task, unsigned long *sp) diff --git a/arch/arm26/kernel/traps.c b/arch/arm26/kernel/traps.c index d2ffd9016c07..f0a49fec0d9e 100644 --- a/arch/arm26/kernel/traps.c +++ b/arch/arm26/kernel/traps.c @@ -165,18 +165,6 @@ void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) c_backtrace(fp, processor_mode(regs)); } -/* - * This is called from SysRq-T (show_task) to display the current - * call trace for each process. Very useful. - */ -void show_trace_task(struct task_struct *tsk) -{ - if (tsk != current) { - unsigned int fp = thread_saved_fp(tsk); - c_backtrace(fp, 0x10); - } -} - /* FIXME - this is probably wrong.. */ void show_stack(struct task_struct *task, unsigned long *sp) { dump_mem("Stack: ", (unsigned long)sp, 8192+(unsigned long)task->thread_info); diff --git a/arch/cris/kernel/traps.c b/arch/cris/kernel/traps.c index 2a757b825c44..d9e6565655f4 100644 --- a/arch/cris/kernel/traps.c +++ b/arch/cris/kernel/traps.c @@ -60,14 +60,6 @@ void show_trace(unsigned long * stack) } } -void show_trace_task(struct task_struct *tsk) -{ - /* TODO, this is not really useful since its called from - * SysRq-T and we don't have a keyboard.. :) - */ -} - - /* * These constants are for searching for possible module text * segments. MODULE_RANGE is a guess of how much space is likely diff --git a/arch/h8300/kernel/traps.c b/arch/h8300/kernel/traps.c index 300e3279ca5a..253c87bc5b32 100644 --- a/arch/h8300/kernel/traps.c +++ b/arch/h8300/kernel/traps.c @@ -156,14 +156,8 @@ void show_stack(struct task_struct *task, unsigned long *esp) printk("\n"); } -void show_trace_task(struct task_struct *tsk) -{ - show_stack(tsk,(unsigned long *)tsk->thread.esp0); -} - void dump_stack(void) { show_stack(NULL,NULL); } - EXPORT_SYMBOL(dump_stack); diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c index cf8da7ba4cdb..c770d878cbcf 100644 --- a/arch/i386/kernel/traps.c +++ b/arch/i386/kernel/traps.c @@ -123,16 +123,6 @@ void show_trace(struct task_struct *task, unsigned long * stack) printk("\n"); } -void show_trace_task(struct task_struct *tsk) -{ - unsigned long esp = tsk->thread.esp; - - /* User space on another CPU? */ - if ((esp ^ (unsigned long)tsk->thread_info) & ~(THREAD_SIZE - 1)) - return; - show_trace(tsk, (unsigned long *)esp); -} - void show_stack(struct task_struct *task, unsigned long *esp) { unsigned long *stack; diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index d72026927fec..752dbd3e93fb 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -126,11 +126,6 @@ void show_trace(struct task_struct *task, unsigned long *stack) printk("\n"); } -void show_trace_task(struct task_struct *tsk) -{ - show_trace(tsk, (long *)tsk->thread.reg29); -} - /* * The architecture-independent dump_stack generator */ diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c index f83053a37644..6f1f6f738d6c 100644 --- a/arch/parisc/kernel/traps.c +++ b/arch/parisc/kernel/traps.c @@ -202,11 +202,6 @@ void show_trace(struct task_struct *task, unsigned long *stack) printk("\n"); } -void show_trace_task(struct task_struct *tsk) -{ - show_trace(tsk, (unsigned long *)tsk->thread.regs.ksp); -} - void die_if_kernel(char *str, struct pt_regs *regs, long err) { if (user_mode(regs)) { diff --git a/arch/ppc64/kernel/process.c b/arch/ppc64/kernel/process.c index f74b14d7e58e..7c153dc24895 100644 --- a/arch/ppc64/kernel/process.c +++ b/arch/ppc64/kernel/process.c @@ -536,10 +536,4 @@ void dump_stack(void) { show_stack(current, (unsigned long *)__get_SP()); } - EXPORT_SYMBOL(dump_stack); - -void show_trace_task(struct task_struct *tsk) -{ - show_stack(tsk, (unsigned long *)tsk->thread.ksp); -} diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c index d778f98a2c7c..016eb6cd48c9 100644 --- a/arch/s390/kernel/traps.c +++ b/arch/s390/kernel/traps.c @@ -105,17 +105,6 @@ void show_trace(struct task_struct *task, unsigned long * stack) printk("\n"); } -void show_trace_task(struct task_struct *tsk) -{ - /* - * We can't print the backtrace of a running process. It is - * unreliable at best and can cause kernel oopses. - */ - if (tsk->state == TASK_RUNNING) - return; - show_trace(tsk, (unsigned long *) tsk->thread.ksp); -} - void show_stack(struct task_struct *task, unsigned long *sp) { unsigned long *stack; diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c index 5211a375afa8..3e63d8a70ed3 100644 --- a/arch/sh/kernel/traps.c +++ b/arch/sh/kernel/traps.c @@ -705,14 +705,8 @@ void show_task(unsigned long *sp) show_stack(NULL, sp); } -void show_trace_task(struct task_struct *tsk) -{ - show_task((unsigned long *)tsk->thread.sp); -} - void dump_stack(void) { show_stack(NULL, NULL); } - EXPORT_SYMBOL(dump_stack); diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c index 3cf8af39ac95..47d685193ade 100644 --- a/arch/sparc64/kernel/traps.c +++ b/arch/sparc64/kernel/traps.c @@ -1760,13 +1760,6 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp) #endif } -void show_trace_task(struct task_struct *tsk) -{ - if (tsk) - show_stack(tsk, - (unsigned long *) tsk->thread_info->ksp); -} - void dump_stack(void) { unsigned long *ksp; diff --git a/arch/um/kernel/sysrq.c b/arch/um/kernel/sysrq.c index 078dc11132d3..ce108f7d6971 100644 --- a/arch/um/kernel/sysrq.c +++ b/arch/um/kernel/sysrq.c @@ -42,19 +42,8 @@ void dump_stack(void) show_trace(&stack); } - EXPORT_SYMBOL(dump_stack); -void show_trace_task(struct task_struct *tsk) -{ - unsigned long esp = PT_REGS_SP(&tsk->thread.regs); - - /* User space on another CPU? */ - if ((esp ^ (unsigned long)tsk) & (PAGE_MASK<<1)) - return; - show_trace((unsigned long *)esp); -} - /* * Overrides for Emacs so that we follow Linus's tabbing style. * Emacs will notice this stuff at the end of the file and automatically diff --git a/arch/v850/kernel/process.c b/arch/v850/kernel/process.c index 977d75772d81..2fccb4cc7b82 100644 --- a/arch/v850/kernel/process.c +++ b/arch/v850/kernel/process.c @@ -234,10 +234,3 @@ unsigned long get_wchan (struct task_struct *p) return 0; } - -void show_trace_task (struct task_struct *t) -{ - /* blarg XXX */ - printk ("show_trace_task: KSP = 0x%lx, USP = 0x%lx, UPC = 0x%lx\n", - t->thread.ksp, KSTK_ESP (t), KSTK_EIP (t)); -} diff --git a/arch/x86_64/kernel/traps.c b/arch/x86_64/kernel/traps.c index 5afe235c0474..2efdbaa1ecfa 100644 --- a/arch/x86_64/kernel/traps.c +++ b/arch/x86_64/kernel/traps.c @@ -197,16 +197,6 @@ void show_trace(unsigned long *stack) printk("\n"); } -void show_trace_task(struct task_struct *tsk) -{ - unsigned long rsp = tsk->thread.rsp; - - /* User space on another CPU? */ - if ((rsp ^ (unsigned long)tsk->thread_info) & (PAGE_MASK<<1)) - return; - show_trace((unsigned long *)rsp); -} - void show_stack(struct task_struct *tsk, unsigned long * rsp) { unsigned long *stack; diff --git a/include/linux/sched.h b/include/linux/sched.h index 428b48964fc8..e414003e872b 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -151,7 +151,6 @@ extern void init_idle(task_t *idle, int cpu); extern void show_state(void); extern void show_regs(struct pt_regs *); -extern void show_trace_task(task_t *tsk); /* * TASK is a pointer to the task whose backtrace we want to see (or NULL for current -- cgit v1.2.3 From e5c7f247d6701be52bb10044db6dfbb1099135e4 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Wed, 21 Apr 2004 23:36:19 -0700 Subject: [PATCH] dynamic proc cleanups From: Matt Mackall Delete obsolete comment and kill test of obsolete define. --- arch/alpha/kernel/irq.c | 14 +++++--------- include/linux/proc_fs.h | 2 -- 2 files changed, 5 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index 0e317230f81e..c51bf8dbfc8a 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c @@ -415,16 +415,12 @@ init_irq_proc (void) #endif /* - * Create entries for all existing IRQs. If the number of IRQs - * is greater the 1/4 the total dynamic inode space for /proc, - * don't pollute the inode space + * Create entries for all existing IRQs. */ - if (ACTUAL_NR_IRQS < (PROC_NDYNAMIC / 4)) { - for (i = 0; i < ACTUAL_NR_IRQS; i++) { - if (irq_desc[i].handler == &no_irq_type) - continue; - register_irq_proc(i); - } + for (i = 0; i < ACTUAL_NR_IRQS; i++) { + if (irq_desc[i].handler == &no_irq_type) + continue; + register_irq_proc(i); } } diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h index 0b12bd800fd1..2d439a8390c0 100644 --- a/include/linux/proc_fs.h +++ b/include/linux/proc_fs.h @@ -24,8 +24,6 @@ enum { PROC_ROOT_INO = 1, }; -/* Finally, the dynamically allocatable proc entries are reserved: */ - #define PROC_SUPER_MAGIC 0x9fa0 /* -- cgit v1.2.3 From 39b000cfc34206b2a2a55644859dd7a7fd4b1bb5 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Wed, 21 Apr 2004 23:37:51 -0700 Subject: [PATCH] Set ARCH_MIN_TASKALIGN on ppc32 From: Benjamin Herrenschmidt From: David Woodhouse Without this the task struct gets unaligned when using SLAB_DEBUG, causing random problems with FP and Altivec. --- include/asm-ppc/processor.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index e7c7fd2265cd..0439ec64301c 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -121,6 +121,8 @@ struct thread_struct { #endif /* CONFIG_ALTIVEC */ }; +#define ARCH_MIN_TASKALIGN 16 + #define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) #define INIT_THREAD { \ -- cgit v1.2.3 From 32419a40f3a9a700dba410e717476c67f79b2b0e Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Wed, 21 Apr 2004 23:38:04 -0700 Subject: [PATCH] sunrpc rmmod oops fix From: "J. Bruce Fields" Unregister svcauth_gss caches on exit from gss module; fixes an oops on rmmod. --- include/linux/sunrpc/svcauth_gss.h | 1 + net/sunrpc/auth_gss/auth_gss.c | 1 + net/sunrpc/auth_gss/svcauth_gss.c | 7 +++++++ 3 files changed, 9 insertions(+) (limited to 'include') diff --git a/include/linux/sunrpc/svcauth_gss.h b/include/linux/sunrpc/svcauth_gss.h index a444c9edb9e9..3a2206f61de0 100644 --- a/include/linux/sunrpc/svcauth_gss.h +++ b/include/linux/sunrpc/svcauth_gss.h @@ -20,6 +20,7 @@ #include int gss_svc_init(void); +void gss_svc_shutdown(void); int svcauth_gss_register_pseudoflavor(u32 pseudoflavor, char * name); #endif /* __KERNEL__ */ diff --git a/net/sunrpc/auth_gss/auth_gss.c b/net/sunrpc/auth_gss/auth_gss.c index b1b922f09257..971124109c8c 100644 --- a/net/sunrpc/auth_gss/auth_gss.c +++ b/net/sunrpc/auth_gss/auth_gss.c @@ -984,6 +984,7 @@ out: static void __exit exit_rpcsec_gss(void) { + gss_svc_shutdown(); gss_mech_unregister_all(); rpcauth_unregister(&authgss_ops); } diff --git a/net/sunrpc/auth_gss/svcauth_gss.c b/net/sunrpc/auth_gss/svcauth_gss.c index a60a541e9f5e..dae18e9792a6 100644 --- a/net/sunrpc/auth_gss/svcauth_gss.c +++ b/net/sunrpc/auth_gss/svcauth_gss.c @@ -1063,3 +1063,10 @@ gss_svc_init(void) svc_auth_register(RPC_AUTH_GSS, &svcauthops_gss); return 0; } + +void +gss_svc_shutdown(void) +{ + cache_unregister(&rsc_cache); + cache_unregister(&rsi_cache); +} -- cgit v1.2.3 From f377a8228fed60be22b1483fe92f23f5f3ffbc8c Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Wed, 21 Apr 2004 23:38:29 -0700 Subject: [PATCH] ppc64: Set ARCH_MIN_TASKALIGN From: Benjamin Herrenschmidt We need some alignement of those structs for proper operations especially with FP and Altivec, or SLAB_DEBUG can break us. --- include/asm-ppc64/processor.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h index ea8bf67f7007..d3e83108c064 100644 --- a/include/asm-ppc64/processor.h +++ b/include/asm-ppc64/processor.h @@ -553,6 +553,8 @@ struct thread_struct { #endif /* CONFIG_ALTIVEC */ }; +#define ARCH_MIN_TASKALIGN 16 + #define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) #define INIT_THREAD { \ -- cgit v1.2.3