From a6560a26b8bed3ff000f77cdf77789657d94cd8b Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 25 Feb 2002 10:24:56 +0000 Subject: Clean up ARM TLB handling code; previously there was a lot of code replication across each processor type, each handling alignment of addresses slightly differently. We unify this mess, and allow for greater flexibility in the per-CPU architecture TLB handlers. We also start to remove the ARM cache.h -> cpu_*.h -> proc-fns.h mess making the code cleaner and easier to follow. Documentation describing the expected behaviour of each TLB function for the 32-bit ARM processors is also included. --- include/asm-arm/cpu-multi32.h | 19 ------ include/asm-arm/cpu-single.h | 7 -- include/asm-arm/glue.h | 78 +++++++++++++++++++++ include/asm-arm/proc-armv/cache.h | 138 ++++++++++++++++++++++++-------------- include/asm-arm/procinfo.h | 10 +-- 5 files changed, 170 insertions(+), 82 deletions(-) create mode 100644 include/asm-arm/glue.h (limited to 'include') diff --git a/include/asm-arm/cpu-multi32.h b/include/asm-arm/cpu-multi32.h index c7ce093e2085..9db83322ea54 100644 --- a/include/asm-arm/cpu-multi32.h +++ b/include/asm-arm/cpu-multi32.h @@ -93,21 +93,6 @@ extern struct processor { void (*invalidate_page)(void *virt_page); } icache; - struct { /* TLB */ - /* - * flush all TLBs - */ - void (*invalidate_all)(void); - /* - * flush a specific TLB - */ - void (*invalidate_range)(unsigned long address, unsigned long end); - /* - * flush a specific TLB - */ - void (*invalidate_page)(unsigned long address, int flags); - } tlb; - struct { /* PageTable */ /* * Set the page table @@ -152,10 +137,6 @@ extern const struct processor sa110_processor_functions; #define cpu_icache_invalidate_range(s,e) processor.icache.invalidate_range(s,e) #define cpu_icache_invalidate_page(vp) processor.icache.invalidate_page(vp) -#define cpu_tlb_invalidate_all() processor.tlb.invalidate_all() -#define cpu_tlb_invalidate_range(s,e) processor.tlb.invalidate_range(s,e) -#define cpu_tlb_invalidate_page(vp,f) processor.tlb.invalidate_page(vp,f) - #define cpu_set_pgd(pgd) processor.pgtable.set_pgd(pgd) #define cpu_set_pmd(pmdp, pmd) processor.pgtable.set_pmd(pmdp, pmd) #define cpu_set_pte(ptep, pte) processor.pgtable.set_pte(ptep, pte) diff --git a/include/asm-arm/cpu-single.h b/include/asm-arm/cpu-single.h index 9742554641b7..6f794bb570fe 100644 --- a/include/asm-arm/cpu-single.h +++ b/include/asm-arm/cpu-single.h @@ -37,9 +37,6 @@ #define cpu_dcache_clean_entry __cpu_fn(CPU_NAME,_dcache_clean_entry) #define cpu_icache_invalidate_range __cpu_fn(CPU_NAME,_icache_invalidate_range) #define cpu_icache_invalidate_page __cpu_fn(CPU_NAME,_icache_invalidate_page) -#define cpu_tlb_invalidate_all __cpu_fn(CPU_NAME,_tlb_invalidate_all) -#define cpu_tlb_invalidate_range __cpu_fn(CPU_NAME,_tlb_invalidate_range) -#define cpu_tlb_invalidate_page __cpu_fn(CPU_NAME,_tlb_invalidate_page) #define cpu_set_pgd __cpu_fn(CPU_NAME,_set_pgd) #define cpu_set_pmd __cpu_fn(CPU_NAME,_set_pmd) #define cpu_set_pte __cpu_fn(CPU_NAME,_set_pte) @@ -73,10 +70,6 @@ extern void cpu_dcache_clean_entry(unsigned long address); extern void cpu_icache_invalidate_range(unsigned long start, unsigned long end); extern void cpu_icache_invalidate_page(void *virt_page); -extern void cpu_tlb_invalidate_all(void); -extern void cpu_tlb_invalidate_range(unsigned long address, unsigned long end); -extern void cpu_tlb_invalidate_page(unsigned long address, int flags); - extern void cpu_set_pgd(unsigned long pgd_phys); extern void cpu_set_pmd(pmd_t *pmdp, pmd_t pmd); extern void cpu_set_pte(pte_t *ptep, pte_t pte); diff --git a/include/asm-arm/glue.h b/include/asm-arm/glue.h new file mode 100644 index 000000000000..a4f098d8aabb --- /dev/null +++ b/include/asm-arm/glue.h @@ -0,0 +1,78 @@ +/* + * linux/include/asm-arm/glue.h + * + * Copyright (C) 1997-1999 Russell King + * Copyright (C) 2000-2002 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This file provides the glue to stick the processor-specific bits + * into the kernel in an efficient manner. The idea is to use branches + * when we're only targetting one class of TLB, or indirect calls + * when we're targetting multiple classes of TLBs. + */ +#ifdef __KERNEL__ + +#include + +#ifdef __STDC__ +#define ____glue(name,fn) name##fn +#else +#define ____glue(name,fn) name/**/fn +#endif +#define __glue(name,fn) ____glue(name,fn) + +/* + * Select MMU TLB handling. + */ + +/* + * ARMv3 MMU + */ +#undef _TLB +#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) +# ifdef _TLB +# define MULTI_TLB 1 +# else +# define _TLB v3 +# endif +#endif + +/* + * ARMv4 MMU without write buffer + */ +#if defined(CONFIG_CPU_ARM720T) +# ifdef _TLB +# define MULTI_TLB 1 +# else +# define _TLB v4 +# endif +#endif + +/* + * ARMv4 MMU with write buffer, with invalidate I TLB entry instruction + */ +#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ + defined(CONFIG_CPU_ARM926T) || defined(CONFIG_CPU_ARM1020) || \ + defined(CONFIG_CPU_XSCALE) +# ifdef _TLB +# define MULTI_TLB 1 +# else +# define _TLB v4wbi +# endif +#endif + +/* + * ARMv4 MMU with write buffer, without invalidate I TLB entry instruction + */ +#if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100) +# ifdef _TLB +# define MULTI_TLB 1 +# else +# define _TLB v4wb +# endif +#endif + +#endif diff --git a/include/asm-arm/proc-armv/cache.h b/include/asm-arm/proc-armv/cache.h index 2f5f206fc43c..c73f03773594 100644 --- a/include/asm-arm/proc-armv/cache.h +++ b/include/asm-arm/proc-armv/cache.h @@ -8,6 +8,7 @@ * published by the Free Software Foundation. */ #include +#include /* * This flag is used to indicate that the page pointed to by a pte @@ -200,69 +201,93 @@ static inline void flush_icache_page(struct vm_area_struct *vma, struct page *pa } while (0) /* - * Old ARM MEMC stuff. This supports the reversed mapping handling that - * we have on the older 26-bit machines. We don't have a MEMC chip, so... - */ -#define memc_update_all() do { } while (0) -#define memc_update_mm(mm) do { } while (0) -#define memc_update_addr(mm,pte,log) do { } while (0) -#define memc_clear(mm,physaddr) do { } while (0) - -/* - * TLB flushing. + * TLB Management + * ============== + * + * The arch/arm/mm/tlb-*.S files implement this methods. + * + * The TLB specific code is expected to perform whatever tests it + * needs to determine if it should invalidate the TLB for each + * call. Start addresses are inclusive and end addresses are + * exclusive; it is safe to round these addresses down. + * + * flush_tlb_all() + * + * Invalidate the entire TLB. * - * - flush_tlb_all() flushes all processes TLBs - * - flush_tlb_mm(mm) flushes the specified mm context TLB's - * - flush_tlb_page(vma, vmaddr) flushes TLB for specified page - * - flush_tlb_range(vma, start, end) flushes TLB for specified range of pages + * flush_tlb_mm(mm) * - * We drain the write buffer in here to ensure that the page tables in ram - * are really up to date. It is more efficient to do this here... + * Invalidate all TLB entries in a particular address + * space. + * - mm - mm_struct describing address space + * + * flush_tlb_range(mm,start,end) + * + * Invalidate a range of TLB entries in the specified + * address space. + * - mm - mm_struct describing address space + * - start - start address (may not be aligned) + * - end - end address (exclusive, may not be aligned) + * + * flush_tlb_page(vaddr,vma) + * + * Invalidate the specified page in the specified address range. + * - vaddr - virtual address (may not be aligned) + * - vma - vma_struct describing address range + * + * flush_kern_tlb_page(kaddr) + * + * Invalidate the TLB entry for the specified page. The address + * will be in the kernels virtual memory space. Current uses + * only require the D-TLB to be invalidated. + * - kaddr - Kernel virtual memory address */ -/* - * Notes: - * current->active_mm is the currently active memory description. - * current->mm == NULL iff we are lazy. - */ -#define flush_tlb_all() \ - do { \ - cpu_tlb_invalidate_all(); \ - } while (0) +struct cpu_tlb_fns { + void (*flush_kern_all)(void); + void (*flush_user_mm)(struct mm_struct *); + void (*flush_user_range)(unsigned long, unsigned long, struct vm_area_struct *); + void (*flush_user_page)(unsigned long, struct vm_area_struct *); + void (*flush_kern_page)(unsigned long); +}; /* - * Flush all user virtual address space translations described by `_mm'. - * - * Currently, this is always called for current->mm, which should be - * the same as current->active_mm. This is currently not be called for - * the lazy TLB case. + * Convert calls to our calling convention. */ -#define flush_tlb_mm(_mm) \ - do { \ - if ((_mm) == current->active_mm) \ - cpu_tlb_invalidate_all(); \ - } while (0) +#define flush_tlb_all() __cpu_flush_kern_tlb_all() +#define flush_tlb_mm(mm) __cpu_flush_user_tlb_mm(mm) +#define flush_tlb_range(vma,start,end) __cpu_flush_user_tlb_range(start,end,vma) +#define flush_tlb_page(vma,vaddr) __cpu_flush_user_tlb_page(vaddr,vma) +#define flush_kern_tlb_page(kaddr) __cpu_flush_kern_tlb_page(kaddr) /* - * Flush the specified range of user virtual address space translations. - * - * _mm may not be current->active_mm, but may not be NULL. + * Now select the calling method */ -#define flush_tlb_range(_vma,_start,_end) \ - do { \ - if ((_mm)->vm_mm == current->active_mm) \ - cpu_tlb_invalidate_range((_start), (_end)); \ - } while (0) +#ifdef MULTI_TLB -/* - * Flush the specified user virtual address space translation. - */ -#define flush_tlb_page(_vma,_page) \ - do { \ - if ((_vma)->vm_mm == current->active_mm) \ - cpu_tlb_invalidate_page((_page), \ - ((_vma)->vm_flags & VM_EXEC)); \ - } while (0) +extern struct cpu_tlb_fns cpu_tlb; + +#define __cpu_flush_kern_tlb_all cpu_tlb.flush_kern_all +#define __cpu_flush_user_tlb_mm cpu_tlb.flush_user_mm +#define __cpu_flush_user_tlb_range cpu_tlb.flush_user_range +#define __cpu_flush_user_tlb_page cpu_tlb.flush_user_page +#define __cpu_flush_kern_tlb_page cpu_tlb.flush_kern_page + +#else + +#define __cpu_flush_kern_tlb_all __glue(_TLB,_flush_kern_tlb_all) +#define __cpu_flush_user_tlb_mm __glue(_TLB,_flush_user_tlb_mm) +#define __cpu_flush_user_tlb_range __glue(_TLB,_flush_user_tlb_range) +#define __cpu_flush_user_tlb_page __glue(_TLB,_flush_user_tlb_page) +#define __cpu_flush_kern_tlb_page __glue(_TLB,_flush_kern_tlb_page) + +extern void __cpu_flush_kern_tlb_all(void); +extern void __cpu_flush_user_tlb_mm(struct mm_struct *); +extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, struct vm_area_struct *); +extern void __cpu_flush_user_tlb_page(unsigned long, struct vm_area_struct *); +extern void __cpu_flush_kern_tlb_page(unsigned long); + +#endif /* * if PG_dcache_dirty is set for the page, we need to ensure that any @@ -270,3 +295,12 @@ static inline void flush_icache_page(struct vm_area_struct *vma, struct page *pa * back to the page. */ extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte); + +/* + * Old ARM MEMC stuff. This supports the reversed mapping handling that + * we have on the older 26-bit machines. We don't have a MEMC chip, so... + */ +#define memc_update_all() do { } while (0) +#define memc_update_mm(mm) do { } while (0) +#define memc_update_addr(mm,pte,log) do { } while (0) +#define memc_clear(mm,physaddr) do { } while (0) diff --git a/include/asm-arm/procinfo.h b/include/asm-arm/procinfo.h index 4411a5d1f5a3..dda78d4e7156 100644 --- a/include/asm-arm/procinfo.h +++ b/include/asm-arm/procinfo.h @@ -14,6 +14,9 @@ #include +struct cpu_tlb_fns; +struct processor; + struct proc_info_item { const char *manufacturer; const char *cpu_name; @@ -37,15 +40,14 @@ struct proc_info_list { const char *elf_name; unsigned int elf_hwcap; struct proc_info_item *info; -#ifdef MULTI_CPU struct processor *proc; -#else - void *unused; -#endif + struct cpu_tlb_fns *tlb; }; #endif /* __ASSEMBLY__ */ +#define PROC_INFO_SZ 40 + #define HWCAP_SWP 1 #define HWCAP_HALF 2 #define HWCAP_THUMB 4 -- cgit v1.2.3 From ba1074cf33661e5026b7434176b363001828ede6 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 25 Feb 2002 15:41:20 +0000 Subject: ARM preempt and scheduler fixups for 2.5.5 --- arch/arm/kernel/entry-armv.S | 17 ++++++++++------- arch/arm/kernel/entry-common.S | 7 ++----- arch/arm/kernel/head.S | 2 +- include/asm-arm/bitops.h | 17 +++++++++++++++++ include/asm-arm/mmu_context.h | 23 ----------------------- include/asm-arm/page.h | 15 +++++++++++++-- include/asm-arm/system.h | 4 ++-- 7 files changed, 45 insertions(+), 40 deletions(-) (limited to 'include') diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index e5c15ce45edf..bab87ea3d69f 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -734,19 +734,22 @@ preempt_return: ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr #ifdef CONFIG_PREEMPT -svc_preempt: teq r9, #0 - movne pc, lr +svc_preempt: teq r9, #0 @ was preempt count = 0 + movne pc, lr @ no ldr r0, [r6, #4] @ local_irq_count - ldr r1, [r6, #8] @ local_b_count + ldr r1, [r6, #8] @ local_bh_count adds r0, r0, r1 movne pc, lr -1: set_cpsr_c r0, #MODE_SVC @ enable IRQs - bl SYMBOL_NAME(preempt_schedule) + ldr r1, [r8, #TI_TASK] + set_cpsr_c r2, #MODE_SVC @ enable IRQs + str r0, [r1, #0] @ current->state = TASK_RUNNING +1: bl SYMBOL_NAME(schedule) set_cpsr_c r0, #PSR_I_BIT | MODE_SVC @ disable IRQs ldr r0, [r8, #TI_FLAGS] tst r0, #_TIF_NEED_RESCHED - bne 1b - b preempt_return + beq preempt_return + set_cpsr_c r0, #MODE_SVC @ enable IRQs + b 1b #endif .align 5 diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 9dd36ce59501..8d1566adbcbf 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -55,7 +55,7 @@ work_resched: */ ENTRY(ret_to_user) ret_slow_syscall: - set_cpsr_c r1, #PSR_I_BIT | MODE_SVC + set_cpsr_c r1, #PSR_I_BIT | MODE_SVC @ disable interrupts ldr r1, [tsk, #TI_FLAGS] tst r1, #_TIF_WORK_MASK beq no_work_pending @@ -73,12 +73,9 @@ __do_notify_resume: b SYMBOL_NAME(do_notify_resume) @ note the bl above sets lr /* - * This is how we return from a fork. __switch_to will be calling us - * with r0 pointing at the previous task that was running (ready for - * calling schedule_tail). + * This is how we return from a fork. */ ENTRY(ret_from_fork) - bl SYMBOL_NAME(schedule_tail) get_thread_info tsk ldr ip, [tsk, #TI_FLAGS] @ check for syscall tracing mov why, #1 diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index d0910b161789..c74b795c91cb 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -127,7 +127,7 @@ __entry: mov r1, #MACH_TYPE_L7200 #endif - mov r0, #F_BIT | I_BIT | MODE_SVC @ make sure svc mode + mov r0, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ make sure svc mode msr cpsr_c, r0 @ and all irqs disabled bl __lookup_processor_type teq r10, #0 @ invalid processor? diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h index ecdd955a8381..c5c8a24a4566 100644 --- a/include/asm-arm/bitops.h +++ b/include/asm-arm/bitops.h @@ -326,6 +326,23 @@ static inline unsigned long __ffs(unsigned long word) #define ffs(x) generic_ffs(x) +/* + * Find first bit set in a 168-bit bitmap, where the first + * 128 bits are unlikely to be set. + */ +static inline int sched_find_first_bit(unsigned long *b) +{ + if (unlikely(b[0])) + return __ffs(b[0]); + if (unlikely(b[1])) + return __ffs(b[1]) + 32; + if (unlikely(b[2])) + return __ffs(b[2]) + 64; + if (b[3]) + return __ffs(b[3]) + 96; + return __ffs(b[4]) + 128; +} + /* * hweightN: returns the hamming weight (i.e. the number * of bits set) of a N-bit word diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h index 0acf4d89c965..99e10958bc4c 100644 --- a/include/asm-arm/mmu_context.h +++ b/include/asm-arm/mmu_context.h @@ -49,27 +49,4 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, #define activate_mm(prev, next) \ switch_mm((prev),(next),NULL,smp_processor_id()) -/* - * Find first bit set in a 168-bit bitmap, where the first - * 128 bits are unlikely to be set. - */ -static inline int sched_find_first_bit(unsigned long *b) -{ -#if MAX_RT_PRIO != 128 || MAX_PRIO != 168 -#error update this function -#endif - - if (unlikely(b[0])) - return __ffs(b[0]); - if (unlikely(b[1])) - return __ffs(b[1]) + 32; - if (unlikely(b[2])) - return __ffs(b[2]) + 64; - if (unlikely(b[3])) - return __ffs(b[3]) + 96; - if (b[4]) - return __ffs(b[4]) + MAX_RT_PRIO; - return __ffs(b[5]) + 32 + MAX_RT_PRIO; -} - #endif diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h index f08e9fcdd70d..f9d7f956f40a 100644 --- a/include/asm-arm/page.h +++ b/include/asm-arm/page.h @@ -14,8 +14,19 @@ #define clear_page(page) memzero((void *)(page), PAGE_SIZE) extern void copy_page(void *to, void *from); -#define clear_user_page(page, vaddr) cpu_clear_user_page(page,vaddr) -#define copy_user_page(to, from, vaddr) cpu_copy_user_page(to,from,vaddr) +#define clear_user_page(addr,vaddr) \ + do { \ + preempt_disable(); \ + cpu_clear_user_page(addr, vaddr); \ + preempt_enable(); \ + } while (0) + +#define copy_user_page(to,from,vaddr) \ + do { \ + preempt_disable(); \ + cpu_copy_user_page(to, from, vaddr); \ + preempt_enable(); \ + } while (0) #ifdef STRICT_MM_TYPECHECKS /* diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 0107b073abf5..b317ffcd1ec5 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -53,9 +53,9 @@ extern asmlinkage void __backtrace(void); struct thread_info; extern struct task_struct *__switch_to(struct thread_info *, struct thread_info *); -#define switch_to(prev,next,last) \ +#define switch_to(prev,next) \ do { \ - last = __switch_to(prev->thread_info,next->thread_info); \ + __switch_to(prev->thread_info,next->thread_info); \ mb(); \ } while (0) -- cgit v1.2.3 From 1ea95bdc4aadc0d7b5f540bc83e2d6208eae6be5 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 25 Feb 2002 17:22:37 +0000 Subject: Numerous ARM build fixes, small updates and cleanups. --- arch/arm/Makefile | 1 + arch/arm/kernel/debug.S | 35 ++++++++++--- arch/arm/kernel/ptrace.c | 52 ++++++++++++------- arch/arm/kernel/setup.c | 6 +-- arch/arm/kernel/signal.c | 8 ++- arch/arm/kernel/traps.c | 2 +- arch/arm/lib/ecard.S | 2 +- arch/arm/lib/io-acorn.S | 2 +- arch/arm/mach-arc/dma.c | 13 +++-- arch/arm/mach-footbridge/netwinder-hw.c | 2 +- arch/arm/mach-integrator/pci.c | 2 +- arch/arm/mach-integrator/pci_v3.c | 74 +++++++++++++++------------ arch/arm/mach-iop310/iop310-pci.c | 88 +++++++++++++++++++-------------- arch/arm/mach-rpc/dma.c | 7 ++- arch/arm/mach-sa1100/h3600.c | 18 +++---- arch/arm/mach-sa1100/jornada720.c | 2 +- arch/arm/mach-sa1100/pm.c | 14 ++---- arch/arm/mm/fault-armv.c | 64 ++++++++++++------------ arch/arm/mm/fault-common.c | 10 ++-- arch/arm/tools/mach-types | 18 +++++-- include/asm-arm/arch-sa1100/assabet.h | 2 +- include/asm-arm/io.h | 6 +-- include/asm-arm/mmu.h | 4 +- include/asm-arm/pci.h | 24 ++------- 24 files changed, 264 insertions(+), 192 deletions(-) (limited to 'include') diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4d6086874d47..75217d03ece5 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -215,6 +215,7 @@ CLEAN_FILES += \ arch/arm/vmlinux.lds MRPROPER_FILES += \ + arch/arm/tools/constants.h* \ include/asm-arm/arch \ include/asm-arm/proc \ include/asm-arm/constants.h* \ diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index 43953f66e038..0235cfea51fd 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -164,28 +164,49 @@ .endm #elif defined(CONFIG_ARCH_SA1100) + .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? moveq \rx, #0x80000000 @ physical base address movne \rx, #0xf8000000 @ virtual address - @add \rx, \rx, #0x00050000 @ Ser3 - add \rx, \rx, #0x00010000 @ Ser1 + + @ We probe for the active serial port here, coherently with + @ the comment in include/asm-arm/arch-sa1100/uncompress.h. + @ We assume r1 can be clobbered. + + @ see if Ser3 is active + add \rx, \rx, #0x00050000 + ldr r1, [\rx, #UTCR3] + tst r1, #UTCR3_TXE + + @ if Ser3 is inactive, then try Ser1 + addeq \rx, \rx, #(0x00010000 - 0x00050000) + ldreq r1, [\rx, #UTCR3] + tsteq r1, #UTCR3_TXE + + @ if Ser1 is inactive, then try Ser2 + addeq \rx, \rx, #(0x00030000 - 0x00010000) + ldreq r1, [\rx, #UTCR3] + tsteq r1, #UTCR3_TXE + + @ if all ports are inactive, then there is nothing we can do + moveq pc, lr .endm .macro senduart,rd,rx - str \rd, [\rx, #0x14] @ UTDR + str \rd, [\rx, #UTDR] .endm .macro waituart,rd,rx -1001: ldr \rd, [\rx, #0x20] @ UTSR1 - tst \rd, #1 << 2 @ UTSR1_TNF +1001: ldr \rd, [\rx, #UTSR1] + tst \rd, #UTSR1_TNF beq 1001b .endm .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #0x20] @ UTSR1 - tst \rd, #1 << 0 @ UTSR1_TBY +1001: ldr \rd, [\rx, #UTSR1] + tst \rd, #UTSR1_TBY bne 1001b .endm diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index 5128ad63f8ee..1d380fc2d692 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c @@ -34,7 +34,7 @@ /* * Breakpoint SWI instruction: SWI &9F0001 */ -#define BREAKINST 0xef9f0001 +#define BREAKINST_ARM 0xef9f0001 /* * Get the address of the live pt_regs for the specified task. @@ -183,6 +183,20 @@ ptrace_getldrop2(struct task_struct *child, unsigned long insn) return val; } +#define OP_MASK 0x01e00000 +#define OP_AND 0x00000000 +#define OP_EOR 0x00200000 +#define OP_SUB 0x00400000 +#define OP_RSB 0x00600000 +#define OP_ADD 0x00800000 +#define OP_ADC 0x00a00000 +#define OP_SBC 0x00c00000 +#define OP_RSC 0x00e00000 +#define OP_ORR 0x01800000 +#define OP_MOV 0x01a00000 +#define OP_BIC 0x01c00000 +#define OP_MVN 0x01e00000 + static unsigned long get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn) { @@ -201,21 +215,21 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in aluop1 = ptrace_getrn(child, insn); aluop2 = ptrace_getaluop2(child, insn); - ccbit = get_stack_long(child, REG_PSR) & CC_C_BIT ? 1 : 0; - - switch (insn & 0x01e00000) { - case 0x00000000: alt = aluop1 & aluop2; break; - case 0x00200000: alt = aluop1 ^ aluop2; break; - case 0x00400000: alt = aluop1 - aluop2; break; - case 0x00600000: alt = aluop2 - aluop1; break; - case 0x00800000: alt = aluop1 + aluop2; break; - case 0x00a00000: alt = aluop1 + aluop2 + ccbit; break; - case 0x00c00000: alt = aluop1 - aluop2 + ccbit; break; - case 0x00e00000: alt = aluop2 - aluop1 + ccbit; break; - case 0x01800000: alt = aluop1 | aluop2; break; - case 0x01a00000: alt = aluop2; break; - case 0x01c00000: alt = aluop1 & ~aluop2; break; - case 0x01e00000: alt = ~aluop2; break; + ccbit = get_stack_long(child, REG_PSR) & PSR_C_BIT ? 1 : 0; + + switch (insn & OP_MASK) { + case OP_AND: alt = aluop1 & aluop2; break; + case OP_EOR: alt = aluop1 ^ aluop2; break; + case OP_SUB: alt = aluop1 - aluop2; break; + case OP_RSB: alt = aluop2 - aluop1; break; + case OP_ADD: alt = aluop1 + aluop2; break; + case OP_ADC: alt = aluop1 + aluop2 + ccbit; break; + case OP_SBC: alt = aluop1 - aluop2 + ccbit; break; + case OP_RSC: alt = aluop2 - aluop1 + ccbit; break; + case OP_ORR: alt = aluop1 | aluop2; break; + case OP_MOV: alt = aluop2; break; + case OP_BIC: alt = aluop1 & ~aluop2; break; + case OP_MVN: alt = ~aluop2; break; } break; } @@ -276,7 +290,7 @@ get_branch_address(struct task_struct *child, unsigned long pc, unsigned long in base = ptrace_getrn(child, insn); if (read_tsk_long(child, base + nr_regs, &alt) == 0) - alt = pc_pointer (alt); + alt = pc_pointer(alt); break; } break; @@ -313,7 +327,7 @@ add_breakpoint(struct task_struct *child, struct debug_info *dbg, unsigned long if (nr < 2) { res = read_tsk_long(child, addr, &dbg->bp[nr].insn); if (res == 0) - res = write_tsk_long(child, addr, BREAKINST); + res = write_tsk_long(child, addr, BREAKINST_ARM); if (res == 0) { dbg->bp[nr].address = addr; @@ -382,7 +396,7 @@ void __ptrace_cancel_bpt(struct task_struct *child) read_tsk_long(child, dbg->bp[i].address, &tmp); write_tsk_long(child, dbg->bp[i].address, dbg->bp[i].insn); - if (tmp != BREAKINST) + if (tmp != BREAKINST_ARM) printk(KERN_ERR "ptrace_cancel_bpt: weirdness\n"); } } diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index aa737cba98ec..b7ace64c81ab 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -183,7 +183,7 @@ static const char *cache_lockdown[16] = { static inline void dump_cache(const char *prefix, unsigned int cache) { - unsigned int mult = 2 + CACHE_M(cache) ? 1 : 0; + unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0); printk("%s size %dK associativity %d line length %d sets %d\n", prefix, @@ -671,7 +671,7 @@ static const char *proc_arch[16] = { static void c_show_cache(struct seq_file *m, const char *type, unsigned int cache) { - unsigned int mult = 2 + CACHE_M(cache) ? 1 : 0; + unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0); seq_printf(m, "%s size\t\t: %d\n" "%s assoc\t\t: %d\n" @@ -744,7 +744,7 @@ static int c_show(struct seq_file *m, void *v) cache_types[CACHE_TYPE(cache_info)], cache_clean[CACHE_TYPE(cache_info)], cache_lockdown[CACHE_TYPE(cache_info)], - CACHE_S(cache_info) ? "separate I,D" : "unified"); + CACHE_S(cache_info) ? "Harvard" : "Unified"); if (CACHE_S(cache_info)) { c_show_cache(m, "I", CACHE_ISIZE(cache_info)); diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index ca21ff1d4cec..5a2a622e5275 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -396,8 +396,12 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka, if (__put_user(retcodes[idx], rc)) return 1; - flush_icache_range((unsigned long)rc, - (unsigned long)(rc + 1)); + /* + * Ensure that the instruction cache sees + * the return code written onto the stack. + */ + cpu_icache_invalidate_range((unsigned long)rc, + (unsigned long)(rc + 1)); retcode = ((unsigned long)rc) + thumb; } diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 17560d1ec6f9..eb75518c17c4 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -95,7 +95,7 @@ static void dump_instr(struct pt_regs *regs) int i; printk("Code: "); - for (i = -2; i < 3; i++) { + for (i = -4; i < 1; i++) { unsigned int val, bad; if (thumb) diff --git a/arch/arm/lib/ecard.S b/arch/arm/lib/ecard.S index 9b0452d0150d..2872e50ff7a3 100644 --- a/arch/arm/lib/ecard.S +++ b/arch/arm/lib/ecard.S @@ -12,7 +12,7 @@ #include #include -#if defined(CONFIG_CPU_26) +#ifdef CONFIG_CPU_26 #define CPSR2SPSR(rt) #else #define CPSR2SPSR(rt) \ diff --git a/arch/arm/lib/io-acorn.S b/arch/arm/lib/io-acorn.S index b07df6d9924f..138f30c07429 100644 --- a/arch/arm/lib/io-acorn.S +++ b/arch/arm/lib/io-acorn.S @@ -58,7 +58,7 @@ ENTRY(outsl) @ Proto : void memc_write(int register, int value); @ Returns: nothing -#if defined(CONFIG_CPU_26) +#ifdef CONFIG_CPU_26 ENTRY(memc_write) cmp r0, #7 RETINSTR(movgt,pc,lr) diff --git a/arch/arm/mach-arc/dma.c b/arch/arm/mach-arc/dma.c index 50c057e73f1b..26a4e2447a60 100644 --- a/arch/arm/mach-arc/dma.c +++ b/arch/arm/mach-arc/dma.c @@ -28,6 +28,10 @@ static void arc_floppy_data_enable_dma(dmach_t channel, dma_t *dma) { DPRINTK("arc_floppy_data_enable_dma\n"); + + if (dma->using_sg) + BUG(); + switch (dma->dma_mode) { case DMA_MODE_READ: { /* read */ extern unsigned char fdc1772_dma_read, fdc1772_dma_read_end; @@ -39,7 +43,7 @@ static void arc_floppy_data_enable_dma(dmach_t channel, dma_t *dma) memcpy ((void *)0x1c, (void *)&fdc1772_dma_read, &fdc1772_dma_read_end - &fdc1772_dma_read); - fdc1772_setupdma(dma->buf.length, dma->buf.address); /* Sets data pointer up */ + fdc1772_setupdma(dma->buf.length, dma->buf.__address); /* Sets data pointer up */ enable_fiq(FIQ_FLOPPYDATA); restore_flags(flags); } @@ -54,7 +58,7 @@ static void arc_floppy_data_enable_dma(dmach_t channel, dma_t *dma) clf(); memcpy ((void *)0x1c, (void *)&fdc1772_dma_write, &fdc1772_dma_write_end - &fdc1772_dma_write); - fdc1772_setupdma(dma->buf.length, dma->buf.address); /* Sets data pointer up */ + fdc1772_setupdma(dma->buf.length, dma->buf.__address); /* Sets data pointer up */ enable_fiq(FIQ_FLOPPYDATA; restore_flags(flags); @@ -140,6 +144,9 @@ static void a5k_floppy_enable_dma(dmach_t channel, dma_t *dma) extern void floppy_fiqsetup(unsigned long len, unsigned long addr, unsigned long port); + if (dma->using_sg) + BUG(); + if (dma->dma_mode == DMA_MODE_READ) { extern unsigned char floppy_fiqin_start, floppy_fiqin_end; fiqhandler_start = &floppy_fiqin_start; @@ -155,7 +162,7 @@ static void a5k_floppy_enable_dma(dmach_t channel, dma_t *dma) } memcpy((void *)0x1c, fiqhandler_start, fiqhandler_length); regs.ARM_r9 = dma->buf.length; - regs.ARM_r10 = (unsigned long)dma->buf.address; + regs.ARM_r10 = (unsigned long)dma->buf.__address; regs.ARM_fp = FLOPPYDMA_BASE; set_fiq_regs(®s); enable_fiq(dma->dma_irq); diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c index 1a7a790cc290..587fb687476d 100644 --- a/arch/arm/mach-footbridge/netwinder-hw.c +++ b/arch/arm/mach-footbridge/netwinder-hw.c @@ -320,7 +320,7 @@ static inline void wb977_init_gpio(void) */ spin_lock_irqsave(&gpio_lock, flags); gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN); - spin_unlock_irqrestore(&gpio_loc, flags); + spin_unlock_irqrestore(&gpio_lock, flags); } /* diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c index ca7f031ee8d6..8dae29c96d74 100644 --- a/arch/arm/mach-integrator/pci.c +++ b/arch/arm/mach-integrator/pci.c @@ -110,7 +110,6 @@ static int __init integrator_map_irq(struct pci_dev *dev, u8 slot, u8 pin) return irq_tab[intnr]; } -extern void pci_v3_setup_resources(struct resource **res); extern void pci_v3_init(void *); struct hw_pci integrator_pci __initdata = { @@ -118,6 +117,7 @@ struct hw_pci integrator_pci __initdata = { swizzle: integrator_swizzle, map_irq: integrator_map_irq, setup: pci_v3_setup, + nr_controllers: 1, scan: pci_v3_scan_bus, preinit: pci_v3_preinit, postinit: pci_v3_postinit, diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index 108999083e44..2b46c7cfdd72 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -38,8 +38,6 @@ #include -int setup_arm_irq(int irq, struct irqaction * new); - /* * The V3 PCI interface chip in Integrator provides several windows from * local bus memory into the PCI memory areas. Unfortunately, there @@ -414,12 +412,19 @@ static struct resource pre_mem = { flags: IORESOURCE_MEM | IORESOURCE_PREFETCH, }; -static void __init pci_v3_setup_resources(struct resource **resource) +static int __init pci_v3_setup_resources(struct resource **resource) { - if (request_resource(&iomem_resource, &non_mem)) - printk("PCI: unable to allocate non-prefetchable memory region\n"); - if (request_resource(&iomem_resource, &pre_mem)) - printk("PCI: unable to allocate prefetchable memory region\n"); + if (request_resource(&iomem_resource, &non_mem)) { + printk(KERN_ERR "PCI: unable to allocate non-prefetchable " + "memory region\n"); + return -EBUSY; + } + if (request_resource(&iomem_resource, &pre_mem)) { + release_resource(&non_mem); + printk(KERN_ERR "PCI: unable to allocate prefetchable " + "memory region\n"); + return -EBUSY; + } /* * bus->resource[0] is the IO resource for this bus @@ -429,6 +434,8 @@ static void __init pci_v3_setup_resources(struct resource **resource) resource[0] = &ioport_resource; resource[1] = &non_mem; resource[2] = &pre_mem; + + return 0; } /* @@ -444,13 +451,15 @@ static int v3_fault(unsigned long addr, struct pt_regs *regs) { unsigned long pc = instruction_pointer(regs); unsigned long instr = *(unsigned long *)pc; -// char buf[128]; +#if 0 + char buf[128]; -// sprintf(buf, "V3 fault: address=0x%08lx, pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n", -// addr, pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255, -// v3_readb(V3_LB_ISTAT)); -// printk("%s", buf); -// printascii(buf); + sprintf(buf, "V3 fault: address=0x%08lx, pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n", + addr, pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255, + v3_readb(V3_LB_ISTAT)); + printk(KERN_DEBUG "%s", buf); + printascii(buf); +#endif v3_writeb(V3_LB_ISTAT, 0); __raw_writel(3, SC_PCI); @@ -514,28 +523,21 @@ static void v3_irq(int irq, void *devid, struct pt_regs *regs) #endif } -static struct irqaction v3_int = { - name: "V3", - handler: v3_irq, -}; - -static struct irqaction v3_int2 = { - name: "V3TM", - handler: v3_irq, -}; - extern int (*external_fault)(unsigned long addr, struct pt_regs *regs); -int pci_v3_setup(int nr, struct pci_sys_data *sys) +int __init pci_v3_setup(int nr, struct pci_sys_data *sys) { - if (nr) - pci_v3_setup_resources(sys->resource); - return nr ? 0 : 1; + int ret = 0; + + if (nr == 0) + ret = pci_v3_setup_resources(sys->resource); + + return ret; } struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *sys) { - return pci_scan_bus(sys->busnr, &pci_v3_ops, sys); + return pci_scan_bus(sys->busnr, &pci_v3_ops, sys); } /* @@ -546,6 +548,7 @@ void __init pci_v3_preinit(void) { unsigned long flags; unsigned int temp; + int ret; /* * Hook in our fault handler for PCI errors @@ -593,7 +596,7 @@ void __init pci_v3_preinit(void) temp |= V3_PCI_CFG_M_IO_REG_DIS | V3_PCI_CFG_M_IO_DIS; v3_writew(V3_PCI_CFG, temp); - printk("FIFO_CFG: %04x FIFO_PRIO: %04x\n", + printk(KERN_DEBUG "FIFO_CFG: %04x FIFO_PRIO: %04x\n", v3_readw(V3_FIFO_CFG), v3_readw(V3_FIFO_PRIORITY)); /* @@ -620,7 +623,10 @@ void __init pci_v3_preinit(void) /* * Grab the PCI error interrupt. */ - setup_arm_irq(IRQ_V3INT, &v3_int); + ret = request_irq(IRQ_V3INT, v3_irq, 0, "V3", NULL); + if (ret) + printk(KERN_ERR "PCI: unable to grab PCI error " + "interrupt: %d\n", ret); spin_unlock_irqrestore(&v3_lock, flags); } @@ -628,6 +634,7 @@ void __init pci_v3_preinit(void) void __init pci_v3_postinit(void) { unsigned int pci_cmd; + int ret; pci_cmd = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE; @@ -637,5 +644,10 @@ void __init pci_v3_postinit(void) v3_writeb(V3_LB_ISTAT, ~0x40); v3_writeb(V3_LB_IMASK, 0x68); -// setup_arm_irq(IRQ_LBUSTIMEOUT, &v3_int2); +#if 0 + ret = request_irq(IRQ_LBUSTIMEOUT, lb_timeout, 0, "bus timeout", NULL); + if (ret) + printk(KERN_ERR "PCI: unable to grab local bus timeout " + "interrupt: %d\n", ret); +#endif } diff --git a/arch/arm/mach-iop310/iop310-pci.c b/arch/arm/mach-iop310/iop310-pci.c index 33f3718e6c32..1dca952f109b 100644 --- a/arch/arm/mach-iop310/iop310-pci.c +++ b/arch/arm/mach-iop310/iop310-pci.c @@ -52,7 +52,7 @@ #ifdef DEBUG #define DBG(x...) printk(x) #else -#define DBG(x...) +#define DBG(x...) do { } while (0) #endif extern int (*external_fault)(unsigned long, struct pt_regs *); @@ -247,7 +247,8 @@ static int iop310_sec_pci_status(void) *IOP310_SATUISR = uisr & 0x0000069f; ret = 1; } -//if (ret) printk("ERROR (%08lx %08lx)", usr, uisr); + if (ret) + DBG("ERROR (%08lx %08lx)", usr, uisr); return ret; } @@ -256,16 +257,19 @@ iop310_sec_rd_cfg_byte(struct pci_dev *dev, int where, u8 *p) { int ret; u8 val; -//printk("rdb: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), where); + + DBG("rdb: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where); *IOP310_SOCCAR = iop310_cfg_address(dev, where); val = (*IOP310_SOCCDR) >> ((where & 3) * 8); __asm__ __volatile__("nop; nop; nop; nop"); -//printk(">= %08lx ", val); + + DBG(">= %08lx ", val); ret = iop310_sec_pci_status(); if (ret) val = 0xff; -//printk("\n"); + DBG("\n"); *p = val; return PCIBIOS_SUCCESSFUL; @@ -276,16 +280,19 @@ iop310_sec_rd_cfg_word(struct pci_dev *dev, int where, u16 *p) { int ret; u16 val; -//printk("rdw: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), where); + + DBG("rdw: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where); *IOP310_SOCCAR = iop310_cfg_address(dev, where); val = (*IOP310_SOCCDR) >> ((where & 3) * 8); __asm__ __volatile__("nop; nop; nop; nop"); -//printk(">= %08lx ", val); + + DBG(">= %08lx ", val); ret = iop310_sec_pci_status(); if (ret) val = 0xffff; -//printk("\n"); + DBG("\n"); *p = val; return PCIBIOS_SUCCESSFUL; @@ -296,16 +303,19 @@ iop310_sec_rd_cfg_dword(struct pci_dev *dev, int where, u32 *p) { int ret; u32 val; -//printk("rdl: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), where); + + DBG("rdl: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where); *IOP310_SOCCAR = iop310_cfg_address(dev, where); val = *IOP310_SOCCDR; __asm__ __volatile__("nop; nop; nop; nop"); -//printk(">= %08lx ", val); + + DBG(">= %08lx ", val); ret = iop310_sec_pci_status(); if (ret) val = 0xffffffff; -//printk("\n"); + DBG("\n"); *p = val; return PCIBIOS_SUCCESSFUL; @@ -316,12 +326,15 @@ iop310_sec_wr_cfg_byte(struct pci_dev *dev, int where, u8 v) { int ret; u32 val; -//printk("wrb: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), where); + + DBG("wrb: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where); *IOP310_SOCCAR = iop310_cfg_address(dev, where); val = *IOP310_SOCCDR; __asm__ __volatile__("nop; nop; nop; nop"); -//printk("<= %08lx", v); + + DBG("<= %08lx", v); ret = iop310_sec_pci_status(); if (ret == 0) { where = (where & 3) * 8; @@ -329,7 +342,7 @@ iop310_sec_wr_cfg_byte(struct pci_dev *dev, int where, u8 v) val |= v << where; *IOP310_SOCCDR = val; } -//printk("\n"); + DBG("\n"); return PCIBIOS_SUCCESSFUL; } @@ -338,12 +351,15 @@ iop310_sec_wr_cfg_word(struct pci_dev *dev, int where, u16 v) { int ret; u32 val; -//printk("wrw: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), where); + + DBG("wrw: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where); *IOP310_SOCCAR = iop310_cfg_address(dev, where); val = *IOP310_SOCCDR; __asm__ __volatile__("nop; nop; nop; nop"); -//printk("<= %08lx", v); + + DBG("<= %08lx", v); ret = iop310_sec_pci_status(); if (ret == 0) { where = (where & 2) * 8; @@ -351,18 +367,20 @@ iop310_sec_wr_cfg_word(struct pci_dev *dev, int where, u16 v) val |= v << where; *IOP310_SOCCDR = val; } -//printk("\n"); + DBG("\n"); return PCIBIOS_SUCCESSFUL; } static int iop310_sec_wr_cfg_dword(struct pci_dev *dev, int where, u32 v) { -//printk("wrl: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), where); + DBG("wrl: %d:%02x.%x %02x ", dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where); *IOP310_SOCCAR = iop310_cfg_address(dev, where); *IOP310_SOCCDR = v; __asm__ __volatile__("nop; nop; nop; nop"); -//printk("<= %08lx\n", v); + + DBG("<= %08lx\n", v); return PCIBIOS_SUCCESSFUL; } @@ -381,8 +399,8 @@ static struct pci_ops iop310_secondary_ops = { */ int iop310_pci_abort_handler(unsigned long addr, struct pt_regs *regs) { -// printk("PCI abort: address = %08x PC = %08x LR = %08lx\n", -// addr, regs->ARM_pc, regs->ARM_lr); + DBG("PCI abort: address = %08x PC = %08x LR = %08lx\n", + addr, regs->ARM_pc, regs->ARM_lr); return 0; } @@ -443,11 +461,11 @@ int iop310_setup(int nr, struct pci_sys_data *sys) case 1: res[0].start = IOP310_PCISEC_LOWER_IO + 0x6e000000; res[0].end = IOP310_PCISEC_LOWER_IO + 0x6e00ffff; - res[0].name = "PCI IO Primary"; + res[0].name = "PCI IO Secondary"; res[1].start = IOP310_PCISEC_LOWER_MEM; res[1].end = IOP310_PCISEC_LOWER_MEM + IOP310_PCI_WINDOW_SIZE; - res[1].name = "PCI Memory Primary"; + res[1].name = "PCI Memory Secondary"; break; } @@ -465,18 +483,17 @@ int iop310_setup(int nr, struct pci_sys_data *sys) void iop310_init(void) { DBG("PCI: Intel 80312 PCI-to-PCI init code.\n"); - DBG(" ATU secondary: IOP310_SOMWVR=0x%04x, IOP310_SOIOWVR=0x%04x\n", - *IOP310_SOMWVR, - *IOP310_SOIOWVR); - DBG(" ATU secondary: IOP310_ATUCR=0x%08x\n", *IOP310_ATUCR); - DBG(" ATU secondary: IOP310_SIABAR=0x%08x IOP310_SIALR=0x%08x IOP310_SIATVR=%08x\n", *IOP310_SIABAR, *IOP310_SIALR, *IOP310_SIATVR); - - DBG(" ATU primary: IOP310_POMWVR=0x%04x, IOP310_POIOWVR=0x%04x\n", - *IOP310_POMWVR, - *IOP310_POIOWVR); - DBG(" ATU secondary: IOP310_PIABAR=0x%08x IOP310_PIALR=0x%08x IOP310_PIATVR=%08x\n", *IOP310_PIABAR, *IOP310_PIALR, *IOP310_PIATVR); - - DBG(" P2P: IOP310_PCR=0x%04x IOP310_BCR=0x%04x IOP310_EBCR=0x%04x\n", *IOP310_PCR, *IOP310_BCR, *IOP310_EBCR); + DBG(" ATU secondary: ATUCR =0x%08x\n", *IOP310_ATUCR); + DBG(" ATU secondary: SOMWVR=0x%08x SOIOWVR=0x%08x\n", + *IOP310_SOMWVR, *IOP310_SOIOWVR); + DBG(" ATU secondary: SIABAR=0x%08x SIALR =0x%08x SIATVR=%08x\n", + *IOP310_SIABAR, *IOP310_SIALR, *IOP310_SIATVR); + DBG(" ATU primary: POMWVR=0x%08x POIOWVR=0x%08x\n", + *IOP310_POMWVR, *IOP310_POIOWVR); + DBG(" ATU primary: PIABAR=0x%08x PIALR =0x%08x PIATVR=%08x\n", + *IOP310_PIABAR, *IOP310_PIALR, *IOP310_PIATVR); + DBG(" P2P: PCR=0x%04x BCR=0x%04x EBCR=0x%04x\n", + *IOP310_PCR, *IOP310_BCR, *IOP310_EBCR); /* * Windows have to be carefully opened via a nice set of calls @@ -495,6 +512,5 @@ void iop310_init(void) *IOP310_PCR &= 0xfff8; external_fault = iop310_pci_abort_handler; - } diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c index 402b71cdb5fd..cc0dc96ae2ee 100644 --- a/arch/arm/mach-rpc/dma.c +++ b/arch/arm/mach-rpc/dma.c @@ -188,7 +188,7 @@ static void iomd_enable_dma(dmach_t channel, dma_t *dma) */ if (!dma->using_sg) { dma->buf.dma_address = pci_map_single(NULL, - dma->buf.address, dma->buf.length, + dma->buf.__address, dma->buf.length, dma->dma_mode == DMA_MODE_READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE); } @@ -275,6 +275,9 @@ static void floppy_enable_dma(dmach_t channel, dma_t *dma) unsigned int fiqhandler_length; struct pt_regs regs; + if (dma->using_sg) + BUG(); + if (dma->dma_mode == DMA_MODE_READ) { extern unsigned char floppy_fiqin_start, floppy_fiqin_end; fiqhandler_start = &floppy_fiqin_start; @@ -286,7 +289,7 @@ static void floppy_enable_dma(dmach_t channel, dma_t *dma) } regs.ARM_r9 = dma->buf.length; - regs.ARM_r10 = (unsigned long)dma->buf.address; + regs.ARM_r10 = (unsigned long)dma->buf.__address; regs.ARM_fp = FLOPPYDMA_BASE; if (claim_fiq(&fh)) { diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index 86e1c81a8db1..633166a0ae05 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c @@ -59,7 +59,7 @@ static unsigned int h3600_egpio; | GPIO_H3100_IR_ON \ | GPIO_H3100_IR_FSEL) -void h3100_init_egpio( void ) +static void h3100_init_egpio( void ) { GPDR |= H3100_DIRECT_EGPIO; GPCR = H3100_DIRECT_EGPIO; /* Initially all off */ @@ -72,7 +72,7 @@ void h3100_init_egpio( void ) H3600_EGPIO = h3600_egpio; } -void h3100_control_egpio( enum ipaq_egpio_type x, int setp ) +static void h3100_control_egpio( enum ipaq_egpio_type x, int setp ) { unsigned int egpio = 0; long gpio = 0; @@ -138,7 +138,7 @@ void h3100_control_egpio( enum ipaq_egpio_type x, int setp ) */ } -unsigned long h3100_read_egpio( void ) +static unsigned long h3100_read_egpio( void ) { return h3600_egpio; } @@ -154,13 +154,13 @@ static struct ipaq_model_ops h3100_model_ops __initdata = { /************************* H3600 *************************/ -void h3600_init_egpio( void ) +static void h3600_init_egpio( void ) { h3600_egpio = EGPIO_H3600_RS232_ON; H3600_EGPIO = h3600_egpio; } -void h3600_control_egpio( enum ipaq_egpio_type x, int setp ) +static void h3600_control_egpio( enum ipaq_egpio_type x, int setp ) { unsigned int egpio = 0; unsigned long flags; @@ -217,7 +217,7 @@ void h3600_control_egpio( enum ipaq_egpio_type x, int setp ) local_irq_restore(flags); } -unsigned long h3600_read_egpio( void ) +static unsigned long h3600_read_egpio( void ) { return h3600_egpio; } @@ -237,7 +237,7 @@ static struct ipaq_model_ops h3600_model_ops __initdata = { static unsigned int h3800_asic1_gpio; static unsigned int h3800_asic2_gpio; -void h3800_init_egpio(void) +static void h3800_init_egpio(void) { /* Set up ASIC #1 */ H3800_ASIC1_GPIO_Direction = ASIC1_OUTPUTS; /* All outputs */ @@ -271,7 +271,7 @@ void h3800_init_egpio(void) H3800_ASIC1_FlashWP_VPP_ON = 0; } -void h3800_control_egpio( enum ipaq_egpio_type x, int setp ) +static void h3800_control_egpio( enum ipaq_egpio_type x, int setp ) { unsigned int set_asic1_egpio = 0; unsigned int clear_asic1_egpio = 0; @@ -325,7 +325,7 @@ void h3800_control_egpio( enum ipaq_egpio_type x, int setp ) local_irq_restore(flags); } -unsigned long h3800_read_egpio( void ) +static unsigned long h3800_read_egpio( void ) { return h3800_asic1_gpio | (h3800_asic2_gpio << 16); } diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index 973ed400a243..c9dd8efc1379 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c @@ -48,7 +48,7 @@ static int __init jornada720_init(void) /* initialize extra IRQs */ set_GPIO_IRQ_edge(GPIO_GPIO1, GPIO_RISING_EDGE); - sa1111_init_irq(IRQ_GPIO1)); /* chained on GPIO 1 */ + sa1111_init_irq(IRQ_GPIO1); /* chained on GPIO 1 */ return 0; } diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c index e1de84d73d8e..649e73f3ab1c 100644 --- a/arch/arm/mach-sa1100/pm.c +++ b/arch/arm/mach-sa1100/pm.c @@ -51,8 +51,6 @@ extern unsigned long sleep_save_p; /* physical address */ int pm_do_suspend(void) { - int retval; - /* set up pointer to sleep parameters */ sleep_save = kmalloc(SLEEP_SAVE_SIZE*sizeof(long), GFP_ATOMIC); if (!sleep_save) @@ -107,7 +105,7 @@ int pm_do_suspend(void) PSPR = 0; #ifdef DEBUG - printk("*** made it back from resume\n"); + printk(KERN_DEBUG "*** made it back from resume\n"); #endif /* restore registers */ @@ -171,21 +169,16 @@ int pm_do_suspend(void) #define ACPI_S1_SLP_TYP 19 /* - * Send us to sleep. We must not be called from IRQ context. + * Send us to sleep. */ static int sysctl_pm_do_suspend(void) { int retval; - if (in_interrupt()) { - printk(KERN_CRIT "pm_do_suspend() called from IRQ\n"); - return -EINVAL; - } - retval = pm_send_all(PM_SUSPEND, (void *)3); if (retval == 0) { - retval = __pm_do_suspend(); + retval = pm_do_suspend(); pm_send_all(PM_RESUME, (void *)0); } @@ -193,7 +186,6 @@ static int sysctl_pm_do_suspend(void) return retval; } - static struct ctl_table pm_table[] = { {ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, (proc_handler *)&sysctl_pm_do_suspend}, diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c index bb07b1fd9e54..30a10cb07775 100644 --- a/arch/arm/mm/fault-armv.c +++ b/arch/arm/mm/fault-armv.c @@ -116,7 +116,7 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) if (!inf->fn(addr, fsr, regs)) return; - printk(KERN_ALERT "Unhandled fault: %s (%X) at 0x%08lx\n", + printk(KERN_ALERT "Unhandled fault: %s (0x%03x) at 0x%08lx\n", inf->name, fsr, addr); force_sig(inf->sig, current); show_pte(current->mm, addr); @@ -177,38 +177,13 @@ bad_pmd: return; } -/* - * Take care of architecture specific things when placing a new PTE into - * a page table, or changing an existing PTE. Basically, there are two - * things that we need to take care of: - * - * 1. If PG_dcache_dirty is set for the page, we need to ensure - * that any cache entries for the kernels virtual memory - * range are written back to the page. - * 2. If we have multiple shared mappings of the same space in - * an object, we need to deal with the cache aliasing issues. - * - * Note that the page_table_lock will be held. - */ -void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte) +static void +make_coherent(struct vm_area_struct *vma, unsigned long addr, struct page *page) { - struct page *page = pte_page(pte); struct vm_area_struct *mpnt; - struct mm_struct *mm; - unsigned long pgoff; - int aliases; - - if (!VALID_PAGE(page) || !page->mapping) - return; - - if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) { - unsigned long kvirt = (unsigned long)page_address(page); - cpu_cache_clean_invalidate_range(kvirt, kvirt + PAGE_SIZE, 0); - } - - mm = vma->vm_mm; - pgoff = (addr - vma->vm_start) >> PAGE_SHIFT; - aliases = 0; + struct mm_struct *mm = vma->vm_mm; + unsigned long pgoff = (addr - vma->vm_start) >> PAGE_SHIFT; + int aliases = 0; /* * If we have any shared mappings that are in the same mm @@ -246,3 +221,30 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte) if (aliases) adjust_pte(vma, addr); } + +/* + * Take care of architecture specific things when placing a new PTE into + * a page table, or changing an existing PTE. Basically, there are two + * things that we need to take care of: + * + * 1. If PG_dcache_dirty is set for the page, we need to ensure + * that any cache entries for the kernels virtual memory + * range are written back to the page. + * 2. If we have multiple shared mappings of the same space in + * an object, we need to deal with the cache aliasing issues. + * + * Note that the page_table_lock will be held. + */ +void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte) +{ + struct page *page = pte_page(pte); + + if (VALID_PAGE(page) && page->mapping) { + if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) { + unsigned long kvirt = (unsigned long)page_address(page); + cpu_cache_clean_invalidate_range(kvirt, kvirt + PAGE_SIZE, 0); + } + + make_coherent(vma, addr, page); + } +} diff --git a/arch/arm/mm/fault-common.c b/arch/arm/mm/fault-common.c index 3e1c663ddf39..699e5208d1d4 100644 --- a/arch/arm/mm/fault-common.c +++ b/arch/arm/mm/fault-common.c @@ -138,9 +138,10 @@ __do_user_fault(struct task_struct *tsk, unsigned long addr, int error_code, struct siginfo si; #ifdef CONFIG_DEBUG_USER - printk(KERN_DEBUG "%s: unhandled page fault at pc=0x%08lx, " - "lr=0x%08lx (bad address=0x%08lx, code %d)\n", - tsk->comm, regs->ARM_pc, regs->ARM_lr, addr, error_code); + printk(KERN_DEBUG "%s: unhandled page fault at 0x%08lx, code 0x%03x\n", + tsk->comm, addr, error_code); + show_pte(tsk->mm, addr); + show_regs(regs); #endif tsk->thread.address = addr; @@ -224,8 +225,7 @@ survive: * If we are out of memory for pid1, * sleep for a while and retry */ - tsk->policy |= SCHED_YIELD; - schedule(); + yield(); goto survive; check_stack: diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index fa39ca99b795..11265009611f 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -6,7 +6,7 @@ # To add an entry into this database, please see Documentation/arm/README, # or contact rmk@arm.linux.org.uk # -# Last update: Fri Jan 4 10:27:21 2002 +# Last update: Sun Feb 24 17:43:42 2002 # # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number # @@ -118,10 +118,10 @@ aaed2000 ARCH_AAED2000 AAED2000 106 cdb89712 ARCH_CDB89712 CDB89712 107 graphicsmaster SA1100_GRAPHICSMASTER GRAPHICSMASTER 108 adsbitsy SA1100_ADSBITSY ADSBITSY 109 -cotulla_idp ARCH_COTULLA_IDP COTULLA_IDP 110 +pxa_idp ARCH_PXA_IDP PXA_IDP 110 plce ARCH_PLCE PLCE 111 pt_system3 SA1100_PT_SYSTEM3 PT_SYSTEM3 112 -medalb ARCH_MEDALB MEDALB 113 +murphy ARCH_MEDALB MEDALB 113 eagle ARCH_EAGLE EAGLE 114 dsc21 ARCH_DSC21 DSC21 115 dsc24 ARCH_DSC24 DSC24 116 @@ -162,3 +162,15 @@ d7300 SA1100_D7300 D7300 150 cep SA1100_CEP CEP 151 fortunet ARCH_FORTUNET FORTUNET 152 vc547x ARCH_VC547X VC547X 153 +filewalker SA1100_FILEWALKER FILEWALKER 154 +netgateway SA1100_NETGATEWAY NETGATEWAY 155 +symbol2800 SA1100_SYMBOL2800 SYMBOL2800 156 +suns SA1100_SUNS SUNS 157 +frodo SA1100_FRODO FRODO 158 +ms301 SA1100_MACH_TYTE_MS301 MACH_TYTE_MS301 159 +mx1ads ARCH_MX1ADS MX1ADS 160 +h7201 ARCH_H7201 H7201 161 +h7202 ARCH_H7202 H7202 162 +amico ARCH_AMICO AMICO 163 +iam SA1100_IAM IAM 164 +tt530 SA1100_TT530 TT530 165 diff --git a/include/asm-arm/arch-sa1100/assabet.h b/include/asm-arm/arch-sa1100/assabet.h index f9df2064573d..35754657b1e3 100644 --- a/include/asm-arm/arch-sa1100/assabet.h +++ b/include/asm-arm/arch-sa1100/assabet.h @@ -62,7 +62,7 @@ extern unsigned long SCR_value; #ifdef CONFIG_SA1100_ASSABET extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set); #else -#define ASSABET_BCR_frob(x) do { } while (0) +#define ASSABET_BCR_frob(x,y) do { } while (0) #endif #define ASSABET_BCR_set(x) ASSABET_BCR_frob((x), (x)) diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index 4782df468d45..3c63a8cf4cb9 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -31,9 +31,9 @@ * Generic IO read/write. These perform native-endian accesses. Note * that some architectures will want to re-define __raw_{read,write}w. */ -extern void __raw_writesb(unsigned int addr, void *data, int bytelen); -extern void __raw_writesw(unsigned int addr, void *data, int wordlen); -extern void __raw_writesl(unsigned int addr, void *data, int longlen); +extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); +extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); +extern void __raw_writesl(unsigned int addr, const void *data, int longlen); extern void __raw_readsb(unsigned int addr, void *data, int bytelen); extern void __raw_readsw(unsigned int addr, void *data, int wordlen); diff --git a/include/asm-arm/mmu.h b/include/asm-arm/mmu.h index 784ff2708dc5..9b8d3d781a1e 100644 --- a/include/asm-arm/mmu.h +++ b/include/asm-arm/mmu.h @@ -1,7 +1,9 @@ #ifndef __ARM_MMU_H #define __ARM_MMU_H -/* The ARM doesn't have a mmu context */ +/* + * The ARM doesn't have a mmu context + */ typedef struct { } mm_context_t; #endif diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h index 935f73ad7e2c..041bbaddd971 100644 --- a/include/asm-arm/pci.h +++ b/include/asm-arm/pci.h @@ -2,7 +2,7 @@ #define ASMARM_PCI_H #ifdef __KERNEL__ - +#include #include /* bah! */ #include @@ -142,18 +142,9 @@ pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int directi for (i = 0; i < nents; i++, sg++) { char *virt; - if (sg->address && sg->page) - BUG(); - else if (!sg->address && !sg->page) - BUG(); - - if (sg->address) { - sg->dma_address = virt_to_bus(sg->address); - virt = sg->address; - } else { - sg->dma_address = page_to_bus(sg->page) + sg->offset; - virt = page_address(sg->page) + sg->offset; - } + + sg->dma_address = page_to_bus(sg->page) + sg->offset; + virt = page_address(sg->page) + sg->offset; consistent_sync(virt, sg->length, direction); } @@ -197,12 +188,7 @@ pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int d int i; for (i = 0; i < nelems; i++, sg++) { - char *virt; - - if (sg->address) - virt = sg->address; - else - virt = page_address(sg->page) + sg->offset; + char *virt = page_address(sg->page) + sg->offset; consistent_sync(virt, sg->length, direction); } } -- cgit v1.2.3 From 3991853c68cc42b2b590b0e3a92190b283d10e7a Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 25 Feb 2002 19:43:27 +0000 Subject: Rationalise interrupt handling on ARM. With the old code, we had loops within loops within loops checking until each IRQ level didn't have any more interrupts for us. This caused both latency problems, and locked out any chance of handling a second interrupt from down the chain while one on that chain was already in progress. The new structure splits out the machine specific IRQ handlers from the Linux driver specific IRQ handlers, giving the machine specific handlers much greater flexibility in handling the interrupt. We also suck the SA1100 IRQ edge selection function into the IRQ core. --- Documentation/arm/Interrupts | 173 +++++++++++++++ arch/arm/kernel/armksyms.c | 1 + arch/arm/kernel/ecard.c | 118 ++++------ arch/arm/kernel/entry-armo.S | 4 +- arch/arm/kernel/irq.c | 393 ++++++++++++++++++++++++--------- arch/arm/kernel/time.c | 8 +- arch/arm/mach-clps711x/irq.c | 44 ++-- arch/arm/mach-ebsa110/core.c | 20 +- arch/arm/mach-epxa10db/irq.c | 47 ++-- arch/arm/mach-footbridge/Makefile | 2 +- arch/arm/mach-footbridge/irq.c | 135 +---------- arch/arm/mach-footbridge/isa-irq.c | 170 ++++++++++++++ arch/arm/mach-integrator/irq.c | 24 +- arch/arm/mach-iop310/iop310-irq.c | 52 +++-- arch/arm/mach-iop310/iq80310-irq.c | 174 +++++++-------- arch/arm/mach-iop310/iq80310-time.c | 16 +- arch/arm/mach-iop310/xs80200-irq.c | 54 ++--- arch/arm/mach-rpc/irq.c | 95 ++++---- arch/arm/mach-sa1100/assabet.c | 3 +- arch/arm/mach-sa1100/cerf.c | 7 +- arch/arm/mach-sa1100/graphicsclient.c | 37 ++-- arch/arm/mach-sa1100/graphicsmaster.c | 36 +-- arch/arm/mach-sa1100/irq.c | 264 +++++++++++----------- arch/arm/mach-sa1100/neponset.c | 101 ++++++--- arch/arm/mach-sa1100/sa1111.c | 208 +++++++++++------ arch/arm/mach-sa1100/simpad.c | 2 +- arch/arm/mach-shark/irq.c | 58 ++--- include/asm-arm/arch-adifcc/irq.h | 13 -- include/asm-arm/arch-adifcc/irqs.h | 8 - include/asm-arm/arch-anakin/irq.h | 19 -- include/asm-arm/arch-anakin/time.h | 2 +- include/asm-arm/arch-arc/irq.h | 10 - include/asm-arm/arch-arc/time.h | 2 +- include/asm-arm/arch-cl7500/time.h | 2 +- include/asm-arm/arch-clps711x/irq.h | 20 -- include/asm-arm/arch-clps711x/time.h | 2 +- include/asm-arm/arch-ebsa110/irq.h | 13 -- include/asm-arm/arch-ebsa110/time.h | 2 +- include/asm-arm/arch-ebsa285/irq.h | 33 --- include/asm-arm/arch-ebsa285/time.h | 2 +- include/asm-arm/arch-epxa10db/irq.h | 20 -- include/asm-arm/arch-epxa10db/time.h | 2 +- include/asm-arm/arch-integrator/irq.h | 20 -- include/asm-arm/arch-integrator/time.h | 2 +- include/asm-arm/arch-iop310/irq.h | 13 -- include/asm-arm/arch-l7200/irq.h | 12 - include/asm-arm/arch-l7200/time.h | 2 +- include/asm-arm/arch-nexuspci/irq.h | 14 -- include/asm-arm/arch-nexuspci/time.h | 2 +- include/asm-arm/arch-rpc/irq.h | 14 -- include/asm-arm/arch-rpc/time.h | 2 +- include/asm-arm/arch-sa1100/hardware.h | 16 -- include/asm-arm/arch-sa1100/ide.h | 2 +- include/asm-arm/arch-sa1100/irq.h | 13 -- include/asm-arm/arch-sa1100/irqs.h | 1 + include/asm-arm/arch-sa1100/time.h | 2 +- include/asm-arm/arch-shark/irq.h | 10 - include/asm-arm/arch-tbox/irq.h | 13 -- include/asm-arm/arch-tbox/time.h | 2 +- include/asm-arm/irq.h | 14 ++ include/asm-arm/mach/irq.h | 110 +++++++-- 61 files changed, 1508 insertions(+), 1152 deletions(-) create mode 100644 Documentation/arm/Interrupts create mode 100644 arch/arm/mach-footbridge/isa-irq.c delete mode 100644 include/asm-arm/arch-adifcc/irq.h delete mode 100644 include/asm-arm/arch-anakin/irq.h delete mode 100644 include/asm-arm/arch-arc/irq.h delete mode 100644 include/asm-arm/arch-clps711x/irq.h delete mode 100644 include/asm-arm/arch-ebsa110/irq.h delete mode 100644 include/asm-arm/arch-ebsa285/irq.h delete mode 100644 include/asm-arm/arch-epxa10db/irq.h delete mode 100644 include/asm-arm/arch-integrator/irq.h delete mode 100644 include/asm-arm/arch-iop310/irq.h delete mode 100644 include/asm-arm/arch-l7200/irq.h delete mode 100644 include/asm-arm/arch-nexuspci/irq.h delete mode 100644 include/asm-arm/arch-rpc/irq.h delete mode 100644 include/asm-arm/arch-sa1100/irq.h delete mode 100644 include/asm-arm/arch-shark/irq.h delete mode 100644 include/asm-arm/arch-tbox/irq.h (limited to 'include') diff --git a/Documentation/arm/Interrupts b/Documentation/arm/Interrupts new file mode 100644 index 000000000000..72c93de8cd4e --- /dev/null +++ b/Documentation/arm/Interrupts @@ -0,0 +1,173 @@ +2.5.2-rmk5 +---------- + +This is the first kernel that contains a major shake up of some of the +major architecture-specific subsystems. + +Firstly, it contains some pretty major changes to the way we handle the +MMU TLB. Each MMU TLB variant is now handled completely separately - +we have TLB v3, TLB v4 (without write buffer), TLB v4 (with write buffer), +and finally TLB v4 (with write buffer, with I TLB invalidate entry). +There is more assembly code inside each of these functions, mainly to +allow more flexible TLB handling for the future. + +Secondly, the IRQ subsystem. + +The 2.5 kernels will be having major changes to the way IRQs are handled. +Unfortunately, this means that machine types that touch the irq_desc[] +array (basically all machine types) will break, and this means every +machine type that we currently have. + +Lets take an example. On the Assabet with Neponset, we have: + + GPIO25 IRR:2 + SA1100 ------------> Neponset -----------> SA1111 + IIR:1 + -----------> USAR + IIR:0 + -----------> SMC9196 + +The way stuff currently works, all SA1111 interrupts are mutually +exclusive of each other - if you're processing one interrupt from the +SA1111 and another comes in, you have to wait for that interrupt to +finish processing before you can service the new interrupt. Eg, an +IDE PIO-based interrupt on the SA1111 excludes all other SA1111 and +SMC9196 interrupts until it has finished transferring its multi-sector +data, which can be a long time. Note also that since we loop in the +SA1111 IRQ handler, SA1111 IRQs can hold off SMC9196 IRQs indefinitely. + + +The new approach brings several new ideas... + +We introduce the concept of a "parent" and a "child". For example, +to the Neponset handler, the "parent" is GPIO25, and the "children"d +are SA1111, SMC9196 and USAR. + +We also bring the idea of an IRQ "chip" (mainly to reduce the size of +the irqdesc array). This doesn't have to be a real "IC"; indeed the +SA11x0 IRQs are handled by two separate "chip" structures, one for +GPIO0-10, and another for all the rest. It is just a container for +the various operations (maybe this'll change to a better name). +This structure has the following operations: + +struct irqchip { + /* + * Acknowledge the IRQ. + * If this is a level-based IRQ, then it is expected to mask the IRQ + * as well. + */ + void (*ack)(unsigned int irq); + /* + * Mask the IRQ in hardware. + */ + void (*mask)(unsigned int irq); + /* + * Unmask the IRQ in hardware. + */ + void (*unmask)(unsigned int irq); + /* + * Re-run the IRQ + */ + void (*rerun)(unsigned int irq); + /* + * Set the type of the IRQ. + */ + int (*type)(unsigned int irq, unsigned int, type); +}; + +ack - required. May be the same function as mask for IRQs + handled by do_level_IRQ. +mask - required. +unmask - required. +rerun - optional. Not required if you're using do_level_IRQ for all + IRQs that use this 'irqchip'. Generally expected to re-trigger + the hardware IRQ if possible. If not, may call the handler + directly. +type - optional. If you don't support changing the type of an IRQ, + it should be null so people can detect if they are unable to + set the IRQ type. + +For each IRQ, we keep the following information: + + - "disable" depth (number of disable_irq()s without enable_irq()s) + - flags indicating what we can do with this IRQ (valid, probe, + noautounmask) as before + - status of the IRQ (probing, enable, etc) + - chip + - per-IRQ handler + - irqaction structure list + +The handler can be one of the 3 standard handlers - "level", "edge" and +"simple", or your own specific handler if you need to do something special. + +The "level" handler is what we currently have - its pretty simple. +"edge" knows about the brokenness of such IRQ implementations - that you +need to leave the hardware IRQ enabled while processing it, and queueing +further IRQ events should the IRQ happen again while processing. The +"simple" handler is very basic, and does not perform any hardware +manipulation, nor state tracking. This is useful for things like the +SMC9196 and USAR above. + +So, what's changed? + +1. Machine implementations must not write to the irqdesc array. + +2. New functions to manipulate the irqdesc array. The first 4 are expected + to be useful only to machine specific code. The last is recommended to + only be used by machine specific code, but may be used in drivers if + absolutely necessary. + + set_irq_chip(irq,chip) + + Set the mask/unmask methods for handling this IRQ + + set_irq_handler(irq,handler) + + Set the handler for this IRQ (level, edge, simple) + + set_irq_chained_handler(irq,handler) + + Set a "chained" handler for this IRQ - automatically + enables this IRQ (eg, Neponset and SA1111 handlers). + + set_irq_flags(irq,flags) + + Set the valid/probe/noautoenable flags. + + set_irq_type(irq,type) + + Set active the IRQ edge(s)/level. This replaces the + SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge() + function. Type should be one of the following: + + #define IRQT_NOEDGE (0) + #define IRQT_RISING (__IRQT_RISEDGE) + #define IRQT_FALLING (__IRQT_FALEDGE) + #define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE) + #define IRQT_LOW (__IRQT_LOWLVL) + #define IRQT_HIGH (__IRQT_HIGHLVL) + +3. set_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type. + +4. Direct access to SA1111 INTPOL is depreciated. Use set_irq_type instead. + +5. A handler is expected to perform any necessary acknowledgement of the + parent IRQ via the correct chip specific function. For instance, if + the SA1111 is directly connected to a SA1110 GPIO, then you should + acknowledge the SA1110 IRQ each time you re-read the SA1111 IRQ status. + +6. For any child which doesn't have its own IRQ enable/disable controls + (eg, SMC9196), the handler must mask or acknowledge the parent IRQ + while the child handler is called, and the child handler should be the + "simple" handler (not "edge" nor "level"). After the handler completes, + the parent IRQ should be unmasked, and the status of all children must + be re-checked for pending events. (see the Neponset IRQ handler for + details). + +7. fixup_irq() is gone, as is include/asm-arm/arch-*/irq.h + +Please note that this will not solve all problems - some of them are +hardware based. Mixing level-based and edge-based IRQs on the same +parent signal (eg neponset) is one such area where a software based +solution can't provide the full answer to low IRQ latency. + diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index f90e82eb02fd..035f0f43699a 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -124,6 +124,7 @@ EXPORT_SYMBOL(__bad_xchg); EXPORT_SYMBOL(__readwrite_bug); EXPORT_SYMBOL(enable_irq); EXPORT_SYMBOL(disable_irq); +EXPORT_SYMBOL(set_irq_type); EXPORT_SYMBOL(pm_idle); EXPORT_SYMBOL(pm_power_off); diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 5f1b991465c5..6ff4db35368b 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -91,17 +91,8 @@ asmlinkage extern int ecard_loader_reset(volatile unsigned char *pa, loader_t loader); asmlinkage extern int ecard_loader_read(int off, volatile unsigned char *pa, loader_t loader); -extern int setup_arm_irq(int, struct irqaction *); -extern void do_ecard_IRQ(int, struct pt_regs *); -static void -ecard_irq_noexpmask(int intr_no, void *dev_id, struct pt_regs *regs); - -static struct irqaction irqexpansioncard = { - ecard_irq_noexpmask, SA_INTERRUPT, 0, "expansion cards", NULL, NULL -}; - static inline unsigned short ecard_getu16(unsigned char *v) { @@ -558,7 +549,7 @@ static expansioncard_ops_t ecard_default_ops = { * * They are not meant to be called directly, but via enable/disable_irq. */ -static void ecard_enableirq(unsigned int irqnr) +static void ecard_irq_mask(unsigned int irqnr) { ecard_t *ec = slot_to_ecard(irqnr - 32); @@ -574,7 +565,7 @@ static void ecard_enableirq(unsigned int irqnr) } } -static void ecard_disableirq(unsigned int irqnr) +static void ecard_irq_unmask(unsigned int irqnr) { ecard_t *ec = slot_to_ecard(irqnr - 32); @@ -587,6 +578,12 @@ static void ecard_disableirq(unsigned int irqnr) } } +static struct irqchip ecard_chip = { + ack: ecard_irq_mask, + mask: ecard_irq_mask, + unmask: ecard_irq_unmask, +}; + void ecard_enablefiq(unsigned int fiqnr) { ecard_t *ec = slot_to_ecard(fiqnr); @@ -632,8 +629,7 @@ ecard_dump_irq_state(ecard_t *ec) ec->irqaddr, ec->irqmask, *ec->irqaddr); } -static void -ecard_check_lockup(void) +static void ecard_check_lockup(struct irqdesc *desc) { static int last, lockup; ecard_t *ec; @@ -653,7 +649,7 @@ ecard_check_lockup(void) printk(KERN_ERR "\nInterrupt lockup detected - " "disabling all expansion card interrupts\n"); - disable_irq(IRQ_EXPANSIONCARD); + desc->chip->mask(IRQ_EXPANSIONCARD); printk("Expansion card IRQ state:\n"); @@ -674,11 +670,12 @@ ecard_check_lockup(void) } static void -ecard_irq_noexpmask(int intr_no, void *dev_id, struct pt_regs *regs) +ecard_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) { ecard_t *ec; int called = 0; + desc->chip->mask(irq); for (ec = cards; ec; ec = ec->next) { int pending; @@ -691,14 +688,15 @@ ecard_irq_noexpmask(int intr_no, void *dev_id, struct pt_regs *regs) pending = ecard_default_ops.irqpending(ec); if (pending) { - do_ecard_IRQ(ec->irq, regs); + struct irqdesc *d = irq_desc + ec->irq; + d->handle(ec->irq, d, regs); called ++; } } - cli(); + desc->chip->unmask(irq); if (called == 0) - ecard_check_lockup(); + ecard_check_lockup(desc); } #ifdef HAS_EXPMASK @@ -714,20 +712,18 @@ static unsigned char first_set[] = }; static void -ecard_irq_expmask(int intr_no, void *dev_id, struct pt_regs *regs) +ecard_irqexp_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) { const unsigned int statusmask = 15; unsigned int status; status = __raw_readb(EXPMASK_STATUS) & statusmask; if (status) { - unsigned int slot; - ecard_t *ec; -again: - slot = first_set[status]; - ec = slot_to_ecard(slot); + unsigned int slot = first_set[status]; + ecard_t *ec = slot_to_ecard(slot); + if (ec->claimed) { - unsigned int oldexpmask; + struct irqdesc *d = irqdesc + ec->irq; /* * this ugly code is so that we can operate a * prioritorising system: @@ -740,17 +736,7 @@ again: * Serial cards should go in 0/1, ethernet/scsi in 2/3 * otherwise you will lose serial data at high speeds! */ - oldexpmask = have_expmask; - have_expmask &= priority_masks[slot]; - __raw_writeb(have_expmask, EXPMASK_ENABLE); - sti(); - do_ecard_IRQ(ec->irq, regs); - cli(); - have_expmask = oldexpmask; - __raw_writeb(have_expmask, EXPMASK_ENABLE); - status = __raw_readb(EXPMASK_STATUS) & statusmask; - if (status) - goto again; + d->handle(ec->irq, d, regs); } else { printk(KERN_WARNING "card%d: interrupt from unclaimed " "card???\n", slot); @@ -761,8 +747,7 @@ again: printk(KERN_WARNING "Wild interrupt from backplane (masks)\n"); } -static void __init -ecard_probeirqhw(void) +static int __init ecard_probeirqhw(void) { ecard_t *ec; int found; @@ -772,24 +757,24 @@ ecard_probeirqhw(void) found = (__raw_readb(EXPMASK_STATUS) & 15) == 0; __raw_writeb(0xff, EXPMASK_ENABLE); - if (!found) - return; - - printk(KERN_DEBUG "Expansion card interrupt " - "management hardware found\n"); + if (found) { + printk(KERN_DEBUG "Expansion card interrupt " + "management hardware found\n"); - irqexpansioncard.handler = ecard_irq_expmask; + /* for each card present, set a bit to '1' */ + have_expmask = 0x80000000; - /* for each card present, set a bit to '1' */ - have_expmask = 0x80000000; + for (ec = cards; ec; ec = ec->next) + have_expmask |= 1 << ec->slot_no; - for (ec = cards; ec; ec = ec->next) - have_expmask |= 1 << ec->slot_no; + __raw_writeb(have_expmask, EXPMASK_ENABLE); + } - __raw_writeb(have_expmask, EXPMASK_ENABLE); + return found; } #else -#define ecard_probeirqhw() +#define ecard_irqexp_handler NULL +#define ecard_probeirqhw() (0) #endif #ifndef IO_EC_MEMC8_BASE @@ -977,10 +962,9 @@ ecard_probe(int slot, card_type_t type) * hook the interrupt handlers */ if (ec->irq != 0 && ec->irq >= 32) { - irq_desc[ec->irq].mask_ack = ecard_disableirq; - irq_desc[ec->irq].mask = ecard_disableirq; - irq_desc[ec->irq].unmask = ecard_enableirq; - irq_desc[ec->irq].valid = 1; + set_irq_chip(ec->irq, &ecard_chip); + set_irq_handler(ec->irq, do_level_IRQ); + set_irq_flags(ec->irq, IRQF_VALID); } #ifdef CONFIG_ARCH_RPC @@ -1042,21 +1026,6 @@ ecard_t *ecard_find(int cid, const card_ids *cids) return finding_pos; } -static void __init ecard_free_all(void) -{ - ecard_t *ec, *ecn; - - for (ec = cards; ec; ec = ecn) { - ecn = ec->next; - - kfree(ec); - } - - cards = NULL; - - memset(slot_to_expcard, 0, sizeof(slot_to_expcard)); -} - /* * Initialise the expansion card system. * Locate all hardware - interrupt management and @@ -1064,7 +1033,7 @@ static void __init ecard_free_all(void) */ void __init ecard_init(void) { - int slot; + int slot, irqhw; /* * Register our reboot notifier @@ -1086,13 +1055,10 @@ void __init ecard_init(void) ecard_probe(8, ECARD_IOC); #endif - ecard_probeirqhw(); + irqhw = ecard_probeirqhw(); - if (setup_arm_irq(IRQ_EXPANSIONCARD, &irqexpansioncard)) { - printk(KERN_ERR "Unable to claim IRQ%d for expansion cards\n", - IRQ_EXPANSIONCARD); - ecard_free_all(); - } + set_irq_chained_handler(IRQ_EXPANSIONCARD, + irqhw ? ecard_irqexp_handler : ecard_irq_handler); ecard_proc_init(); } diff --git a/arch/arm/kernel/entry-armo.S b/arch/arm/kernel/entry-armo.S index 77c8ed015ce1..c1338c61fb0a 100644 --- a/arch/arm/kernel/entry-armo.S +++ b/arch/arm/kernel/entry-armo.S @@ -354,7 +354,7 @@ vector_IRQ: ldr r13, .LCirq @ I will leave this one in just in case... @ adr lr, 1b orr lr, lr, #0x08000003 @ Force SVC - bne do_IRQ + bne asm_do_IRQ mov why, #0 get_current_task r5 @@ -377,7 +377,7 @@ __irq_svc: teqp pc, #0x08000003 @ adr lr, 1b orr lr, lr, #0x08000003 @ Force SVC - bne do_IRQ @ Returns to 1b + bne asm_do_IRQ @ Returns to 1b SVC_RESTORE_ALL __irq_invalid: mov r0, sp diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index e6e9606f7265..b22409bcf978 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -34,8 +34,6 @@ #include #include -#include /* pick up fixup_irq definition */ - /* * Maximum IRQ count. Currently, this is arbitary. However, it should * not be set too low to prevent false triggering. Conversely, if it @@ -54,25 +52,44 @@ void (*init_arch_irq)(void) __initdata = NULL; /* * Dummy mask/unmask handler */ -static void dummy_mask_unmask_irq(unsigned int irq) +void dummy_mask_unmask_irq(unsigned int irq) { } +void do_bad_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) +{ + irq_err_count += 1; + printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq); +} + +static struct irqchip bad_chip = { + ack: dummy_mask_unmask_irq, + mask: dummy_mask_unmask_irq, + unmask: dummy_mask_unmask_irq, +}; + +static struct irqdesc bad_irq_desc = { + chip: &bad_chip, + handle: do_bad_IRQ, + depth: 1, +}; + /** * disable_irq - disable an irq and wait for completion * @irq: Interrupt to disable * - * Disable the selected interrupt line. + * Disable the selected interrupt line. We do this lazily. * - * This function may be called - with care - from IRQ context. + * This function may be called from IRQ context. */ void disable_irq(unsigned int irq) { + struct irqdesc *desc = irq_desc + irq; unsigned long flags; spin_lock_irqsave(&irq_controller_lock, flags); - irq_desc[irq].enabled = 0; - irq_desc[irq].mask(irq); + if (!desc->depth++) + desc->enabled = 0; spin_unlock_irqrestore(&irq_controller_lock, flags); } @@ -80,19 +97,35 @@ void disable_irq(unsigned int irq) * enable_irq - enable interrupt handling on an irq * @irq: Interrupt to enable * - * Re-enables the processing of interrupts on this IRQ line + * Re-enables the processing of interrupts on this IRQ line. + * Note that this may call the interrupt handler, so you may + * get unexpected results if you hold IRQs disabled. * * This function may be called from IRQ context. */ void enable_irq(unsigned int irq) { + struct irqdesc *desc = irq_desc + irq; unsigned long flags; + int pending = 0; spin_lock_irqsave(&irq_controller_lock, flags); - irq_desc[irq].probing = 0; - irq_desc[irq].triggered = 0; - irq_desc[irq].enabled = 1; - irq_desc[irq].unmask(irq); + if (unlikely(!desc->depth)) { + printk("enable_irq(%u) unbalanced from %p\n", irq, + __builtin_return_address(0)); + } else if (!--desc->depth) { + desc->probing = 0; + desc->enabled = 1; + desc->chip->unmask(irq); + pending = desc->pending; + desc->pending = 0; + /* + * If the interrupt was waiting to be processed, + * retrigger it. + */ + if (pending) + desc->chip->rerun(irq); + } spin_unlock_irqrestore(&irq_controller_lock, flags); } @@ -128,7 +161,7 @@ int show_interrupts(struct seq_file *p, void *v) * a large number if IRQs to appear in the same jiffie with the * same instruction pointer (or within 2 instructions). */ -static void check_irq_lock(struct irqdesc *desc, int irq, struct pt_regs *regs) +static int check_irq_lock(struct irqdesc *desc, int irq, struct pt_regs *regs) { unsigned long instr_ptr = instruction_pointer(regs); @@ -138,123 +171,283 @@ static void check_irq_lock(struct irqdesc *desc, int irq, struct pt_regs *regs) if (desc->lck_cnt > MAX_IRQ_CNT) { printk(KERN_ERR "IRQ LOCK: IRQ%d is locking the system, disabled\n", irq); - disable_irq(irq); + return 1; } } else { desc->lck_cnt = 0; desc->lck_pc = instruction_pointer(regs); desc->lck_jif = jiffies; } + return 0; +} + +static void +__do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs) +{ + unsigned int status; + + spin_unlock(&irq_controller_lock); + + if (!(action->flags & SA_INTERRUPT)) + __sti(); + + status = 0; + do { + status |= action->flags; + action->handler(irq, action->dev_id, regs); + action = action->next; + } while (action); + + if (status & SA_SAMPLE_RANDOM) + add_interrupt_randomness(irq); + + __cli(); + spin_lock(&irq_controller_lock); } /* - * do_IRQ handles all normal device IRQ's + * This is for software-decoded IRQs. The caller is expected to + * handle the ack, clear, mask and unmask issues. */ -asmlinkage void do_IRQ(int irq, struct pt_regs * regs) +void +do_simple_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) { - struct irqdesc * desc; - struct irqaction * action; - int cpu; + struct irqaction *action; + const int cpu = smp_processor_id(); + + desc->triggered = 1; + + irq_enter(cpu, irq); + kstat.irqs[cpu][irq]++; + + action = desc->action; + if (action) + __do_irq(irq, desc->action, regs); + + irq_exit(cpu, irq); +} + +/* + * Most edge-triggered IRQ implementations seem to take a broken + * approach to this. Hence the complexity. + */ +void +do_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) +{ + const int cpu = smp_processor_id(); - irq = fixup_irq(irq); + desc->triggered = 1; /* - * Some hardware gives randomly wrong interrupts. Rather - * than crashing, do something sensible. + * If we're currently running this IRQ, or its disabled, + * we shouldn't process the IRQ. Instead, turn on the + * hardware masks. */ - if (irq >= NR_IRQS) - goto bad_irq; + if (unlikely(desc->running || !desc->enabled)) + goto running; - desc = irq_desc + irq; + /* + * Acknowledge and clear the IRQ, but don't mask it. + */ + desc->chip->ack(irq); - spin_lock(&irq_controller_lock); - desc->mask_ack(irq); - spin_unlock(&irq_controller_lock); + /* + * Mark the IRQ currently in progress. + */ + desc->running = 1; - cpu = smp_processor_id(); irq_enter(cpu, irq); kstat.irqs[cpu][irq]++; - desc->triggered = 1; - /* Return with this interrupt masked if no action */ - action = desc->action; + do { + struct irqaction *action; - if (action) { - int status = 0; + action = desc->action; + if (!action) + break; - if (desc->nomask) { - spin_lock(&irq_controller_lock); - desc->unmask(irq); - spin_unlock(&irq_controller_lock); + if (desc->pending && desc->enabled) { + desc->pending = 0; + desc->chip->unmask(irq); } - if (!(action->flags & SA_INTERRUPT)) - __sti(); + __do_irq(irq, action, regs); + } while (desc->pending); - do { - status |= action->flags; - action->handler(irq, action->dev_id, regs); - action = action->next; - } while (action); - - if (status & SA_SAMPLE_RANDOM) - add_interrupt_randomness(irq); - __cli(); - - if (!desc->nomask && desc->enabled) { - spin_lock(&irq_controller_lock); - desc->unmask(irq); - spin_unlock(&irq_controller_lock); + irq_exit(cpu, irq); + + desc->running = 0; + + /* + * If we were disabled or freed, shut down the handler. + */ + if (likely(desc->action && !check_irq_lock(desc, irq, regs))) + return; + + running: + /* + * We got another IRQ while this one was masked or + * currently running. Delay it. + */ + desc->pending = 1; + desc->chip->mask(irq); + desc->chip->ack(irq); +} + +/* + * Level-based IRQ handler. Nice and simple. + */ +void +do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) +{ + struct irqaction *action; + const int cpu = smp_processor_id(); + + desc->triggered = 1; + + /* + * Acknowledge, clear _AND_ disable the interrupt. + */ + desc->chip->ack(irq); + + if (likely(desc->enabled)) { + irq_enter(cpu, irq); + kstat.irqs[cpu][irq]++; + + /* + * Return with this interrupt masked if no action + */ + action = desc->action; + if (action) { + __do_irq(irq, desc->action, regs); + + if (likely(desc->enabled && + !check_irq_lock(desc, irq, regs))) + desc->chip->unmask(irq); } } + irq_exit(cpu, irq); +} + +/* + * do_IRQ handles all hardware IRQ's. Decoded IRQs should not + * come via this function. Instead, they should provide their + * own 'handler' + */ +asmlinkage void asm_do_IRQ(int irq, struct pt_regs *regs) +{ + struct irqdesc *desc = irq_desc + irq; + /* - * Debug measure - hopefully we can continue if an - * IRQ lockup problem occurs... + * Some hardware gives randomly wrong interrupts. Rather + * than crashing, do something sensible. */ - check_irq_lock(desc, irq, regs); + if (irq >= NR_IRQS) + desc = &bad_irq_desc; - irq_exit(cpu, irq); + spin_lock(&irq_controller_lock); + desc->handle(irq, desc, regs); + spin_unlock(&irq_controller_lock); - if (softirq_pending(cpu)) + if (softirq_pending(smp_processor_id())) do_softirq(); - return; +} -bad_irq: - irq_err_count += 1; - printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq); - return; +void __set_irq_handler(unsigned int irq, irq_handler_t handle, int is_chained) +{ + struct irqdesc *desc; + unsigned long flags; + + if (irq >= NR_IRQS) { + printk(KERN_ERR "Trying to install handler for IRQ%d\n", irq); + return; + } + + if (handle == NULL) + handle = do_bad_IRQ; + + desc = irq_desc + irq; + + if (is_chained && desc->chip == &bad_chip) + printk(KERN_WARNING "Trying to install chained handler for IRQ%d\n", irq); + + spin_lock_irqsave(&irq_controller_lock, flags); + if (handle == do_bad_IRQ) { + desc->chip->mask(irq); + desc->chip->ack(irq); + desc->depth = 1; + desc->enabled = 0; + } + desc->handle = handle; + if (handle != do_bad_IRQ && is_chained) { + desc->valid = 0; + desc->probe_ok = 0; + desc->depth = 0; + desc->chip->unmask(irq); + } + spin_unlock_irqrestore(&irq_controller_lock, flags); } -#ifdef CONFIG_ARCH_ACORN -void do_ecard_IRQ(int irq, struct pt_regs *regs) +void set_irq_chip(unsigned int irq, struct irqchip *chip) { - struct irqdesc * desc; - struct irqaction * action; - int cpu; + struct irqdesc *desc; + unsigned long flags; + + if (irq >= NR_IRQS) { + printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq); + return; + } + + if (chip == NULL) + chip = &bad_chip; desc = irq_desc + irq; + spin_lock_irqsave(&irq_controller_lock, flags); + desc->chip = chip; + spin_unlock_irqrestore(&irq_controller_lock, flags); +} - cpu = smp_processor_id(); - kstat.irqs[cpu][irq]++; - desc->triggered = 1; +int set_irq_type(unsigned int irq, unsigned int type) +{ + struct irqdesc *desc; + unsigned long flags; + int ret = -ENXIO; - action = desc->action; + if (irq >= NR_IRQS) { + printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); + return -ENODEV; + } - if (action) { - do { - action->handler(irq, action->dev_id, regs); - action = action->next; - } while (action); - } else { - spin_lock(&irq_controller_lock); - desc->mask(irq); - spin_unlock(&irq_controller_lock); + desc = irq_desc + irq; + if (desc->chip->type) { + spin_lock_irqsave(&irq_controller_lock, flags); + ret = desc->chip->type(irq, type); + spin_unlock_irqrestore(&irq_controller_lock, flags); } + + return ret; +} + +void set_irq_flags(unsigned int irq, unsigned int iflags) +{ + struct irqdesc *desc; + unsigned long flags; + + if (irq >= NR_IRQS) { + printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq); + return; + } + + desc = irq_desc + irq; + spin_lock_irqsave(&irq_controller_lock, flags); + desc->valid = (iflags & IRQF_VALID) != 0; + desc->probe_ok = (iflags & IRQF_PROBE) != 0; + desc->noautoenable = (iflags & IRQF_NOAUTOEN) != 0; + spin_unlock_irqrestore(&irq_controller_lock, flags); } -#endif -int setup_arm_irq(int irq, struct irqaction * new) +int setup_irq(unsigned int irq, struct irqaction *new) { int shared = 0; struct irqaction *old, **p; @@ -302,11 +495,14 @@ int setup_arm_irq(int irq, struct irqaction * new) *p = new; if (!shared) { - desc->nomask = (new->flags & SA_IRQNOMASK) ? 1 : 0; - desc->probing = 0; + desc->probing = 0; + desc->running = 0; + desc->pending = 0; + desc->depth = 1; if (!desc->noautoenable) { + desc->depth = 0; desc->enabled = 1; - desc->unmask(irq); + desc->chip->unmask(irq); } } @@ -366,7 +562,7 @@ int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *) action->next = NULL; action->dev_id = dev_id; - retval = setup_arm_irq(irq, action); + retval = setup_irq(irq, action); if (retval) kfree(action); @@ -433,14 +629,12 @@ unsigned long probe_irq_on(void) */ spin_lock_irq(&irq_controller_lock); for (i = 0; i < NR_IRQS; i++) { - if (!irq_desc[i].valid || - !irq_desc[i].probe_ok || - irq_desc[i].action) + if (!irq_desc[i].probe_ok || irq_desc[i].action) continue; irq_desc[i].probing = 1; irq_desc[i].triggered = 0; - irq_desc[i].unmask(i); + irq_desc[i].chip->unmask(i); irqs += 1; } spin_unlock_irq(&irq_controller_lock); @@ -456,15 +650,13 @@ unsigned long probe_irq_on(void) */ spin_lock_irq(&irq_controller_lock); for (i = 0; i < NR_IRQS; i++) { - if (irq_desc[i].probing && - irq_desc[i].triggered) { + if (irq_desc[i].probing && irq_desc[i].triggered) { irq_desc[i].probing = 0; irqs -= 1; } } spin_unlock_irq(&irq_controller_lock); - /* now filter out any obviously spurious interrupts */ return irqs; } @@ -508,17 +700,12 @@ void __init init_irq_proc(void) void __init init_IRQ(void) { + struct irqdesc *desc; extern void init_dma(void); int irq; - for (irq = 0; irq < NR_IRQS; irq++) { - irq_desc[irq].probe_ok = 0; - irq_desc[irq].valid = 0; - irq_desc[irq].noautoenable = 0; - irq_desc[irq].mask_ack = dummy_mask_unmask_irq; - irq_desc[irq].mask = dummy_mask_unmask_irq; - irq_desc[irq].unmask = dummy_mask_unmask_irq; - } + for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++) + *desc = bad_irq_desc; init_arch_irq(); init_dma(); diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index e0ef62055ffe..39b50b5a7018 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -31,10 +31,16 @@ #include #include -extern int setup_arm_irq(int, struct irqaction *); extern rwlock_t xtime_lock; extern unsigned long wall_jiffies; +/* this needs a better home */ +spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED; + +#ifdef CONFIG_SA1100_RTC_MODULE +EXPORT_SYMBOL(rtc_lock); +#endif + /* change this if you have some constant time drift */ #define USECS_PER_JIFFY (1000000/HZ) diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c index 91f7c664e72b..90c9b93da6ee 100644 --- a/arch/arm/mach-clps711x/irq.c +++ b/arch/arm/mach-clps711x/irq.c @@ -26,7 +26,7 @@ #include -static void mask_irq_int1(unsigned int irq) +static void int1_mask(unsigned int irq) { u32 intmr1; @@ -35,7 +35,7 @@ static void mask_irq_int1(unsigned int irq) clps_writel(intmr1, INTMR1); } -static void mask_ack_irq_int1(unsigned int irq) +static void int1_ack(unsigned int irq) { u32 intmr1; @@ -53,7 +53,7 @@ static void mask_ack_irq_int1(unsigned int irq) } } -static void unmask_irq_int1(unsigned int irq) +static void int1_unmask(unsigned int irq) { u32 intmr1; @@ -62,7 +62,13 @@ static void unmask_irq_int1(unsigned int irq) clps_writel(intmr1, INTMR1); } -static void mask_irq_int2(unsigned int irq) +static struct irqchip int1_chip = { + ack: int1_ack, + mask: int1_mask, + unmask: int1_unmask, +}; + +static void int2_mask(unsigned int irq) { u32 intmr2; @@ -71,7 +77,7 @@ static void mask_irq_int2(unsigned int irq) clps_writel(intmr2, INTMR2); } -static void mask_ack_irq_int2(unsigned int irq) +static void int2_ack(unsigned int irq) { u32 intmr2; @@ -84,7 +90,7 @@ static void mask_ack_irq_int2(unsigned int irq) } } -static void unmask_irq_int2(unsigned int irq) +static void int2_unmask(unsigned int irq) { u32 intmr2; @@ -93,28 +99,26 @@ static void unmask_irq_int2(unsigned int irq) clps_writel(intmr2, INTMR2); } +static struct irqchip int2_chip = { + ack: int2_ack, + mask: int2_mask, + unmask: int2_unmask, +}; + void __init clps711x_init_irq(void) { unsigned int i; for (i = 0; i < NR_IRQS; i++) { if (INT1_IRQS & (1 << i)) { - irq_desc[i].valid = 1; - irq_desc[i].probe_ok = 1; - irq_desc[i].mask_ack = (INT1_ACK_IRQS & (1 << i)) ? - mask_ack_irq_int1 : - mask_irq_int1; - irq_desc[i].mask = mask_irq_int1; - irq_desc[i].unmask = unmask_irq_int1; + set_irq_handler(i, do_level_IRQ); + set_irq_chip(i, &int1_chip); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } if (INT2_IRQS & (1 << i)) { - irq_desc[i].valid = 1; - irq_desc[i].probe_ok = 1; - irq_desc[i].mask_ack = (INT2_ACK_IRQS & (1 << i)) ? - mask_ack_irq_int2 : - mask_irq_int2; - irq_desc[i].mask = mask_irq_int2; - irq_desc[i].unmask = unmask_irq_int2; + set_irq_handler(i, do_level_IRQ); + set_irq_chip(i, &int2_chip); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index b439af9cce60..5d14fce6368c 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -39,27 +39,31 @@ static void ebsa110_unmask_irq(unsigned int irq) { __raw_writeb(1 << irq, IRQ_MSET); } + +static struct irqchip ebsa110_irq_chip = { + ack: ebsa110_mask_irq, + mask: ebsa110_mask_irq, + unmask: ebsa110_unmask_irq, +}; static void __init ebsa110_init_irq(void) { unsigned long flags; - int irq; + unsigned int irq; - save_flags_cli (flags); + local_irq_save(flags); __raw_writeb(0xff, IRQ_MCLR); __raw_writeb(0x55, IRQ_MSET); __raw_writeb(0x00, IRQ_MSET); if (__raw_readb(IRQ_MASK) != 0x55) while (1); __raw_writeb(0xff, IRQ_MCLR); /* clear all interrupt enables */ - restore_flags (flags); + local_irq_restore(flags); for (irq = 0; irq < NR_IRQS; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = ebsa110_mask_irq; - irq_desc[irq].mask = ebsa110_mask_irq; - irq_desc[irq].unmask = ebsa110_unmask_irq; + set_irq_chip(irq, &ebsa110_irq_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-epxa10db/irq.c b/arch/arm/mach-epxa10db/irq.c index 0394f3799389..322dc61e39d9 100644 --- a/arch/arm/mach-epxa10db/irq.c +++ b/arch/arm/mach-epxa10db/irq.c @@ -18,28 +18,44 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include +#include +#include #include #include -#include #include #include #include -static void mask_irq(unsigned int irq) +static void epxa_mask_irq(unsigned int irq) { - __raw_writel(1 << irq, INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE))); + writel(1 << irq, INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE))); } -static void unmask_irq(unsigned int irq) +static void epxa_unmask_irq(unsigned int irq) { - __raw_writel(1 << irq, INT_MS(IO_ADDRESS(EXC_INT_CTRL00_BASE))); + writel(1 << irq, INT_MS(IO_ADDRESS(EXC_INT_CTRL00_BASE))); } + +static struct irqchip epxa_irq_chip = { + ack: epxa_mask_irq, + mask: epxa_mask_irq, + unmask: epxa_unmask_irq, +}; + +static struct resource irq_resource = { + name: "irq_handler", + start: IO_ADDRESS(EXC_INT_CTRL00_BASE), + end: IO_ADDRESS(INT_PRIORITY_FC(EXC_INT_CTRL00_BASE))+4, +}; + void __init epxa10db_init_irq(void) { unsigned int i; + request_resource(&iomem_resource, &irq_resource); + /* * This bit sets up the interrupt controller using * the 6 PLD interrupts mode (the default) each @@ -49,22 +65,15 @@ void __init epxa10db_init_irq(void) * on the contents of your PLD */ - __raw_writel(3,INT_MODE(IO_ADDRESS(EXC_INT_CTRL00_BASE))); + writel(3,INT_MODE(IO_ADDRESS(EXC_INT_CTRL00_BASE))); for (i = 0; i < NR_IRQS; i++){ - __raw_writel(i+1, INT_PRIORITY_P0(IO_ADDRESS(EXC_INT_CTRL00_BASE)) + (4*i)); - } - - - for (i = 0; i < NR_IRQS; i++) { - - irq_desc[i].valid = 1; - irq_desc[i].probe_ok = 1; - irq_desc[i].mask_ack = mask_irq; - irq_desc[i].mask = mask_irq; - irq_desc[i].unmask = unmask_irq; + writel(i+1, INT_PRIORITY_P0(IO_ADDRESS(EXC_INT_CTRL00_BASE)) + (4*i)); + set_irq_chip(i,&epxa_irq_chip); + set_irq_handler(i,do_level_IRQ); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } - /* Disable all interrupt */ - __raw_writel(-1,INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE))); + /* Disable all interrupts */ + writel(-1,INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE))); } diff --git a/arch/arm/mach-footbridge/Makefile b/arch/arm/mach-footbridge/Makefile index 08eb0dd8100a..5f8efedd76b8 100644 --- a/arch/arm/mach-footbridge/Makefile +++ b/arch/arm/mach-footbridge/Makefile @@ -11,7 +11,7 @@ O_TARGET := footbridge.o # Object file lists. -obj-y := arch.o dc21285.o dma.o irq.o mm.o +obj-y := arch.o dc21285.o dma.o irq.o isa-irq.o mm.o obj-m := obj-n := obj- := diff --git a/arch/arm/mach-footbridge/irq.c b/arch/arm/mach-footbridge/irq.c index 8bff6328ec89..6d8195fc4ac6 100644 --- a/arch/arm/mach-footbridge/irq.c +++ b/arch/arm/mach-footbridge/irq.c @@ -27,6 +27,8 @@ #include #include +extern void __init isa_init_irq(unsigned int irq); + /* * Footbridge IRQ translation table * Converts from our IRQ numbers into FootBridge masks @@ -64,9 +66,15 @@ static void fb_unmask_irq(unsigned int irq) *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)]; } +static struct irqchip fb_chip = { + ack: fb_mask_irq, + mask: fb_mask_irq, + unmask: fb_unmask_irq, +}; + static void __init __fb_init_irq(void) { - int irq; + unsigned int irq; /* * setup DC21285 IRQs @@ -75,128 +83,9 @@ static void __init __fb_init_irq(void) *CSR_FIQ_DISABLE = -1; for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = fb_mask_irq; - irq_desc[irq].mask = fb_mask_irq; - irq_desc[irq].unmask = fb_unmask_irq; - } -} - -extern int isa_irq; - -static void isa_mask_pic_lo_irq(unsigned int irq) -{ - unsigned int mask = 1 << (irq & 7); - - outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); -} - -static void isa_mask_ack_pic_lo_irq(unsigned int irq) -{ - unsigned int mask = 1 << (irq & 7); - - outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); - outb(0x20, PIC_LO); -} - -static void isa_unmask_pic_lo_irq(unsigned int irq) -{ - unsigned int mask = 1 << (irq & 7); - - outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO); -} - -static void isa_mask_pic_hi_irq(unsigned int irq) -{ - unsigned int mask = 1 << (irq & 7); - - outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); -} - -static void isa_mask_ack_pic_hi_irq(unsigned int irq) -{ - unsigned int mask = 1 << (irq & 7); - - outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); - outb(0x62, PIC_LO); - outb(0x20, PIC_HI); -} - -static void isa_unmask_pic_hi_irq(unsigned int irq) -{ - unsigned int mask = 1 << (irq & 7); - - outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI); -} - -static void no_action(int irq, void *dev_id, struct pt_regs *regs) -{ -} - -static struct irqaction irq_cascade = { handler: no_action, name: "cascade", }; -static struct resource pic1_resource = { "pic1", 0x20, 0x3f }; -static struct resource pic2_resource = { "pic2", 0xa0, 0xbf }; - -static void __init isa_init_irq(int irq) -{ - /* - * Setup, and then probe for an ISA PIC - * If the PIC is not there, then we - * ignore the PIC. - */ - outb(0x11, PIC_LO); - outb(_ISA_IRQ(0), PIC_MASK_LO); /* IRQ number */ - outb(0x04, PIC_MASK_LO); /* Slave on Ch2 */ - outb(0x01, PIC_MASK_LO); /* x86 */ - outb(0xf5, PIC_MASK_LO); /* pattern: 11110101 */ - - outb(0x11, PIC_HI); - outb(_ISA_IRQ(8), PIC_MASK_HI); /* IRQ number */ - outb(0x02, PIC_MASK_HI); /* Slave on Ch1 */ - outb(0x01, PIC_MASK_HI); /* x86 */ - outb(0xfa, PIC_MASK_HI); /* pattern: 11111010 */ - - outb(0x0b, PIC_LO); - outb(0x0b, PIC_HI); - - if (inb(PIC_MASK_LO) == 0xf5 && inb(PIC_MASK_HI) == 0xfa) { - outb(0xff, PIC_MASK_LO);/* mask all IRQs */ - outb(0xff, PIC_MASK_HI);/* mask all IRQs */ - isa_irq = irq; - } else - isa_irq = -1; - - if (isa_irq != -1) { - for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = isa_mask_ack_pic_lo_irq; - irq_desc[irq].mask = isa_mask_pic_lo_irq; - irq_desc[irq].unmask = isa_unmask_pic_lo_irq; - } - - for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = isa_mask_ack_pic_hi_irq; - irq_desc[irq].mask = isa_mask_pic_hi_irq; - irq_desc[irq].unmask = isa_unmask_pic_hi_irq; - } - - request_resource(&ioport_resource, &pic1_resource); - request_resource(&ioport_resource, &pic2_resource); - setup_arm_irq(IRQ_ISA_CASCADE, &irq_cascade); - setup_arm_irq(isa_irq, &irq_cascade); - - /* - * On the NetWinder, don't automatically - * enable ISA IRQ11 when it is requested. - * There appears to be a missing pull-up - * resistor on this line. - */ - if (machine_is_netwinder()) - irq_desc[_ISA_IRQ(11)].noautoenable = 1; + set_irq_chip(irq, &fb_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c new file mode 100644 index 000000000000..66cd1daf36bd --- /dev/null +++ b/arch/arm/mach-footbridge/isa-irq.c @@ -0,0 +1,170 @@ +/* + * linux/arch/arm/mach-footbridge/irq.c + * + * Copyright (C) 1996-2000 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 22-Aug-1998 RMK Restructured IRQ routines + * 03-Sep-1998 PJB Merged CATS support + * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder + * 26-Jan-1999 PJB Don't use IACK on CATS + * 16-Mar-1999 RMK Added autodetect of ISA PICs + */ +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include + +static void isa_mask_pic_lo_irq(unsigned int irq) +{ + unsigned int mask = 1 << (irq & 7); + + outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); +} + +static void isa_ack_pic_lo_irq(unsigned int irq) +{ + unsigned int mask = 1 << (irq & 7); + + outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); + outb(0x20, PIC_LO); +} + +static void isa_unmask_pic_lo_irq(unsigned int irq) +{ + unsigned int mask = 1 << (irq & 7); + + outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO); +} + +static struct irqchip isa_lo_chip = { + ack: isa_ack_pic_lo_irq, + mask: isa_mask_pic_lo_irq, + unmask: isa_unmask_pic_lo_irq, +}; + +static void isa_mask_pic_hi_irq(unsigned int irq) +{ + unsigned int mask = 1 << (irq & 7); + + outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); +} + +static void isa_ack_pic_hi_irq(unsigned int irq) +{ + unsigned int mask = 1 << (irq & 7); + + outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); + outb(0x62, PIC_LO); + outb(0x20, PIC_HI); +} + +static void isa_unmask_pic_hi_irq(unsigned int irq) +{ + unsigned int mask = 1 << (irq & 7); + + outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI); +} + +static struct irqchip isa_hi_chip = { + ack: isa_ack_pic_hi_irq, + mask: isa_mask_pic_hi_irq, + unmask: isa_unmask_pic_hi_irq, +}; + +static void no_action(int irq, void *dev_id, struct pt_regs *regs) +{ +} + +static void +isa_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) +{ + unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE; + + if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) { + do_bad_IRQ(isa_irq, desc, regs); + return; + } + + desc = irq_desc + isa_irq; + desc->handle(isa_irq, desc, regs); +} + +static struct irqaction irq_cascade = { handler: no_action, name: "cascade", }; +static struct resource pic1_resource = { "pic1", 0x20, 0x3f }; +static struct resource pic2_resource = { "pic2", 0xa0, 0xbf }; + +void __init isa_init_irq(unsigned int irq) +{ + /* + * Setup, and then probe for an ISA PIC + * If the PIC is not there, then we + * ignore the PIC. + */ + outb(0x11, PIC_LO); + outb(_ISA_IRQ(0), PIC_MASK_LO); /* IRQ number */ + outb(0x04, PIC_MASK_LO); /* Slave on Ch2 */ + outb(0x01, PIC_MASK_LO); /* x86 */ + outb(0xf5, PIC_MASK_LO); /* pattern: 11110101 */ + + outb(0x11, PIC_HI); + outb(_ISA_IRQ(8), PIC_MASK_HI); /* IRQ number */ + outb(0x02, PIC_MASK_HI); /* Slave on Ch1 */ + outb(0x01, PIC_MASK_HI); /* x86 */ + outb(0xfa, PIC_MASK_HI); /* pattern: 11111010 */ + + outb(0x0b, PIC_LO); + outb(0x0b, PIC_HI); + + if (inb(PIC_MASK_LO) == 0xf5 && inb(PIC_MASK_HI) == 0xfa) { + outb(0xff, PIC_MASK_LO);/* mask all IRQs */ + outb(0xff, PIC_MASK_HI);/* mask all IRQs */ + } else { + printk(KERN_INFO "IRQ: ISA PIC not found\n"); + irq = -1; + } + + if (irq != -1) { + for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { + set_irq_chip(irq, &isa_lo_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + + for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { + set_irq_chip(irq, &isa_hi_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + + request_resource(&ioport_resource, &pic1_resource); + request_resource(&ioport_resource, &pic2_resource); + setup_irq(IRQ_ISA_CASCADE, &irq_cascade); + + set_irq_chained_handler(irq, isa_irq_handler); + + /* + * On the NetWinder, don't automatically + * enable ISA IRQ11 when it is requested. + * There appears to be a missing pull-up + * resistor on this line. + */ + if (machine_is_netwinder()) + set_irq_flags(_ISA_IRQ(11), IRQF_VALID | + IRQF_PROBE | IRQF_NOAUTOEN); + } +} + + diff --git a/arch/arm/mach-integrator/irq.c b/arch/arm/mach-integrator/irq.c index 546ade9805fa..e830f8a3939e 100644 --- a/arch/arm/mach-integrator/irq.c +++ b/arch/arm/mach-integrator/irq.c @@ -46,21 +46,17 @@ static void sc_unmask_irq(unsigned int irq) { __raw_writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_SET); } + +static struct irqchip sc_chip = { + ack: sc_mask_irq, + mask: sc_mask_irq, + unmask: sc_unmask_irq, +}; void __init integrator_init_irq(void) { unsigned int i; - for (i = 0; i < NR_IRQS; i++) { - if (((1 << i) && INTEGRATOR_SC_VALID_INT) != 0) { - irq_desc[i].valid = 1; - irq_desc[i].probe_ok = 1; - irq_desc[i].mask_ack = sc_mask_irq; - irq_desc[i].mask = sc_mask_irq; - irq_desc[i].unmask = sc_unmask_irq; - } - } - /* Disable all interrupts initially. */ /* Do the core module ones */ __raw_writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR); @@ -68,4 +64,12 @@ void __init integrator_init_irq(void) /* do the header card stuff next */ __raw_writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR); __raw_writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR); + + for (i = 0; i < NR_IRQS; i++) { + if (((1 << i) && INTEGRATOR_SC_VALID_INT) != 0) { + set_irq_chip(i, &sc_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + } } diff --git a/arch/arm/mach-iop310/iop310-irq.c b/arch/arm/mach-iop310/iop310-irq.c index 1be67fc26932..4102d980fe75 100644 --- a/arch/arm/mach-iop310/iop310-irq.c +++ b/arch/arm/mach-iop310/iop310-irq.c @@ -29,40 +29,46 @@ extern void xs80200_init_irq(void); extern void do_IRQ(int, struct pt_regs *); -u32 iop310_mask = 0; +static u32 iop310_mask /* = 0 */; -static void -iop310_irq_mask (unsigned int irq) +static void iop310_irq_mask (unsigned int irq) { - iop310_mask |= (1 << (irq - IOP310_IRQ_OFS)); + iop310_mask ++; /* * No mask bits on the 80312, so we have to * mask everything from the outside! */ - xs80200_irq_mask(IRQ_XS80200_EXTIRQ); + if (iop310_mask == 1) { + disable_irq(IRQ_XS80200_EXTIRQ); + irq_desc[IRQ_XS80200_EXTIRQ].chip->mask(IRQ_XS80200_EXTIRQ); + } } -static void -iop310_irq_unmask (unsigned int irq) +static void iop310_irq_unmask (unsigned int irq) { - iop310_mask &= ~(1 << (irq - IOP310_IRQ_OFS)); + if (iop310_mask) + iop310_mask --; /* * Check if all 80312 sources are unmasked now */ - if(!iop310_mask) - { - xs80200_irq_unmask(IRQ_XS80200_EXTIRQ); - - } + if (iop310_mask == 0) + enable_irq(IRQ_XS80200_EXTIRQ); } -void iop310_irq_demux(int irq, void *dev_id, - struct pt_regs *regs) +struct irqchip ext_chip = { + ack: iop310_irq_mask, + mask: iop310_irq_mask, + unmask: iop310_irq_unmask, +}; + +void +iop310_irq_demux(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) { u32 fiq1isr = *((volatile u32*)IOP310_FIQ1ISR); u32 fiq2isr = *((volatile u32*)IOP310_FIQ2ISR); + struct irqdesc *d; unsigned int irqno = 0; if(fiq1isr) @@ -86,22 +92,22 @@ void iop310_irq_demux(int irq, void *dev_id, irqno = IRQ_IOP310_MU; } - do_IRQ(irqno, regs); + if (irqno) { + d = irq_desc + irqno; + d->handle(irqno, d, regs); + } } void __init iop310_init_irq(void) { - int i; + unsigned int i; for(i = IOP310_IRQ_OFS; i < NR_IOP310_IRQS; i++) { - irq_desc[i].valid = 1; - irq_desc[i].probe_ok = 1; - irq_desc[i].mask_ack = iop310_irq_mask; - irq_desc[i].mask = iop310_irq_mask; - irq_desc[i].unmask = iop310_irq_unmask; + set_irq_chip(i, &ext_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } xs80200_init_irq(); } - diff --git a/arch/arm/mach-iop310/iq80310-irq.c b/arch/arm/mach-iop310/iq80310-irq.c index 853dabe7d5dd..1e92040f79c9 100644 --- a/arch/arm/mach-iop310/iq80310-irq.c +++ b/arch/arm/mach-iop310/iq80310-irq.c @@ -27,121 +27,86 @@ #include -extern void xs80200_irq_mask(unsigned int); -extern void xs80200_irq_unmask(unsigned int); -extern void xs80200_init_irq(void); +extern void iop310_init_irq(void); +extern void iop310_irq_demux(unsigned int, struct irqdesc *, struct pt_regs *); -extern void do_IRQ(int, struct pt_regs *); +static void iq80310_irq_mask(unsigned int irq) +{ + *(volatile char *)IQ80310_INT_MASK |= (1 << (irq - IQ80310_IRQ_OFS)); +} -extern u32 iop310_mask; +static void iq80310_irq_unmask(unsigned int irq) +{ + *(volatile char *)IQ80310_INT_MASK &= ~(1 << (irq - IQ80310_IRQ_OFS)); +} -extern void iop310_irq_demux(int, void *, struct pt_regs *); +static struct irqchip iq80310_irq_chip = { + ack: iq80310_irq_mask, + mask: iq80310_irq_mask, + unmask: iq80310_irq_unmask, +}; -extern int iop310_init_irq(void); +extern struct irqchip ext_chip; static void -iq80310_irq_mask (unsigned int irq) +iq80310_cpld_irq_handler(unsigned int irq, struct irqdesc *desc, + struct pt_regs *regs) { - volatile char *mask = (volatile char *)IQ80310_INT_MASK; - *mask |= (1 << (irq - IQ80310_IRQ_OFS)); + unsigned int irq_stat = *(volatile u8*)IQ80310_INT_STAT; + unsigned int irq_mask = *(volatile u8*)IQ80310_INT_MASK; + unsigned int i, handled = 0; + struct irqdesc *d; + + desc->chip->ack(irq); /* - * There's no mask for PCI INT A-C, so we just mask out all - * external interrupts on the CPU. - * - * We set a bit of the iop310 mask so that the iop310_irq_mask - * function does not unmask EXTINT + * Mask out the interrupts which aren't enabled. */ - if (irq > IRQ_IQ80310_INTD) - { - xs80200_irq_mask(IRQ_XS80200_EXTIRQ); - iop310_mask |= (0x80000000 >> (irq - IRQ_IQ80310_INTD)); - } -} - -static void -iq80310_irq_unmask (unsigned int irq) -{ - volatile char *mask = (volatile char *)IQ80310_INT_MASK; - *mask &= ~(1 << (irq - IQ80310_IRQ_OFS)); + irq_stat &= 0x1f & ~irq_mask; /* - * See comment above + * Test each IQ80310 CPLD interrupt */ - if (irq > IRQ_IQ80310_INTD) - { - xs80200_irq_unmask(IRQ_XS80200_EXTIRQ); - iop310_mask &= ~((0x80000000 >> (irq - IRQ_IQ80310_INTD))); - } -} - -static void iq80310_cpld_irq_demux(int irq, void *dev_id, - struct pt_regs *regs) -{ - u8 irq_stat = *((volatile u8*)IQ80310_INT_STAT); - u8 irq_mask = *((volatile u8*)IQ80310_INT_MASK); - unsigned int irqno = 0xffffffff; - - // Needed? If IRQ is masked, it shouldn't get through... - irq_stat &= ~irq_mask; - - - if(irq_stat & 0x01) - irqno = IRQ_IQ80310_TIMER; - else if(irq_stat & 0x02) - irqno = IRQ_IQ80310_I82559; - else if(irq_stat & 0x04) - irqno = IRQ_IQ80310_UART1; - else if(irq_stat & 0x08) - irqno = IRQ_IQ80310_UART2; - else if(irq_stat & 0x10) - irqno = IRQ_IQ80310_INTD; - else if(system_rev) - { - irq_stat = *((volatile u8*)IQ80310_PCI_INT_STAT) & 0xf; - - if(irq_stat & 0x1) - irqno = IRQ_IQ80310_INTA; - else if(irq_stat & 0x2) - irqno = IRQ_IQ80310_INTB; - else if(irq_stat & 0x4) - irqno = IRQ_IQ80310_INTC; - } - else /* Running on a REV D.1 or older, assume PCI INTA */ - irqno = IRQ_IQ80310_INTA; + for (i = IRQ_IQ80310_TIMER, d = irq_desc + IRQ_IQ80310_TIMER; + irq_stat; i++, d++, irq_stat >>= 1) + if (irq_stat & 1) { + d->handle(i, d, regs); + handled++; + } /* - * If we didn't read a CPLD interrupt, we assume it's from - * a device on the chipset itself. + * If running on a board later than REV D.1, we can + * decode the PCI interrupt status. */ - if(irqno == 0xffffffff) - { - iop310_irq_demux(irq, dev_id, regs); - return; + if (system_rev) { + irq_stat = *((volatile u8*)IQ80310_PCI_INT_STAT) & 7; + + for (i = IRQ_IQ80310_INTA, d = irq_desc + IRQ_IQ80310_INTA; + irq_stat; i++, d++, irq_stat >>= 1) + if (irq_stat & 0x1) { + d->handle(i, d, regs); + handled++; + } } /* - * If on a REV D.1 or lower board, we just assumed INTA since - * PCI is not routed, and it may actually be an on-chip interrupt. + * If on a REV D.1 or lower board, we just assumed INTA + * since PCI is not routed, and it may actually be an + * on-chip interrupt. + * + * Note that we're giving on-chip interrupts slightly + * higher priority than PCI by handling them first. * - * Note that we're giving on-chip interrupts slightly higher - * priority than PCI by handling them first. + * On boards later than REV D.1, if we didn't read a + * CPLD interrupt, we assume it's from a device on the + * chipset itself. */ - if(irqno == IRQ_IQ80310_INTA && !system_rev) - iop310_irq_demux(irq, dev_id, regs); + if (system_rev == 0 || handled == 0) + iop310_irq_demux(irq, desc, regs); - do_IRQ(irqno, regs); + desc->chip->unmask(irq); } - -static struct irqaction iq80310_cpld_irq = { - name: "CPLD_IRQ", - handler: iq80310_cpld_irq_demux, - flags: SA_INTERRUPT -}; - -extern int setup_arm_irq(int, struct irqaction *); - void __init iq80310_init_irq(void) { volatile char *mask = (volatile char *)IQ80310_INT_MASK; @@ -154,17 +119,26 @@ void __init iq80310_init_irq(void) */ *IOP310_PIRSR = 0xff; - for (i = IQ80310_IRQ_OFS; i < NR_IRQS; i++) { - irq_desc[i].valid = 1; - irq_desc[i].probe_ok = 1; - irq_desc[i].mask_ack = iq80310_irq_mask; - irq_desc[i].mask = iq80310_irq_mask; - irq_desc[i].unmask = iq80310_irq_unmask; + /* + * Setup the IRQs in the FE820000/FE860000 registers + */ + for (i = IQ80310_IRQ_OFS; i <= IRQ_IQ80310_INTD; i++) { + set_irq_chip(i, &iq80310_irq_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + + /* + * Setup the PCI IRQs + */ + for (i = IRQ_IQ80310_INTA; i < IRQ_IQ80310_INTC; i++) { + set_irq_chip(i, &ext_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID); } *mask = 0xff; /* mask all sources */ - setup_arm_irq(IRQ_XS80200_EXTIRQ, &iq80310_cpld_irq); - /* enable only external IRQ in the INTCTL for now */ - asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (1<<1)); + set_irq_chained_handler(IRQ_XS80200_EXTIRQ, + &iq80310_cpld_irq_handler); } diff --git a/arch/arm/mach-iop310/iq80310-time.c b/arch/arm/mach-iop310/iq80310-time.c index 04040ab8500c..1b0fe176a249 100644 --- a/arch/arm/mach-iop310/iq80310-time.c +++ b/arch/arm/mach-iop310/iq80310-time.c @@ -11,25 +11,21 @@ * published by the Free Software Foundation. * */ - - -#include #include #include #include #include #include #include +#include #include -#include +#include #include #include - -#include -#include - +#include #include +#include static void iq80310_write_timer (u_long val) { @@ -109,14 +105,12 @@ static struct irqaction timer_irq = { }; -extern int setup_arm_irq(int, struct irqaction*); - void __init time_init(void) { volatile u_char *timer_en = (volatile u_char *)IQ80310_TIMER_EN; gettimeoffset = iq80310_gettimeoffset; - setup_arm_irq(IRQ_IQ80310_TIMER, &timer_irq); + setup_irq(IRQ_IQ80310_TIMER, &timer_irq); *timer_en = 0; iq80310_write_timer(LATCH); *timer_en |= 2; diff --git a/arch/arm/mach-iop310/xs80200-irq.c b/arch/arm/mach-iop310/xs80200-irq.c index bae1ad8f3586..d75532982559 100644 --- a/arch/arm/mach-iop310/xs80200-irq.c +++ b/arch/arm/mach-iop310/xs80200-irq.c @@ -20,45 +20,47 @@ #include -void -xs80200_irq_mask (unsigned int irq) +static void xs80200_irq_mask (unsigned int irq) { - long INTCTL; - asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (INTCTL)); + unsigned long intctl; + asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (intctl)); switch (irq) { - case IRQ_XS80200_BCU: INTCTL &= ~(1<<3); break; - case IRQ_XS80200_PMU: INTCTL &= ~(1<<2); break; - case IRQ_XS80200_EXTIRQ: INTCTL &= ~(1<<1); break; - case IRQ_XS80200_EXTFIQ: INTCTL &= ~(1<<0); break; + case IRQ_XS80200_BCU: intctl &= ~(1<<3); break; + case IRQ_XS80200_PMU: intctl &= ~(1<<2); break; + case IRQ_XS80200_EXTIRQ: intctl &= ~(1<<1); break; + case IRQ_XS80200_EXTFIQ: intctl &= ~(1<<0); break; } - asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (INTCTL)); + asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (intctl)); } -void -xs80200_irq_unmask (unsigned int irq) +static void xs80200_irq_unmask (unsigned int irq) { - long INTCTL; - asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (INTCTL)); + unsigned long intctl; + asm ("mrc p13, 0, %0, c0, c0, 0" : "=r" (intctl)); switch (irq) { - case IRQ_XS80200_BCU: INTCTL |= (1<<3); break; - case IRQ_XS80200_PMU: INTCTL |= (1<<2); break; - case IRQ_XS80200_EXTIRQ: INTCTL |= (1<<1); break; - case IRQ_XS80200_EXTFIQ: INTCTL |= (1<<0); break; + case IRQ_XS80200_BCU: intctl |= (1<<3); break; + case IRQ_XS80200_PMU: intctl |= (1<<2); break; + case IRQ_XS80200_EXTIRQ: intctl |= (1<<1); break; + case IRQ_XS80200_EXTFIQ: intctl |= (1<<0); break; } - asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (INTCTL)); + asm ("mcr p13, 0, %0, c0, c0, 0" : : "r" (intctl)); } +static struct irqchip xs80200_chip = { + ack: xs80200_irq_mask, + mask: xs80200_irq_mask, + unmask: xs80200_irq_unmask, +}; + void __init xs80200_init_irq(void) { - int i; + unsigned int i; + + asm("mcr p13, 0, %0, c0, c0, 0" : : "r" (0)); for (i = 0; i < NR_XS80200_IRQS; i++) { - irq_desc[i].valid = 1; - irq_desc[i].probe_ok = 0; - irq_desc[i].mask_ack = xs80200_irq_mask; - irq_desc[i].mask = xs80200_irq_mask; - irq_desc[i].unmask = xs80200_irq_unmask; + set_irq_chip(i, &xs80200_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID); } } - - diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index de88d4fba679..5deb068f670a 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -5,7 +5,7 @@ #include #include -static void rpc_mask_irq_ack_a(unsigned int irq) +static void iomd_ack_irq_a(unsigned int irq) { unsigned int val, mask; @@ -15,7 +15,7 @@ static void rpc_mask_irq_ack_a(unsigned int irq) iomd_writeb(mask, IOMD_IRQCLRA); } -static void rpc_mask_irq_a(unsigned int irq) +static void iomd_mask_irq_a(unsigned int irq) { unsigned int val, mask; @@ -24,7 +24,7 @@ static void rpc_mask_irq_a(unsigned int irq) iomd_writeb(val & ~mask, IOMD_IRQMASKA); } -static void rpc_unmask_irq_a(unsigned int irq) +static void iomd_unmask_irq_a(unsigned int irq) { unsigned int val, mask; @@ -33,7 +33,13 @@ static void rpc_unmask_irq_a(unsigned int irq) iomd_writeb(val | mask, IOMD_IRQMASKA); } -static void rpc_mask_irq_b(unsigned int irq) +static struct irqchip iomd_a_chip = { + ack: iomd_ack_irq_a, + mask: iomd_mask_irq_a, + unmask: iomd_unmask_irq_a, +}; + +static void iomd_mask_irq_b(unsigned int irq) { unsigned int val, mask; @@ -42,7 +48,7 @@ static void rpc_mask_irq_b(unsigned int irq) iomd_writeb(val & ~mask, IOMD_IRQMASKB); } -static void rpc_unmask_irq_b(unsigned int irq) +static void iomd_unmask_irq_b(unsigned int irq) { unsigned int val, mask; @@ -51,7 +57,13 @@ static void rpc_unmask_irq_b(unsigned int irq) iomd_writeb(val | mask, IOMD_IRQMASKB); } -static void rpc_mask_irq_dma(unsigned int irq) +static struct irqchip iomd_b_chip = { + ack: iomd_mask_irq_b, + mask: iomd_mask_irq_b, + unmask: iomd_unmask_irq_b, +}; + +static void iomd_mask_irq_dma(unsigned int irq) { unsigned int val, mask; @@ -60,7 +72,7 @@ static void rpc_mask_irq_dma(unsigned int irq) iomd_writeb(val & ~mask, IOMD_DMAMASK); } -static void rpc_unmask_irq_dma(unsigned int irq) +static void iomd_unmask_irq_dma(unsigned int irq) { unsigned int val, mask; @@ -69,7 +81,13 @@ static void rpc_unmask_irq_dma(unsigned int irq) iomd_writeb(val | mask, IOMD_DMAMASK); } -static void rpc_mask_irq_fiq(unsigned int irq) +static struct irqchip iomd_dma_chip = { + ack: iomd_mask_irq_dma, + mask: iomd_mask_irq_dma, + unmask: iomd_unmask_irq_dma, +}; + +static void iomd_mask_irq_fiq(unsigned int irq) { unsigned int val, mask; @@ -78,7 +96,7 @@ static void rpc_mask_irq_fiq(unsigned int irq) iomd_writeb(val & ~mask, IOMD_FIQMASK); } -static void rpc_unmask_irq_fiq(unsigned int irq) +static void iomd_unmask_irq_fiq(unsigned int irq) { unsigned int val, mask; @@ -87,9 +105,15 @@ static void rpc_unmask_irq_fiq(unsigned int irq) iomd_writeb(val | mask, IOMD_FIQMASK); } +static struct irqchip iomd_fiq_chip = { + ack: iomd_mask_irq_fiq, + mask: iomd_mask_irq_fiq, + unmask: iomd_unmask_irq_fiq, +}; + void __init rpc_init_irq(void) { - int irq; + unsigned int irq, flags; iomd_writeb(0, IOMD_IRQMASKA); iomd_writeb(0, IOMD_IRQMASKB); @@ -97,46 +121,41 @@ void __init rpc_init_irq(void) iomd_writeb(0, IOMD_DMAMASK); for (irq = 0; irq < NR_IRQS; irq++) { + flags = IRQF_VALID; + + if (irq <= 6 || (irq >= 9 && irq <= 15)) + flags |= IRQF_PROBE; + + if (irq == 21 || (irq >= 16 && irq <= 19) || + irq == IRQ_KEYBOARDTX) + flags |= IRQF_NOAUTOEN; + switch (irq) { - case 0 ... 6: - irq_desc[irq].probe_ok = 1; - case 7: - irq_desc[irq].valid = 1; - irq_desc[irq].mask_ack = rpc_mask_irq_ack_a; - irq_desc[irq].mask = rpc_mask_irq_a; - irq_desc[irq].unmask = rpc_unmask_irq_a; + case 0 ... 7: + set_irq_chip(irq, &iomd_a_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, flags); break; - case 9 ... 15: - irq_desc[irq].probe_ok = 1; - case 8: - irq_desc[irq].valid = 1; - irq_desc[irq].mask_ack = rpc_mask_irq_b; - irq_desc[irq].mask = rpc_mask_irq_b; - irq_desc[irq].unmask = rpc_unmask_irq_b; + case 8 ... 15: + set_irq_chip(irq, &iomd_b_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, flags); break; - case 16 ... 19: - case 21: - irq_desc[irq].noautoenable = 1; - case 20: - irq_desc[irq].valid = 1; - irq_desc[irq].mask_ack = rpc_mask_irq_dma; - irq_desc[irq].mask = rpc_mask_irq_dma; - irq_desc[irq].unmask = rpc_unmask_irq_dma; + case 16 ... 21: + set_irq_chip(irq, &iomd_dma_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, flags); break; case 64 ... 71: - irq_desc[irq].valid = 1; - irq_desc[irq].mask_ack = rpc_mask_irq_fiq; - irq_desc[irq].mask = rpc_mask_irq_fiq; - irq_desc[irq].unmask = rpc_unmask_irq_fiq; + set_irq_chip(irq, &iomd_fiq_chip); + set_irq_flags(irq, IRQF_VALID); break; } } - irq_desc[IRQ_KEYBOARDTX].noautoenable = 1; - init_FIQ(); } diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index e6cd1bdfddac..35d05f80e31b 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include @@ -89,7 +90,7 @@ static int __init assabet_init(void) /* * Set the IRQ edges */ - set_GPIO_IRQ_edge(GPIO_GPIO23, GPIO_RISING_EDGE); /* UCB1300 */ + set_irq_type(IRQ_GPIO23, IRQT_RISING); /* UCB1300 */ sa1100fb_lcd_power = assabet_lcd_power; sa1100fb_backlight_power = assabet_backlight_power; diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c index bdbb7b8280b2..bf2385ab4cd4 100644 --- a/arch/arm/mach-sa1100/cerf.c +++ b/arch/arm/mach-sa1100/cerf.c @@ -6,6 +6,7 @@ #include #include +#include #include #include @@ -26,12 +27,12 @@ static void __init cerf_init_irq(void) */ #ifdef CONFIG_SA1100_CERF_CPLD /* PDA Full serial port */ - set_GPIO_IRQ_edge(GPIO_GPIO3, GPIO_RISING_EDGE); + set_irq_type(IRQ_GPIO3, IRQT_RISING); /* PDA Bluetooth */ - set_GPIO_IRQ_edge(GPIO_GPIO2, GPIO_RISING_EDGE); + set_irq_type(IRQ_GPIO2, IRQT_RISING); #endif /* CONFIG_SA1100_CERF_CPLD */ - set_GPIO_IRQ_edge(GPIO_UCB1200_IRQ, GPIO_RISING_EDGE); + set_irq_type(IRQ_GPIO_UCB1200_IRQ, IRQT_RISING); } static void __init diff --git a/arch/arm/mach-sa1100/graphicsclient.c b/arch/arm/mach-sa1100/graphicsclient.c index 6bcfcbdaba25..9178fed76dec 100644 --- a/arch/arm/mach-sa1100/graphicsclient.c +++ b/arch/arm/mach-sa1100/graphicsclient.c @@ -25,8 +25,6 @@ #include #include -#include - #include "generic.h" @@ -68,6 +66,12 @@ static void ADS_unmask_irq0(unsigned int irq) ADS_INT_EN1 |= (1 << (irq - ADS_EXT_IRQ(0))); } +static struct irqchip ADS0_chip = { + ack: ADS_mask_and_ack_irq0, + mask: ADS_mask_irq0, + unmask: ADS_unmask_irq0, +}; + static void ADS_mask_and_ack_irq1(unsigned int irq) { int mask = (1 << (irq - ADS_EXT_IRQ(8))); @@ -85,9 +89,15 @@ static void ADS_unmask_irq1(unsigned int irq) ADS_INT_EN2 |= (1 << (irq - ADS_EXT_IRQ(8))); } +static struct irqchip ADS1_chip = { + ack: ADS_mask_and_ack_irq1, + mask: ADS_mask_irq1, + unmask: ADS_unmask_irq1, +}; + static void __init graphicsclient_init_irq(void) { - int irq; + unsigned int irq; /* First the standard SA1100 IRQs */ sa1100_init_irq(); @@ -100,18 +110,14 @@ static void __init graphicsclient_init_irq(void) ADS_INT_ST2 = 0xff; for (irq = ADS_EXT_IRQ(0); irq <= ADS_EXT_IRQ(7); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = ADS_mask_and_ack_irq0; - irq_desc[irq].mask = ADS_mask_irq0; - irq_desc[irq].unmask = ADS_unmask_irq0; + set_irq_chip(irq, &ADS0_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = ADS_EXT_IRQ(8); irq <= ADS_EXT_IRQ(15); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = ADS_mask_and_ack_irq1; - irq_desc[irq].mask = ADS_mask_irq1; - irq_desc[irq].unmask = ADS_unmask_irq1; + set_irq_chip(irq, &ADS1_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } set_GPIO_IRQ_edge(GPIO_GPIO0, GPIO_FALLING_EDGE); setup_arm_irq( IRQ_GPIO0, &ADS_ext_irq ); @@ -148,6 +154,8 @@ static struct gc_uart_ctrl_data_t gc_uart_ctrl_data[] = { { GPIO_GC_UART2_CTS, 0, NULL,NULL } }; +#error Old code. Someone needs to decide what to do with this +#if 0 static void graphicsclient_cts_intr(int irq, void *dev_id, struct pt_regs *regs) { @@ -243,6 +251,7 @@ graphicsclient_uart_close(struct uart_port *port, struct uart_info *info) return 0; } +#endif static u_int graphicsclient_get_mctrl(struct uart_port *port) { @@ -296,8 +305,6 @@ graphicsclient_uart_pm(struct uart_port *port, u_int state, u_int oldstate) } static struct sa1100_port_fns graphicsclient_port_fns __initdata = { - open: graphicsclient_uart_open, - close: graphicsclient_uart_close, get_mctrl: graphicsclient_get_mctrl, set_mctrl: graphicsclient_set_mctrl, pm: graphicsclient_uart_pm, diff --git a/arch/arm/mach-sa1100/graphicsmaster.c b/arch/arm/mach-sa1100/graphicsmaster.c index 4366a75bc572..c4e52db5e428 100644 --- a/arch/arm/mach-sa1100/graphicsmaster.c +++ b/arch/arm/mach-sa1100/graphicsmaster.c @@ -23,8 +23,6 @@ #include #include -#include - #include "generic.h" #include "sa1111.h" @@ -130,6 +128,12 @@ static void ADS_unmask_irq0(unsigned int irq) ADS_INT_EN1 |= (1 << (irq - ADS_EXT_IRQ(0))); } +static struct irqchip ADS0_chip = { + ack: ADS_mask_and_ack_irq0, + mask: ADS_mask_irq0, + unmask: ADS_unmask_irq0, +}; + static void ADS_mask_and_ack_irq1(unsigned int irq) { int mask = (1 << (irq - ADS_EXT_IRQ(8))); @@ -147,9 +151,15 @@ static void ADS_unmask_irq1(unsigned int irq) ADS_INT_EN2 |= (1 << (irq - ADS_EXT_IRQ(8))); } +static struct irqchip ADS1_chip = { + ack: ADS_mask_irq1, + mask: ADS_mask_irq1, + unmask: ADS_mask_irq1, +}; + static void __init graphicsmaster_init_irq(void) { - int irq; + unsigned int irq; /* First the standard SA1100 IRQs */ sa1100_init_irq(); @@ -162,18 +172,14 @@ static void __init graphicsmaster_init_irq(void) ADS_INT_ST2 = 0xff; for (irq = ADS_EXT_IRQ(0); irq <= ADS_EXT_IRQ(7); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = ADS_mask_and_ack_irq0; - irq_desc[irq].mask = ADS_mask_irq0; - irq_desc[irq].unmask = ADS_unmask_irq0; + set_irq_chip(irq, &ADS0_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_PROBE | IRQF_VALID); } for (irq = ADS_EXT_IRQ(8); irq <= ADS_EXT_IRQ(15); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = ADS_mask_and_ack_irq1; - irq_desc[irq].mask = ADS_mask_irq1; - irq_desc[irq].unmask = ADS_unmask_irq1; + set_irq_chip(irq, &ADS1_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_PROBE | IRQF_VALID); } set_GPIO_IRQ_edge(GPIO_GPIO0, GPIO_FALLING_EDGE); setup_arm_irq( IRQ_GPIO0, &ADS_ext_irq ); @@ -206,6 +212,8 @@ static struct map_desc graphicsmaster_io_desc[] __initdata = { LAST_DESC }; +#error Old code. Someone needs to decide what to do about this. +#if 0 static int graphicsmaster_uart_open(struct uart_port *port, struct uart_info *info) { int ret = 0; @@ -226,6 +234,7 @@ static int graphicsmaster_uart_open(struct uart_port *port, struct uart_info *in } return ret; } +#endif static u_int graphicsmaster_get_mctrl(struct uart_port *port) { @@ -279,7 +288,6 @@ graphicsmaster_uart_pm(struct uart_port *port, u_int state, u_int oldstate) } static struct sa1100_port_fns graphicsmaster_port_fns __initdata = { - open: graphicsmaster_uart_open, get_mctrl: graphicsmaster_get_mctrl, set_mctrl: graphicsmaster_set_mctrl, pm: graphicsmaster_uart_pm, diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 64021ff67a35..0524d5eeb688 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -19,7 +19,6 @@ #include #include #include -#include #include "generic.h" @@ -30,156 +29,170 @@ * This must be called *before* the appropriate IRQ is registered. * Use this instead of directly setting GRER/GFER. */ - static int GPIO_IRQ_rising_edge; static int GPIO_IRQ_falling_edge; +static int GPIO_IRQ_mask = (1 << 11) - 1; -void set_GPIO_IRQ_edge( int gpio_mask, int edge ) +static void sa1100_manual_rerun(unsigned int irq) { - int flags; - - local_irq_save(flags); - if (edge & GPIO_FALLING_EDGE) - GPIO_IRQ_falling_edge |= gpio_mask; - else - GPIO_IRQ_falling_edge &= ~gpio_mask; - if (edge & GPIO_RISING_EDGE) - GPIO_IRQ_rising_edge |= gpio_mask; - else - GPIO_IRQ_rising_edge &= ~gpio_mask; - GPDR &= ~gpio_mask; - GAFR &= ~gpio_mask; - restore_flags(flags); + struct pt_regs regs; + memset(®s, 0, sizeof(regs)); + irq_desc[irq].handle(irq, &irq_desc[irq], ®s); } -EXPORT_SYMBOL(set_GPIO_IRQ_edge); +#define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq)) +static int sa1100_gpio_type(unsigned int irq, unsigned int type) +{ + unsigned int mask; -/* - * We don't need to ACK IRQs on the SA1100 unless they're GPIOs - * this is for internal IRQs i.e. from 11 to 31. - */ + printk(KERN_DEBUG "IRQ%d: ", irq); -static void sa1100_mask_irq(unsigned int irq) -{ - ICMR &= ~(1 << irq); -} + if (irq <= 10) + mask = 1 << irq; + else + mask = GPIO11_27_MASK(irq); -static void sa1100_unmask_irq(unsigned int irq) -{ - ICMR |= (1 << irq); + if (type & __IRQT_RISEDGE) { + printk("rising "); + GPIO_IRQ_rising_edge |= mask; + } else + GPIO_IRQ_rising_edge &= ~mask; + if (type & __IRQT_FALEDGE) { + printk("falling "); + GPIO_IRQ_falling_edge |= mask; + } else + GPIO_IRQ_falling_edge &= ~mask; + + printk("edges\n"); + + GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask; + GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask; + + return 0; } /* * GPIO IRQs must be acknoledged. This is for IRQs from 0 to 10. */ - -static void sa1100_mask_and_ack_GPIO0_10_irq(unsigned int irq) +static void sa1100_low_gpio_ack(unsigned int irq) { - ICMR &= ~(1 << irq); GEDR = (1 << irq); } -static void sa1100_mask_GPIO0_10_irq(unsigned int irq) +static void sa1100_low_gpio_mask(unsigned int irq) { ICMR &= ~(1 << irq); } -static void sa1100_unmask_GPIO0_10_irq(unsigned int irq) +static void sa1100_low_gpio_unmask(unsigned int irq) { - GRER = (GRER & ~(1 << irq)) | (GPIO_IRQ_rising_edge & (1 << irq)); - GFER = (GFER & ~(1 << irq)) | (GPIO_IRQ_falling_edge & (1 << irq)); - ICMR |= (1 << irq); + ICMR |= 1 << irq; } +static struct irqchip sa1100_low_gpio_chip = { + ack: sa1100_low_gpio_ack, + mask: sa1100_low_gpio_mask, + unmask: sa1100_low_gpio_unmask, + rerun: sa1100_manual_rerun, + type: sa1100_gpio_type, +}; + /* - * Install handler for GPIO 11-27 edge detect interrupts + * IRQ11 (GPIO11 through 27) handler. We enter here with the + * irq_controller_lock held, and IRQs disabled. Decode the IRQ + * and call the handler. */ - -static int GPIO_11_27_enabled; /* enabled i.e. unmasked GPIO IRQs */ -static int GPIO_11_27_spurious; /* GPIOs that triggered when masked */ - -static void sa1100_GPIO11_27_demux(int irq, void *dev_id, - struct pt_regs *regs) +static void +sa1100_high_gpio_handler(unsigned int irq, struct irqdesc *desc, + struct pt_regs *regs) { - int i, spurious; + unsigned int mask; - while ((irq = (GEDR & 0xfffff800))) { + mask = GEDR & 0xfffff800; + do { /* - * We don't want to clear GRER/GFER when the corresponding - * IRQ is masked because we could miss a level transition - * i.e. an IRQ which need servicing as soon as it is - * unmasked. However, such situation should happen only - * during the loop below. Thus all IRQs which aren't - * enabled at this point are considered spurious. Those - * are cleared but only de-activated if they happen twice. + * clear down all currently active IRQ sources. + * We will be processing them all. */ - spurious = irq & ~GPIO_11_27_enabled; - if (spurious) { - GEDR = spurious; - GRER &= ~(spurious & GPIO_11_27_spurious); - GFER &= ~(spurious & GPIO_11_27_spurious); - GPIO_11_27_spurious |= spurious; - irq ^= spurious; - if (!irq) continue; - } - - for (i = 11; i <= 27; ++i) { - if (irq & (1<>= 11; + do { + if (mask & 1) + desc->handle(irq, desc, regs); + mask >>= 1; + irq++; + desc++; + } while (mask); + + mask = GEDR & 0xfffff800; + } while (mask); } -static struct irqaction GPIO11_27_irq = { - name: "GPIO 11-27", - handler: sa1100_GPIO11_27_demux, - flags: SA_INTERRUPT -}; - -static void sa1100_mask_and_ack_GPIO11_27_irq(unsigned int irq) +/* + * Like GPIO0 to 10, GPIO11-27 IRQs need to be handled specially. + * In addition, the IRQs are all collected up into one bit in the + * interrupt controller registers. + */ +static void sa1100_high_gpio_ack(unsigned int irq) { - int mask = (1 << GPIO_11_27_IRQ(irq)); - GPIO_11_27_spurious &= ~mask; - GPIO_11_27_enabled &= ~mask; + unsigned int mask = GPIO11_27_MASK(irq); + GEDR = mask; } -static void sa1100_mask_GPIO11_27_irq(unsigned int irq) +static void sa1100_high_gpio_mask(unsigned int irq) { - int mask = (1 << GPIO_11_27_IRQ(irq)); - GPIO_11_27_spurious &= ~mask; - GPIO_11_27_enabled &= ~mask; + unsigned int mask = GPIO11_27_MASK(irq); + + GPIO_IRQ_mask &= ~mask; + + GRER &= ~mask; + GFER &= ~mask; } -static void sa1100_unmask_GPIO11_27_irq(unsigned int irq) +static void sa1100_high_gpio_unmask(unsigned int irq) { - int mask = (1 << GPIO_11_27_IRQ(irq)); - if (GPIO_11_27_spurious & mask) { - /* - * We don't want to miss an interrupt that would have occurred - * while it was masked. Simulate it if it is the case. - */ - int state = GPLR; - if (((state & GPIO_IRQ_rising_edge) | - (~state & GPIO_IRQ_falling_edge)) & mask) - { - /* just in case it gets referenced: */ - struct pt_regs dummy; - - memzero(&dummy, sizeof(dummy)); - do_IRQ(irq, &dummy); - - /* we are being called recursively from do_IRQ() */ - return; - } - } - GPIO_11_27_enabled |= mask; - GRER = (GRER & ~mask) | (GPIO_IRQ_rising_edge & mask); - GFER = (GFER & ~mask) | (GPIO_IRQ_falling_edge & mask); + unsigned int mask = GPIO11_27_MASK(irq); + + GPIO_IRQ_mask |= mask; + + GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask; + GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask; +} + +static struct irqchip sa1100_high_gpio_chip = { + ack: sa1100_high_gpio_ack, + mask: sa1100_high_gpio_mask, + unmask: sa1100_high_gpio_unmask, + rerun: sa1100_manual_rerun, + type: sa1100_gpio_type, +}; + +/* + * We don't need to ACK IRQs on the SA1100 unless they're GPIOs + * this is for internal IRQs i.e. from 11 to 31. + */ +static void sa1100_mask_irq(unsigned int irq) +{ + ICMR &= ~(1 << irq); } +static void sa1100_unmask_irq(unsigned int irq) +{ + ICMR |= (1 << irq); +} + +static struct irqchip sa1100_normal_chip = { + ack: sa1100_mask_irq, + mask: sa1100_mask_irq, + unmask: sa1100_unmask_irq, + /* rerun should never be called */ +}; + static struct resource irq_resource = { name: "irqs", start: 0x90050000, @@ -188,7 +201,7 @@ static struct resource irq_resource = { void __init sa1100_init_irq(void) { - int irq; + unsigned int irq; request_resource(&iomem_resource, &irq_resource); @@ -210,33 +223,32 @@ void __init sa1100_init_irq(void) ICCR = 1; for (irq = 0; irq <= 10; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = sa1100_mask_and_ack_GPIO0_10_irq; - irq_desc[irq].mask = sa1100_mask_GPIO0_10_irq; - irq_desc[irq].unmask = sa1100_unmask_GPIO0_10_irq; + set_irq_chip(irq, &sa1100_low_gpio_chip); + set_irq_handler(irq, do_edge_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } - for (irq = 11; irq <= 31; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 0; - irq_desc[irq].mask_ack = sa1100_mask_irq; - irq_desc[irq].mask = sa1100_mask_irq; - irq_desc[irq].unmask = sa1100_unmask_irq; + for (irq = 12; irq <= 31; irq++) { + set_irq_chip(irq, &sa1100_normal_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID); } for (irq = 32; irq <= 48; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = sa1100_mask_and_ack_GPIO11_27_irq; - irq_desc[irq].mask = sa1100_mask_GPIO11_27_irq; - irq_desc[irq].unmask = sa1100_unmask_GPIO11_27_irq; + set_irq_chip(irq, &sa1100_high_gpio_chip); + set_irq_handler(irq, do_edge_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } - setup_arm_irq( IRQ_GPIO11_27, &GPIO11_27_irq ); + + /* + * Install handler for GPIO 11-27 edge detect interrupts + */ + set_irq_chip(IRQ_GPIO11_27, &sa1100_normal_chip); + set_irq_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler); /* * We generally don't want the LCD IRQ being * enabled as soon as we request it. */ - irq_desc[IRQ_LCD].noautoenable = 1; + set_irq_flags(IRQ_LCD, IRQF_VALID | IRQF_NOAUTOEN); } diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index e734ba81e580..e9ecf3498a6d 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include @@ -24,53 +23,78 @@ /* - * Install handler for Neponset IRQ. Yes, yes... we are way down the IRQ - * cascade which is not good for IRQ latency, but the hardware has been - * designed that way... + * Install handler for Neponset IRQ. Note that we have to loop here + * since the ETHERNET and USAR IRQs are level based, and we need to + * ensure that the IRQ signal is deasserted before returning. This + * is rather unfortunate. */ - -static void neponset_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs ) +static void +neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) { - int irr; + unsigned int irr; + + while (1) { + struct irqdesc *d; - for(;;){ - irr = IRR & (IRR_ETHERNET | IRR_USAR | IRR_SA1111); - /* Let's have all active IRQ bits high. - * Note: there is a typo in the Neponset user's guide - * for the SA1111 IRR level. + /* + * Acknowledge the parent IRQ. */ - irr ^= (IRR_ETHERNET | IRR_USAR); - if (!irr) break; + desc->chip->ack(irq); - if( irr & IRR_ETHERNET ) - do_IRQ(IRQ_NEPONSET_SMC9196, regs); + /* + * Read the interrupt reason register. Let's have all + * active IRQ bits high. Note: there is a typo in the + * Neponset user's guide for the SA1111 IRR level. + */ + irr = IRR ^ (IRR_ETHERNET | IRR_USAR); - if( irr & IRR_USAR ) - do_IRQ(IRQ_NEPONSET_USAR, regs); + if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) + break; - if( irr & IRR_SA1111 ) - sa1111_IRQ_demux(irq, dev_id, regs); + /* + * Since there is no individual mask, we have to + * mask the parent IRQ. This is safe, since we'll + * recheck the register for any pending IRQs. + */ + if (irr & (IRR_ETHERNET | IRR_USAR)) { + desc->chip->mask(irq); + + if (irr & IRR_ETHERNET) { + d = irq_desc + IRQ_NEPONSET_SMC9196; + d->handle(IRQ_NEPONSET_SMC9196, d, regs); + } + + if (irr & IRR_USAR) { + d = irq_desc + IRQ_NEPONSET_USAR; + d->handle(IRQ_NEPONSET_USAR, d, regs); + } + + desc->chip->unmask(irq); + } + + if (irr & IRR_SA1111) { + d = irq_desc + IRQ_NEPONSET_SA1111; + d->handle(IRQ_NEPONSET_SA1111, d, regs); + } } } -static struct irqaction neponset_irq = { - name: "Neponset", - handler: neponset_IRQ_demux, - flags: SA_INTERRUPT -}; - static void __init neponset_init_irq(void) { - sa1111_init_irq(-1); /* SA1111 IRQ not routed to a GPIO */ - - /* setup extra Neponset IRQs */ - irq_desc[IRQ_NEPONSET_SMC9196].valid = 1; - irq_desc[IRQ_NEPONSET_SMC9196].probe_ok = 1; - irq_desc[IRQ_NEPONSET_USAR].valid = 1; - irq_desc[IRQ_NEPONSET_USAR].probe_ok = 1; + /* + * Install handler for GPIO25. + */ + set_irq_type(IRQ_GPIO25, IRQT_RISING); + set_irq_chained_handler(IRQ_GPIO25, neponset_irq_handler); - set_GPIO_IRQ_edge(GPIO_GPIO25, GPIO_RISING_EDGE); - setup_arm_irq(IRQ_GPIO25, &neponset_irq); + /* + * Setup other Neponset IRQs. SA1111 will be done by the + * generic SA1111 code. + */ + set_irq_handler(IRQ_NEPONSET_SMC9196, do_simple_IRQ); + set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE); + set_irq_handler(IRQ_NEPONSET_USAR, do_simple_IRQ); + set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE); } static int __init neponset_init(void) @@ -101,6 +125,8 @@ static int __init neponset_init(void) return -ENODEV; } + neponset_init_irq(); + /* * Disable GPIO 0/1 drivers so the buttons work on the module. */ @@ -146,7 +172,10 @@ static int __init neponset_init(void) */ sa1110_mb_enable(); - neponset_init_irq(); + /* + * Initialise SA1111 IRQs + */ + sa1111_init_irq(IRQ_NEPONSET_SA1111); return 0; } diff --git a/arch/arm/mach-sa1100/sa1111.c b/arch/arm/mach-sa1100/sa1111.c index 481e2a643868..dab4cfbcf258 100644 --- a/arch/arm/mach-sa1100/sa1111.c +++ b/arch/arm/mach-sa1100/sa1111.c @@ -27,7 +27,6 @@ #include #include #include -#include #include @@ -40,70 +39,104 @@ struct resource sa1111_resource = { EXPORT_SYMBOL(sa1111_resource); /* - * SA1111 interrupt support + * SA1111 interrupt support. Since clearing an IRQ while there are + * active IRQs causes the interrupt output to pulse, the upper levels + * will call us again if there are more interrupts to process. */ -void sa1111_IRQ_demux(int irq, void *dev_id, struct pt_regs *regs) +static void +sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) { - unsigned long stat0, stat1; + unsigned int stat0, stat1, i; - while (1) { - int i; + desc->chip->ack(irq); - stat0 = INTSTATCLR0; - stat1 = INTSTATCLR1; + stat0 = INTSTATCLR0; + stat1 = INTSTATCLR1; - if (stat0 == 0 && stat1 == 0) - break; + if (stat0 == 0 && stat1 == 0) { + do_bad_IRQ(irq, desc, regs); + return; + } - for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) - if (stat0 & 1) - do_IRQ(i, regs); + for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) + if (stat0 & 1) + do_edge_IRQ(i, irq_desc + i, regs); - for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) - if (stat1 & 1) - do_IRQ(i, regs); - } + for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) + if (stat1 & 1) + do_edge_IRQ(i, irq_desc + i, regs); } #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START)) #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32)) +static void sa1111_ack_lowirq(unsigned int irq) +{ + INTSTATCLR0 = SA1111_IRQMASK_LO(irq); +} + +static void sa1111_mask_lowirq(unsigned int irq) +{ + INTEN0 &= ~SA1111_IRQMASK_LO(irq); +} + +static void sa1111_unmask_lowirq(unsigned int irq) +{ + INTEN0 |= SA1111_IRQMASK_LO(irq); +} + /* - * A note about masking IRQs: - * - * The GPIO IRQ edge detection only functions while the IRQ itself is - * enabled; edges are not detected while the IRQ is disabled. - * - * This is especially important for the PCMCIA signals, where we must - * pick up every transition. We therefore do not disable the IRQs - * while processing them. - * - * However, since we are changed to a GPIO on the host processor, - * all SA1111 IRQs will be disabled while we're processing any SA1111 - * IRQ. - * - * Note also that changing INTPOL while an IRQ is enabled will itself - * trigger an IRQ. + * Attempt to re-trigger the interrupt. The SA1111 contains a register + * (INTSET) which claims to do this. However, in practice no amount of + * manipulation of INTEN and INTSET guarantees that the interrupt will + * be triggered. In fact, its very difficult, if not impossible to get + * INTSET to re-trigger the interrupt. */ -static void sa1111_mask_and_ack_lowirq(unsigned int irq) +static void sa1111_rerun_lowirq(unsigned int irq) { unsigned int mask = SA1111_IRQMASK_LO(irq); + int i; + + for (i = 0; i < 8; i++) { + INTPOL0 ^= mask; + INTPOL0 ^= mask; + if (INTSTATCLR1 & mask) + break; + } - //INTEN0 &= ~mask; - INTSTATCLR0 = mask; + if (i == 8) + printk(KERN_ERR "Danger Will Robinson: failed to " + "re-trigger IRQ%d\n", irq); } -static void sa1111_mask_and_ack_highirq(unsigned int irq) +static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) { - unsigned int mask = SA1111_IRQMASK_HI(irq); + unsigned int mask = SA1111_IRQMASK_LO(irq); + + if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) + return -EINVAL; + + printk("IRQ%d: %s edge\n", irq, flags & __IRQT_RISEDGE ? "rising" : "falling"); - //INTEN1 &= ~mask; - INTSTATCLR1 = mask; + if (flags & __IRQT_RISEDGE) + INTPOL0 &= ~mask; + else + INTPOL0 |= mask; + + return 0; } -static void sa1111_mask_lowirq(unsigned int irq) +static struct irqchip sa1111_low_chip = { + ack: sa1111_ack_lowirq, + mask: sa1111_mask_lowirq, + unmask: sa1111_unmask_lowirq, + rerun: sa1111_rerun_lowirq, + type: sa1111_type_lowirq, +}; + +static void sa1111_ack_highirq(unsigned int irq) { - INTEN0 &= ~SA1111_IRQMASK_LO(irq); + INTSTATCLR1 = SA1111_IRQMASK_HI(irq); } static void sa1111_mask_highirq(unsigned int irq) @@ -111,19 +144,63 @@ static void sa1111_mask_highirq(unsigned int irq) INTEN1 &= ~SA1111_IRQMASK_HI(irq); } -static void sa1111_unmask_lowirq(unsigned int irq) +static void sa1111_unmask_highirq(unsigned int irq) { - INTEN0 |= SA1111_IRQMASK_LO(irq); + INTEN1 |= SA1111_IRQMASK_HI(irq); } -static void sa1111_unmask_highirq(unsigned int irq) +/* + * Attempt to re-trigger the interrupt. The SA1111 contains a register + * (INTSET) which claims to do this. However, in practice no amount of + * manipulation of INTEN and INTSET guarantees that the interrupt will + * be triggered. In fact, its very difficult, if not impossible to get + * INTSET to re-trigger the interrupt. + */ +static void sa1111_rerun_highirq(unsigned int irq) { - INTEN1 |= SA1111_IRQMASK_HI(irq); + unsigned int mask = SA1111_IRQMASK_HI(irq); + int i; + + for (i = 0; i < 8; i++) { + INTPOL1 ^= mask; + INTPOL1 ^= mask; + if (INTSTATCLR1 & mask) + break; + } + + if (i == 8) + printk(KERN_ERR "Danger Will Robinson: failed to " + "re-trigger IRQ%d\n", irq); } +static int sa1111_type_highirq(unsigned int irq, unsigned int flags) +{ + unsigned int mask = SA1111_IRQMASK_HI(irq); + + if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) + return -EINVAL; + + printk("IRQ%d: %s edge\n", irq, flags & __IRQT_RISEDGE ? "rising" : "falling"); + + if (flags & __IRQT_RISEDGE) + INTPOL1 &= ~mask; + else + INTPOL1 |= mask; + + return 0; +} + +static struct irqchip sa1111_high_chip = { + ack: sa1111_ack_highirq, + mask: sa1111_mask_highirq, + unmask: sa1111_unmask_highirq, + rerun: sa1111_rerun_highirq, + type: sa1111_type_highirq, +}; + void __init sa1111_init_irq(int irq_nr) { - int irq, ret; + unsigned int irq; request_mem_region(_INTTEST0, 512, "irqs"); @@ -140,33 +217,26 @@ void __init sa1111_init_irq(int irq_nr) SA1111_IRQMASK_HI(S1_READY_NINT); /* clear all IRQs */ - INTSTATCLR0 = -1; - INTSTATCLR1 = -1; + INTSTATCLR0 = ~0; + INTSTATCLR1 = ~0; for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 0; - irq_desc[irq].mask_ack = sa1111_mask_and_ack_lowirq; - irq_desc[irq].mask = sa1111_mask_lowirq; - irq_desc[irq].unmask = sa1111_unmask_lowirq; + set_irq_chip(irq, &sa1111_low_chip); + set_irq_handler(irq, do_edge_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } + for (irq = AUDXMTDMADONEA; irq <= S1_BVD1_STSCHG; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 0; - irq_desc[irq].mask_ack = sa1111_mask_and_ack_highirq; - irq_desc[irq].mask = sa1111_mask_highirq; - irq_desc[irq].unmask = sa1111_unmask_highirq; + set_irq_chip(irq, &sa1111_high_chip); + set_irq_handler(irq, do_edge_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } - /* Register SA1111 interrupt */ - if (irq_nr < 0) - return; - - ret = request_irq(irq_nr, sa1111_IRQ_demux, SA_INTERRUPT, - "SA1111", NULL); - if (ret < 0) - printk(KERN_ERR "SA1111: unable to claim IRQ%d: %d\n", - irq_nr, ret); + /* + * Register SA1111 interrupt + */ + set_irq_type(irq_nr, IRQT_RISING); + set_irq_chained_handler(irq_nr, sa1111_irq_handler); } /** @@ -199,12 +269,12 @@ int __init sa1111_probe(unsigned long phys_addr) */ id = SBI_SKID; if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { - printk(KERN_DEBUG "SA-1111 not detected: ID = %08lx\n", id); + printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); ret = -ENODEV; goto release; } - printk(KERN_INFO "SA-1111 Microprocessor Companion Chip: " + printk(KERN_INFO "SA1111 Microprocessor Companion Chip: " "silicon revision %lx, metal revision %lx\n", (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK)); diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 8f5e76d1e220..3f897f5c98ce 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -93,7 +93,7 @@ static void __init simpad_map_io(void) sa1100_register_uart(0, 3); sa1100_register_uart(1, 1); - set_GPIO_IRQ_edge(GPIO_UCB1300_IRQ); + set_irq_type(IRQ_GPIO_UCB1300_IRQ, IRQT_RISING); } #ifdef CONFIG_PROC_FS diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c index 5ca894ae3354..c4831dfb8fc2 100644 --- a/arch/arm/mach-shark/irq.c +++ b/arch/arm/mach-shark/irq.c @@ -7,6 +7,12 @@ * include/asm-arm/arch-ebsa110/irq.h * Copyright (C) 1996-1998 Russell King */ + +#include +#include +#include +#include + #include #include #include @@ -31,12 +37,12 @@ static void shark_disable_8259A_irq(unsigned int irq) if (irq<8) { mask = 1 << irq; cached_irq_mask[0] |= mask; + outb(cached_irq_mask[1],0xA1); } else { mask = 1 << (irq-8); cached_irq_mask[1] |= mask; + outb(cached_irq_mask[0],0x21); } - outb(cached_irq_mask[1],0xA1); - outb(cached_irq_mask[0],0x21); } static void shark_enable_8259A_irq(unsigned int irq) @@ -45,31 +51,15 @@ static void shark_enable_8259A_irq(unsigned int irq) if (irq<8) { mask = ~(1 << irq); cached_irq_mask[0] &= mask; + outb(cached_irq_mask[0],0x21); } else { mask = ~(1 << (irq-8)); cached_irq_mask[1] &= mask; + outb(cached_irq_mask[1],0xA1); } - outb(cached_irq_mask[1],0xA1); - outb(cached_irq_mask[0],0x21); } -/* - * Careful! The 8259A is a fragile beast, it pretty - * much _has_ to be done exactly like this (mask it - * first, _then_ send the EOI, and the order of EOI - * to the two 8259s is important! - */ -static void shark_mask_and_ack_8259A_irq(unsigned int irq) -{ - if (irq & 8) { - cached_irq_mask[1] |= 1 << (irq-8); - inb(0xA1); /* DUMMY */ - outb(cached_irq_mask[1],0xA1); - } else { - cached_irq_mask[0] |= 1 << irq; - outb(cached_irq_mask[0],0x21); - } -} +static void shark_ack_8259A_irq(unsigned int irq){} static void bogus_int(int irq, void *dev_id, struct pt_regs *regs) { @@ -78,32 +68,30 @@ static void bogus_int(int irq, void *dev_id, struct pt_regs *regs) static struct irqaction cascade; +static struct irqchip fb_chip = { + ack: shark_ack_8259A_irq, + mask: shark_disable_8259A_irq, + unmask: shark_enable_8259A_irq, +}; + void __init shark_init_irq(void) { int irq; for (irq = 0; irq < NR_IRQS; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = shark_mask_and_ack_8259A_irq; - irq_desc[irq].mask = shark_disable_8259A_irq; - irq_desc[irq].unmask = shark_enable_8259A_irq; + set_irq_chip(irq, &fb_chip); + set_irq_handler(irq, do_edge_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } - /* The PICs are initialized to level triggered and auto eoi! - * If they are set to edge triggered they lose some IRQs, - * if they are set to manual eoi they get locked up after - * a short time - */ - /* init master interrupt controller */ - outb(0x19, 0x20); /* Start init sequence, level triggered */ + outb(0x11, 0x20); /* Start init sequence, edge triggered (level: 0x19)*/ outb(0x00, 0x21); /* Vector base */ outb(0x04, 0x21); /* Cascade (slave) on IRQ2 */ outb(0x03, 0x21); /* Select 8086 mode , auto eoi*/ outb(0x0A, 0x20); /* init slave interrupt controller */ - outb(0x19, 0xA0); /* Start init sequence, level triggered */ + outb(0x11, 0xA0); /* Start init sequence, edge triggered */ outb(0x08, 0xA1); /* Vector base */ outb(0x02, 0xA1); /* Cascade (slave) on IRQ2 */ outb(0x03, 0xA1); /* Select 8086 mode, auto eoi */ @@ -119,6 +107,6 @@ void __init shark_init_irq(void) cascade.name = "cascade"; cascade.next = NULL; cascade.dev_id = NULL; - setup_arm_irq(2,&cascade); + setup_irq(2,&cascade); } diff --git a/include/asm-arm/arch-adifcc/irq.h b/include/asm-arm/arch-adifcc/irq.h deleted file mode 100644 index 9477252c7971..000000000000 --- a/include/asm-arm/arch-adifcc/irq.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/include/asm-arm/arch-adifcc/irq.h - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#define fixup_irq(irq) (irq) - - diff --git a/include/asm-arm/arch-adifcc/irqs.h b/include/asm-arm/arch-adifcc/irqs.h index fc390753716a..b559ca79ef80 100644 --- a/include/asm-arm/arch-adifcc/irqs.h +++ b/include/asm-arm/arch-adifcc/irqs.h @@ -18,11 +18,3 @@ #define NR_IRQS NR_XS80200_IRQS #define IRQ_XSCALE_PMU IRQ_XS80200_PMU - -#ifdef CONFIG_XSCALE_ADI_EVB - -/* Interrupts available on the ADI Eval Board */ - -#endif - - diff --git a/include/asm-arm/arch-anakin/irq.h b/include/asm-arm/arch-anakin/irq.h deleted file mode 100644 index e31ec96b1cad..000000000000 --- a/include/asm-arm/arch-anakin/irq.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * linux/include/asm-arm/arch-anakin/irq.h - * - * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 10-Apr-2001 TTC Created - */ - -#ifndef __ASM_ARCH_IRQ_H -#define __ASM_ARCH_IRQ_H - -#define fixup_irq(i) i - -#endif diff --git a/include/asm-arm/arch-anakin/time.h b/include/asm-arm/arch-anakin/time.h index 88d1c6efee1e..68f92de7a87d 100644 --- a/include/asm-arm/arch-anakin/time.h +++ b/include/asm-arm/arch-anakin/time.h @@ -24,7 +24,7 @@ void __init time_init(void) { timer_irq.handler = anakin_timer_interrupt; timer_irq.flags = SA_INTERRUPT; - setup_arm_irq(IRQ_TICK, &timer_irq); + setup_irq(IRQ_TICK, &timer_irq); } #endif diff --git a/include/asm-arm/arch-arc/irq.h b/include/asm-arm/arch-arc/irq.h deleted file mode 100644 index 4951c6995168..000000000000 --- a/include/asm-arm/arch-arc/irq.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * linux/include/asm-arm/arch-arc/irq.h - * - * Copyright (C) 1996 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define fixup_irq(x) (x) diff --git a/include/asm-arm/arch-arc/time.h b/include/asm-arm/arch-arc/time.h index 394bb5388614..6d980227fc6c 100644 --- a/include/asm-arm/arch-arc/time.h +++ b/include/asm-arm/arch-arc/time.h @@ -30,5 +30,5 @@ void __init time_init(void) timer_irq.handler = timer_interrupt; - setup_arm_irq(IRQ_TIMER, &timer_irq); + setup_irq(IRQ_TIMER, &timer_irq); } diff --git a/include/asm-arm/arch-cl7500/time.h b/include/asm-arm/arch-cl7500/time.h index a63ea1e75dc4..adf3096e85da 100644 --- a/include/asm-arm/arch-cl7500/time.h +++ b/include/asm-arm/arch-cl7500/time.h @@ -37,5 +37,5 @@ void __init time_init(void) timer_irq.handler = timer_interrupt; - setup_arm_irq(IRQ_TIMER, &timer_irq); + setup_irq(IRQ_TIMER, &timer_irq); } diff --git a/include/asm-arm/arch-clps711x/irq.h b/include/asm-arm/arch-clps711x/irq.h deleted file mode 100644 index 7dde5e3f7096..000000000000 --- a/include/asm-arm/arch-clps711x/irq.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/irq.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define fixup_irq(i) (i) diff --git a/include/asm-arm/arch-clps711x/time.h b/include/asm-arm/arch-clps711x/time.h index d6040c294439..635356dd62b0 100644 --- a/include/asm-arm/arch-clps711x/time.h +++ b/include/asm-arm/arch-clps711x/time.h @@ -39,5 +39,5 @@ void __init time_init(void) { clps711x_setup_timer(); timer_irq.handler = p720t_timer_interrupt; - setup_arm_irq(IRQ_TC2OI, &timer_irq); + setup_irq(IRQ_TC2OI, &timer_irq); } diff --git a/include/asm-arm/arch-ebsa110/irq.h b/include/asm-arm/arch-ebsa110/irq.h deleted file mode 100644 index 4d83d1aaf7aa..000000000000 --- a/include/asm-arm/arch-ebsa110/irq.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/irq.h - * - * Copyright (C) 1996-1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 22-08-1998 RMK Restructured IRQ routines - */ -#define fixup_irq(i) (i) diff --git a/include/asm-arm/arch-ebsa110/time.h b/include/asm-arm/arch-ebsa110/time.h index b1bab596e9dc..278c8e3632a1 100644 --- a/include/asm-arm/arch-ebsa110/time.h +++ b/include/asm-arm/arch-ebsa110/time.h @@ -39,7 +39,7 @@ void __init time_init(void) timer_irq.handler = timer_interrupt; - setup_arm_irq(IRQ_EBSA110_TIMER0, &timer_irq); + setup_irq(IRQ_EBSA110_TIMER0, &timer_irq); } diff --git a/include/asm-arm/arch-ebsa285/irq.h b/include/asm-arm/arch-ebsa285/irq.h deleted file mode 100644 index a843e992f28c..000000000000 --- a/include/asm-arm/arch-ebsa285/irq.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/irq.h - * - * Copyright (C) 1996-1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 22-Aug-1998 RMK Restructured IRQ routines - * 03-Sep-1998 PJB Merged CATS support - * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder - * 26-Jan-1999 PJB Don't use IACK on CATS - * 16-Mar-1999 RMK Added autodetect of ISA PICs - */ -#include -#include -#include -#include - -int isa_irq = -1; - -static inline int fixup_irq(unsigned int irq) -{ -#ifdef PCIIACK_BASE - if (irq == isa_irq) - irq = *(unsigned char *)PCIIACK_BASE; -#endif - - return irq; -} - diff --git a/include/asm-arm/arch-ebsa285/time.h b/include/asm-arm/arch-ebsa285/time.h index 111bf6e306d8..7b40c671daad 100644 --- a/include/asm-arm/arch-ebsa285/time.h +++ b/include/asm-arm/arch-ebsa285/time.h @@ -270,5 +270,5 @@ void __init time_init(void) timer_irq.handler = isa_timer_interrupt; irq = IRQ_ISA_TIMER; } - setup_arm_irq(irq, &timer_irq); + setup_irq(irq, &timer_irq); } diff --git a/include/asm-arm/arch-epxa10db/irq.h b/include/asm-arm/arch-epxa10db/irq.h deleted file mode 100644 index a6c3f3adbb5b..000000000000 --- a/include/asm-arm/arch-epxa10db/irq.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-epxa10/irq.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define fixup_irq(i) (i) diff --git a/include/asm-arm/arch-epxa10db/time.h b/include/asm-arm/arch-epxa10db/time.h index 7f0e6a7c0d00..a025bbe65626 100644 --- a/include/asm-arm/arch-epxa10db/time.h +++ b/include/asm-arm/arch-epxa10db/time.h @@ -48,7 +48,7 @@ void __init time_init(void) /* * Make irqs happen for the system timer */ - setup_arm_irq(IRQ_TIMER0, &timer_irq); + setup_irq(IRQ_TIMER0, &timer_irq); /* Start the timer */ *TIMER0_LIMIT(IO_ADDRESS(EXC_TIMER00_BASE))=(unsigned int)(EXC_AHB2_CLK_FREQUENCY/200); diff --git a/include/asm-arm/arch-integrator/irq.h b/include/asm-arm/arch-integrator/irq.h deleted file mode 100644 index c07c83cf8e0f..000000000000 --- a/include/asm-arm/arch-integrator/irq.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/irq.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define fixup_irq(i) (i) diff --git a/include/asm-arm/arch-integrator/time.h b/include/asm-arm/arch-integrator/time.h index 40b48370c692..6ed75675387e 100644 --- a/include/asm-arm/arch-integrator/time.h +++ b/include/asm-arm/arch-integrator/time.h @@ -135,6 +135,6 @@ void __init time_init(void) /* * Make irqs happen for the system timer */ - setup_arm_irq(IRQ_TIMERINT1, &timer_irq); + setup_irq(IRQ_TIMERINT1, &timer_irq); gettimeoffset = integrator_gettimeoffset; } diff --git a/include/asm-arm/arch-iop310/irq.h b/include/asm-arm/arch-iop310/irq.h deleted file mode 100644 index 33c0866c1275..000000000000 --- a/include/asm-arm/arch-iop310/irq.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/include/asm-arm/arch-iop80310/irq.h - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#define fixup_irq(irq) (irq) - - diff --git a/include/asm-arm/arch-l7200/irq.h b/include/asm-arm/arch-l7200/irq.h deleted file mode 100644 index c605a8c28698..000000000000 --- a/include/asm-arm/arch-l7200/irq.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * include/asm-arm/arch-l7200/irq.h - * - * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.ne - * Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 01-02-2000 RS Created l7200 version, derived from ebsa110 code - * 04-15-2000 RS Made dependent on hardware.h - * 05-05-2000 SJH Complete rewrite - */ -#define fixup_irq(x) (x) diff --git a/include/asm-arm/arch-l7200/time.h b/include/asm-arm/arch-l7200/time.h index 27a872c63f01..727c32a96a89 100644 --- a/include/asm-arm/arch-l7200/time.h +++ b/include/asm-arm/arch-l7200/time.h @@ -58,7 +58,7 @@ void __init time_init(void) timer_irq.handler = timer_interrupt; - setup_arm_irq(IRQ_RTC_TICK, &timer_irq); + setup_irq(IRQ_RTC_TICK, &timer_irq); RTC_RTCCR = RTC_RATE_128 | RTC_EN_TIC; /* Set rate and enable timer */ } diff --git a/include/asm-arm/arch-nexuspci/irq.h b/include/asm-arm/arch-nexuspci/irq.h deleted file mode 100644 index 4690e88438bb..000000000000 --- a/include/asm-arm/arch-nexuspci/irq.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * include/asm-arm/arch-nexuspci/irq.h - * - * Copyright (C) 1998, 1999, 2000 Philip Blundell - */ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#define fixup_irq(x) (x) - diff --git a/include/asm-arm/arch-nexuspci/time.h b/include/asm-arm/arch-nexuspci/time.h index ba453c17637e..ba09e7bb3ee9 100644 --- a/include/asm-arm/arch-nexuspci/time.h +++ b/include/asm-arm/arch-nexuspci/time.h @@ -55,5 +55,5 @@ void __init time_init(void) timer_irq.handler = timer_interrupt; timer_irq.flags = SA_SHIRQ; - setup_arm_irq(IRQ_TIMER, &timer_irq); + setup_irq(IRQ_TIMER, &timer_irq); } diff --git a/include/asm-arm/arch-rpc/irq.h b/include/asm-arm/arch-rpc/irq.h deleted file mode 100644 index 4446afbb29a4..000000000000 --- a/include/asm-arm/arch-rpc/irq.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/irq.h - * - * Copyright (C) 1996 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 10-10-1996 RMK Brought up to date with arch-sa110eval - * 22-08-1998 RMK Restructured IRQ routines - */ -#define fixup_irq(x) (x) diff --git a/include/asm-arm/arch-rpc/time.h b/include/asm-arm/arch-rpc/time.h index 4fa255bc6fc7..189595c68fce 100644 --- a/include/asm-arm/arch-rpc/time.h +++ b/include/asm-arm/arch-rpc/time.h @@ -30,5 +30,5 @@ void __init time_init(void) timer_irq.handler = timer_interrupt; - setup_arm_irq(IRQ_TIMER, &timer_irq); + setup_irq(IRQ_TIMER, &timer_irq); } diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index 8ed40e5eff31..5c03f81403ea 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -87,22 +87,6 @@ typedef struct { volatile u32 offset[4096]; } __regbase; #include "SA-1100.h" - -/* - * SA1100 GPIO edge detection for IRQs: - * IRQs are generated on Falling-Edge, Rising-Edge, or both. - * This must be called *before* the corresponding IRQ is registered. - * Use this instead of directly setting GRER/GFER. - */ -#define GPIO_NO_EDGES 0 -#define GPIO_FALLING_EDGE 1 -#define GPIO_RISING_EDGE 2 -#define GPIO_BOTH_EDGES 3 -#ifndef __ASSEMBLY__ -extern void set_GPIO_IRQ_edge( int gpio_mask, int edge_mask ); -#endif - - /* * Implementation specifics. * diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h index 99d3d4bf7576..4db58c3c9588 100644 --- a/include/asm-arm/arch-sa1100/ide.h +++ b/include/asm-arm/arch-sa1100/ide.h @@ -113,7 +113,7 @@ ide_init_default_hwifs(void) /* Enable GPIO as interrupt line */ GPDR &= ~LART_GPIO_IDE; - set_GPIO_IRQ_edge(LART_GPIO_IDE, GPIO_RISING_EDGE); + set_irq_type(LART_IRQ_IDE, IRQT_RISING); /* set PCMCIA interface timing */ MECR = 0x00060006; diff --git a/include/asm-arm/arch-sa1100/irq.h b/include/asm-arm/arch-sa1100/irq.h deleted file mode 100644 index 56ae68a44e80..000000000000 --- a/include/asm-arm/arch-sa1100/irq.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/irq.h - * - * Author: Nicolas Pitre - */ - -#define fixup_irq(x) (x) - -/* - * This prototype is required for cascading of multiplexed interrupts. - * Since it doesn't exist elsewhere, we'll put it here for now. - */ -extern void do_IRQ(int irq, struct pt_regs *regs); diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h index cab7e59b1cd9..3105834da48c 100644 --- a/include/asm-arm/arch-sa1100/irqs.h +++ b/include/asm-arm/arch-sa1100/irqs.h @@ -148,6 +148,7 @@ */ #define IRQ_NEPONSET_SMC9196 (IRQ_BOARD_START + 0) #define IRQ_NEPONSET_USAR (IRQ_BOARD_START + 1) +#define IRQ_NEPONSET_SA1111 (IRQ_BOARD_START + 2) /* PT Digital Board Interrupts (CONFIG_SA1100_PT_SYSTEM3) */ #define IRQ_SYSTEM3_SMC9196 (IRQ_BOARD_START + 0) diff --git a/include/asm-arm/arch-sa1100/time.h b/include/asm-arm/arch-sa1100/time.h index 1f7dd3a84eba..5e459a32e8f8 100644 --- a/include/asm-arm/arch-sa1100/time.h +++ b/include/asm-arm/arch-sa1100/time.h @@ -98,7 +98,7 @@ void __init time_init(void) timer_irq.handler = sa1100_timer_interrupt; OSMR0 = 0; /* set initial match at 0 */ OSSR = 0xf; /* clear status on all timers */ - setup_arm_irq(IRQ_OST0, &timer_irq); + setup_irq(IRQ_OST0, &timer_irq); OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */ OSCR = 0; /* initialize free-running timer, force first match */ } diff --git a/include/asm-arm/arch-shark/irq.h b/include/asm-arm/arch-shark/irq.h deleted file mode 100644 index ec5c9108be4d..000000000000 --- a/include/asm-arm/arch-shark/irq.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/irq.h - * - * by Alexander Schulz - * - * derived from linux/arch/ppc/kernel/i8259.c and: - * include/asm-arm/arch-ebsa110/irq.h - * Copyright (C) 1996-1998 Russell King - */ -#define fixup_irq(x) (x) diff --git a/include/asm-arm/arch-tbox/irq.h b/include/asm-arm/arch-tbox/irq.h deleted file mode 100644 index dd73ba7957d2..000000000000 --- a/include/asm-arm/arch-tbox/irq.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * include/asm-arm/arch-tbox/irq.h - * - * Copyright (C) 1998, 1999, 2000 Philip Blundell - */ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#define fixup_irq(x) (x) diff --git a/include/asm-arm/arch-tbox/time.h b/include/asm-arm/arch-tbox/time.h index fd0dab923422..e50e1bdb9af8 100644 --- a/include/asm-arm/arch-tbox/time.h +++ b/include/asm-arm/arch-tbox/time.h @@ -32,5 +32,5 @@ static void timer_interrupt (int irq, void *dev_id, struct pt_regs *regs) void __init time_init(void) { timer_irq.handler = timer_interrupt; - setup_arm_irq(IRQ_TIMER, &timer_irq); + setup_irq(IRQ_TIMER, &timer_irq); } diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index ce59302433ce..057ec51b2394 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -24,5 +24,19 @@ extern void disable_irq(unsigned int); extern void enable_irq(unsigned int); +#define __IRQT_FALEDGE (1 << 0) +#define __IRQT_RISEDGE (1 << 1) +#define __IRQT_LOWLVL (1 << 2) +#define __IRQT_HIGHLVL (1 << 3) + +#define IRQT_NOEDGE (0) +#define IRQT_RISING (__IRQT_RISEDGE) +#define IRQT_FALLING (__IRQT_FALEDGE) +#define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE) +#define IRQT_LOW (__IRQT_LOWLVL) +#define IRQT_HIGH (__IRQT_HIGHLVL) + +int set_irq_type(unsigned int irq, unsigned int type); + #endif diff --git a/include/asm-arm/mach/irq.h b/include/asm-arm/mach/irq.h index 4ec067c930e1..2c172b1330f2 100644 --- a/include/asm-arm/mach/irq.h +++ b/include/asm-arm/mach/irq.h @@ -10,32 +10,110 @@ #ifndef __ASM_ARM_MACH_IRQ_H #define __ASM_ARM_MACH_IRQ_H +struct irqdesc; +struct pt_regs; +struct seq_file; + +typedef void (*irq_handler_t)(unsigned int, struct irqdesc *, struct pt_regs *); +typedef void (*irq_control_t)(unsigned int); + +struct irqchip { + /* + * Acknowledge the IRQ. + * If this is a level-based IRQ, then it is expected to mask the IRQ + * as well. + */ + void (*ack)(unsigned int); + /* + * Mask the IRQ in hardware. + */ + void (*mask)(unsigned int); + /* + * Unmask the IRQ in hardware. + */ + void (*unmask)(unsigned int); + /* + * Re-run the IRQ + */ + void (*rerun)(unsigned int); + /* + * Set the type of the IRQ. + */ + int (*type)(unsigned int, unsigned int); +}; + struct irqdesc { - unsigned int nomask : 1; /* IRQ does not mask in IRQ */ - unsigned int enabled : 1; /* IRQ is currently enabled */ - unsigned int triggered: 1; /* IRQ has occurred */ - unsigned int probing : 1; /* IRQ in use for a probe */ - unsigned int probe_ok : 1; /* IRQ can be used for probe */ - unsigned int valid : 1; /* IRQ claimable */ - unsigned int noautoenable : 1; /* don't automatically enable IRQ */ - unsigned int unused :25; - void (*mask_ack)(unsigned int irq); /* Mask and acknowledge IRQ */ - void (*mask)(unsigned int irq); /* Mask IRQ */ - void (*unmask)(unsigned int irq); /* Unmask IRQ */ + irq_handler_t handle; + struct irqchip *chip; struct irqaction *action; + + unsigned int enabled : 1; /* IRQ is currently enabled */ + unsigned int triggered: 1; /* IRQ has occurred */ + unsigned int running : 1; /* IRQ is running */ + unsigned int pending : 1; /* IRQ is pending */ + unsigned int probing : 1; /* IRQ in use for a probe */ + unsigned int probe_ok : 1; /* IRQ can be used for probe */ + unsigned int valid : 1; /* IRQ claimable */ + unsigned int noautoenable : 1; /* don't automatically enable IRQ */ + unsigned int unused :23; + unsigned int depth; /* disable depth */ + /* * IRQ lock detection */ - unsigned int lck_cnt; - unsigned int lck_pc; - unsigned int lck_jif; + unsigned int lck_cnt; + unsigned int lck_pc; + unsigned int lck_jif; }; extern struct irqdesc irq_desc[]; +/* + * This is internal. Do not use it. + */ extern void (*init_arch_irq)(void); -extern int setup_arm_irq(int, struct irqaction *); -extern int show_fiq_list(struct seq_file *, void *); extern void init_FIQ(void); +extern int show_fiq_list(struct seq_file *, void *); +void __set_irq_handler(unsigned int irq, irq_handler_t, int); +int setup_irq(unsigned int, struct irqaction *); + +/* + * External stuff. + */ +#define set_irq_handler(irq,handler) __set_irq_handler(irq,handler,0) +#define set_irq_chained_handler(irq,handler) __set_irq_handler(irq,handler,1) + +void set_irq_chip(unsigned int irq, struct irqchip *); +void set_irq_flags(unsigned int irq, unsigned int flags); + +#ifdef not_yet +/* + * This is to be used by the top-level machine IRQ decoder only. + */ +static inline void call_irq(struct pt_regs *regs, unsigned int irq) +{ + struct irqdesc *desc = irq_desc + irq; + + spin_lock(&irq_controller_lock); + desc->handle(irq, desc, regs); + spin_unlock(&irq_controller_lock); + + if (softirq_pending(smp_processor_id())) + do_softirq(); +} +#endif + +#define IRQF_VALID (1 << 0) +#define IRQF_PROBE (1 << 1) +#define IRQF_NOAUTOEN (1 << 2) + +/* + * Built-in IRQ handlers. + */ +void do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs); +void do_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs); +void do_simple_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs); +void do_bad_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs); +void dummy_mask_unmask_irq(unsigned int irq); #endif -- cgit v1.2.3 From b7783fa9871f201a1d1951b2da2d8b820a8466ba Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 25 Feb 2002 22:25:38 +0000 Subject: EPXA10DB/Camelot ARM machine updates. --- arch/arm/boot/Makefile | 4 + arch/arm/boot/compressed/Makefile | 4 + arch/arm/boot/compressed/head-epxa10db.S | 5 ++ arch/arm/boot/compressed/misc.c | 2 + arch/arm/def-configs/epxa10db | 128 ++++++++++++++++++----------- include/asm-arm/arch-epxa10db/uncompress.h | 12 ++- 6 files changed, 105 insertions(+), 50 deletions(-) create mode 100644 arch/arm/boot/compressed/head-epxa10db.S (limited to 'include') diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index 2817fbb83d47..1a045f06843f 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -54,6 +54,10 @@ INITRD_PHYS = 0x00800000 INITRD_VIRT = 0xc0800000 endif +ifeq ($(CONFIG_ARCH_CAMELOT),y) +ZTEXTADDR = 0x00008000 +endif + ifeq ($(CONFIG_ARCH_NEXUSPCI),y) ZTEXTADDR = 0x40008000 endif diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index cfdbe36925e6..112e8209ec53 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -33,6 +33,10 @@ ifeq ($(CONFIG_ARCH_INTEGRATOR),y) OBJS += head-integrator.o endif +ifeq ($(CONFIG_ARCH_CAMELOT),y) +OBJS += head-epxa10db.o +endif + ifeq ($(CONFIG_ARCH_FTVPCI),y) OBJS += head-ftvpci.o endif diff --git a/arch/arm/boot/compressed/head-epxa10db.S b/arch/arm/boot/compressed/head-epxa10db.S new file mode 100644 index 000000000000..211a16e6e744 --- /dev/null +++ b/arch/arm/boot/compressed/head-epxa10db.S @@ -0,0 +1,5 @@ +#include +#include + + .section ".start", #alloc, #execinstr + mov r7, #MACH_TYPE_CAMELOT diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c index 57f609fb167e..9e203e00ab2e 100644 --- a/arch/arm/boot/compressed/misc.c +++ b/arch/arm/boot/compressed/misc.c @@ -18,6 +18,8 @@ unsigned int __machine_arch_type; +#include + #include #include #include diff --git a/arch/arm/def-configs/epxa10db b/arch/arm/def-configs/epxa10db index cfb7506ffe6f..717859af4c65 100644 --- a/arch/arm/def-configs/epxa10db +++ b/arch/arm/def-configs/epxa10db @@ -8,6 +8,8 @@ CONFIG_ARM=y CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +# CONFIG_GENERIC_BUST_SPINLOCK is not set +# CONFIG_GENERIC_ISA_DMA is not set # # Code maturity level options @@ -25,6 +27,7 @@ CONFIG_MODULES=y # # System Type # +# CONFIG_ARCH_ADIFCC is not set # CONFIG_ARCH_ANAKIN is not set # CONFIG_ARCH_ARCA5K is not set # CONFIG_ARCH_CLPS7500 is not set @@ -34,6 +37,7 @@ CONFIG_MODULES=y CONFIG_ARCH_CAMELOT=y # CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP310 is not set # CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set @@ -62,12 +66,16 @@ CONFIG_ARCH_CAMELOT=y # CONFIG_SA1100_ADSBITSY is not set # CONFIG_SA1100_BRUTUS is not set # CONFIG_SA1100_CERF is not set +# CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set +# CONFIG_SA1100_H3XXX is not set # CONFIG_SA1100_EXTENEX1 is not set # CONFIG_SA1100_FLEXANET is not set # CONFIG_SA1100_FREEBIRD is not set # CONFIG_SA1100_GRAPHICSCLIENT is not set # CONFIG_SA1100_GRAPHICSMASTER is not set +# CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HUW_WEBPANEL is not set # CONFIG_SA1100_ITSY is not set @@ -76,20 +84,28 @@ CONFIG_ARCH_CAMELOT=y # CONFIG_SA1100_OMNIMETER is not set # CONFIG_SA1100_PANGOLIN is not set # CONFIG_SA1100_PLEB is not set +# CONFIG_SA1100_PT_SYSTEM3 is not set +# CONFIG_SA1100_SHANNON is not set # CONFIG_SA1100_SHERMAN is not set # CONFIG_SA1100_SIMPAD is not set # CONFIG_SA1100_PFS168 is not set # CONFIG_SA1100_VICTOR is not set # CONFIG_SA1100_XP860 is not set # CONFIG_SA1100_YOPY is not set +# CONFIG_SA1100_USB is not set +# CONFIG_SA1100_USB_NETLINK is not set +# CONFIG_SA1100_USB_CHAR is not set +# CONFIG_H3600_SLEEVE is not set # # CLPS711X/EP721X Implementations # +# CONFIG_ARCH_AUTCPU12 is not set # CONFIG_ARCH_CDB89712 is not set # CONFIG_ARCH_CLEP7312 is not set # CONFIG_ARCH_EDB7211 is not set # CONFIG_ARCH_P720T is not set +# CONFIG_ARCH_FORTUNET is not set # CONFIG_ARCH_EP7211 is not set # CONFIG_ARCH_EP7212 is not set # CONFIG_ARCH_ACORN is not set @@ -103,14 +119,17 @@ CONFIG_CPU_32v4=y # CONFIG_CPU_ARM610 is not set # CONFIG_CPU_ARM710 is not set # CONFIG_CPU_ARM720T is not set +# CONFIG_CPU_ARM920T is not set CONFIG_CPU_ARM922T=y -CONFIG_CPU_ARM92X_CPU_IDLE=y -CONFIG_CPU_ARM92X_I_CACHE_ON=y -CONFIG_CPU_ARM92X_D_CACHE_ON=y -# CONFIG_CPU_ARM92X_WRITETHROUGH is not set +CONFIG_CPU_ARM922_CPU_IDLE=y +CONFIG_CPU_ARM922_I_CACHE_ON=y +CONFIG_CPU_ARM922_D_CACHE_ON=y +# CONFIG_CPU_ARM922_WRITETHROUGH is not set +# CONFIG_CPU_ARM926T is not set # CONFIG_CPU_ARM1020 is not set # CONFIG_CPU_SA110 is not set # CONFIG_CPU_SA1100 is not set +# CONFIG_XSCALE_PMU is not set # CONFIG_ARM_THUMB is not set # CONFIG_DISCONTIGMEM is not set @@ -120,6 +139,7 @@ CONFIG_CPU_ARM92X_D_CACHE_ON=y # CONFIG_PCI is not set # CONFIG_ISA is not set # CONFIG_ISA_DMA is not set +# CONFIG_FIQ is not set # CONFIG_HOTPLUG is not set # CONFIG_PCMCIA is not set CONFIG_NET=y @@ -134,6 +154,7 @@ CONFIG_BINFMT_AOUT=y CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_MISC is not set # CONFIG_PM is not set +# CONFIG_APM is not set # CONFIG_ARTHUR is not set CONFIG_CMDLINE="console=ttyUA0,38400 root=/dev/mtdblock0 rw" CONFIG_ALIGNMENT_TRAP=y @@ -171,42 +192,28 @@ CONFIG_MTD_CFI_INTELEXT=y # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set # CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_AMDSTD is not set +# CONFIG_MTD_SHARP is not set +# CONFIG_MTD_JEDEC is not set # # Mapping drivers for chip access # # CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_SUN_UFLASH is not set # CONFIG_MTD_NORA is not set -# CONFIG_MTD_PNC2000 is not set -# CONFIG_MTD_RPXLITE is not set -# CONFIG_MTD_TQM8XXL is not set -# CONFIG_MTD_SC520CDP is not set -# CONFIG_MTD_NETSC520 is not set -# CONFIG_MTD_SBC_GXX is not set -# CONFIG_MTD_ELAN_104NC is not set -# CONFIG_MTD_DBOX2 is not set -# CONFIG_MTD_CSTM_MIPS_IXX is not set -CONFIG_MTD_EPXA10DB=y -# CONFIG_MTD_CFI_FLAGADM is not set -# CONFIG_MTD_SOLUTIONENGINE is not set -# CONFIG_MTD_MIXMEM is not set -# CONFIG_MTD_OCTAGON is not set -# CONFIG_MTD_VMAX is not set -# CONFIG_MTD_OCELOT is not set -# CONFIG_MTD_L440GX is not set # CONFIG_MTD_ARM_INTEGRATOR is not set # CONFIG_MTD_CDB89712 is not set # CONFIG_MTD_SA1100 is not set # CONFIG_MTD_DC21285 is not set # CONFIG_MTD_IQ80310 is not set +CONFIG_MTD_EPXA10DB=y +# CONFIG_MTD_PCI is not set # # Self-contained MTD device drivers # # CONFIG_MTD_PMC551 is not set # CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_LART is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLKMTD is not set # CONFIG_MTD_DOC1000 is not set @@ -224,7 +231,6 @@ CONFIG_MTD_EPXA10DB=y # # CONFIG_PNP is not set # CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set # # Block devices @@ -234,6 +240,7 @@ CONFIG_MTD_EPXA10DB=y # CONFIG_PARIDE is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_CISS_SCSI_TAPE is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set @@ -250,6 +257,7 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 # CONFIG_MD_RAID0 is not set # CONFIG_MD_RAID1 is not set # CONFIG_MD_RAID5 is not set +# CONFIG_MD_MULTIPATH is not set # CONFIG_BLK_DEV_LVM is not set # @@ -275,6 +283,7 @@ CONFIG_IP_PNP_BOOTP=y # CONFIG_IPV6 is not set # CONFIG_KHTTPD is not set # CONFIG_ATM is not set +# CONFIG_VLAN_8021Q is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_DECNET is not set @@ -311,7 +320,8 @@ CONFIG_NETDEVICES=y # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y -CONFIG_ETHER00=y +# CONFIG_ARM_AM79C961A is not set +CONFIG_ETHER00=m # CONFIG_SUNLANCE is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set @@ -343,8 +353,8 @@ CONFIG_PPP_MULTILINK=y # CONFIG_PPP_FILTER is not set CONFIG_PPP_ASYNC=y CONFIG_PPP_SYNC_TTY=y -CONFIG_PPP_DEFLATE=y -CONFIG_PPP_BSDCOMP=y +# CONFIG_PPP_DEFLATE is not set +# CONFIG_PPP_BSDCOMP is not set # CONFIG_PPPOE is not set # CONFIG_SLIP is not set @@ -437,12 +447,14 @@ CONFIG_SERIAL_UART00_CONSOLE=y # CONFIG_SERIAL_SA1100_CONSOLE is not set # CONFIG_SERIAL_8250 is not set # CONFIG_SERIAL_8250_CONSOLE is not set +# CONFIG_ATOMWIDE_SERIAL is not set +# CONFIG_DUALSP_SERIAL is not set # CONFIG_SERIAL_8250_EXTENDED is not set # CONFIG_SERIAL_8250_MANY_PORTS is not set # CONFIG_SERIAL_8250_SHARE_IRQ is not set # CONFIG_SERIAL_8250_DETECT_IRQ is not set # CONFIG_SERIAL_8250_MULTIPORT is not set -# CONFIG_SERIAL_8250_HUB6 is not set +# CONFIG_SERIAL_8250_RSA is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y @@ -460,7 +472,6 @@ CONFIG_UNIX98_PTY_COUNT=256 # CONFIG_L3_ALGOBIT is not set # CONFIG_L3_BIT_SA1100_GPIO is not set # CONFIG_L3_SA1111 is not set -# CONFIG_L3_DRV_UDA1341 is not set # CONFIG_BIT_SA1100_GPIO is not set # @@ -485,7 +496,6 @@ CONFIG_UNIX98_PTY_COUNT=256 # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -# CONFIG_SONYPI is not set # # Ftape, the floppy tape device driver @@ -513,7 +523,6 @@ CONFIG_UNIX98_PTY_COUNT=256 # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_BFS_FS is not set -# CONFIG_CMS_FS is not set # CONFIG_EXT3_FS is not set # CONFIG_JBD is not set # CONFIG_JBD_DEBUG is not set @@ -522,16 +531,17 @@ CONFIG_UNIX98_PTY_COUNT=256 # CONFIG_UMSDOS_FS is not set # CONFIG_VFAT_FS is not set # CONFIG_EFS_FS is not set -CONFIG_JFFS_FS=y -CONFIG_JFFS_FS_VERBOSE=0 -# CONFIG_JFFS2_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 # CONFIG_CRAMFS is not set -# CONFIG_TMPFS is not set -# CONFIG_RAMFS is not set +CONFIG_TMPFS=y +CONFIG_RAMFS=y # CONFIG_ISO9660_FS is not set # CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set # CONFIG_MINIX_FS is not set -# CONFIG_FREEVXFS_FS is not set +# CONFIG_VXFS_FS is not set # CONFIG_NTFS_FS is not set # CONFIG_NTFS_RW is not set # CONFIG_HPFS_FS is not set @@ -572,6 +582,8 @@ CONFIG_LOCKD=y # CONFIG_NCPFS_SMALLDOS is not set # CONFIG_NCPFS_NLS is not set # CONFIG_NCPFS_EXTRAS is not set +# CONFIG_ZISOFS_FS is not set +# CONFIG_ZLIB_FS_INFLATE is not set # # Partition Types @@ -581,10 +593,20 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_SMB_NLS is not set # CONFIG_NLS is not set +# +# Multimedia Capabilities Port drivers +# +# CONFIG_MCP is not set +# CONFIG_MCP_SA1100 is not set +# CONFIG_MCP_UCB1200 is not set +# CONFIG_MCP_UCB1200_AUDIO is not set +# CONFIG_MCP_UCB1200_TS is not set + # # USB support # # CONFIG_USB is not set +# CONFIG_USB_EHCI_HCD is not set # CONFIG_USB_UHCI is not set # CONFIG_USB_UHCI_ALT is not set # CONFIG_USB_OHCI is not set @@ -596,10 +618,10 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_USB_STORAGE_DATAFAB is not set # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_STORAGE_DPCM is not set # CONFIG_USB_STORAGE_HP8200e is not set # CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set # CONFIG_USB_DC2XX is not set @@ -607,8 +629,6 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_USB_SCANNER is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USB_HPUSBSCSI is not set -# CONFIG_USB_DABUSB is not set -# CONFIG_USB_PLUSB is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set @@ -627,21 +647,27 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_USB_SERIAL_EMPEG is not set # CONFIG_USB_SERIAL_FTDI_SIO is not set # CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set # CONFIG_USB_SERIAL_EDGEPORT is not set # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set # CONFIG_USB_SERIAL_KEYSPAN is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set # CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_KLSI is not set # CONFIG_USB_SERIAL_PL2303 is not set # CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set # CONFIG_USB_SERIAL_OMNINET is not set # CONFIG_USB_RIO500 is not set -# CONFIG_USB_ID75 is not set +# CONFIG_USB_AUERSWALD is not set # # Bluetooth support @@ -652,11 +678,21 @@ CONFIG_MSDOS_PARTITION=y # Kernel hacking # # CONFIG_NO_FRAME_POINTER is not set -CONFIG_DEBUG_ERRORS=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_INFO=y -CONFIG_MAGIC_SYSRQ=y +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_INFO is not set # CONFIG_NO_PGT_CACHE is not set -CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_WAITQ is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_LL is not set # CONFIG_DEBUG_DC21285_PORT is not set # CONFIG_DEBUG_CLPS711X_UART2 is not set + +# +# Library routines +# +# CONFIG_CRC32 is not set diff --git a/include/asm-arm/arch-epxa10db/uncompress.h b/include/asm-arm/arch-epxa10db/uncompress.h index 0b037724249c..f30a31fa5270 100644 --- a/include/asm-arm/arch-epxa10db/uncompress.h +++ b/include/asm-arm/arch-epxa10db/uncompress.h @@ -29,14 +29,18 @@ static void puts(const char *s) { while (*s) { - while ((*UART_TSR(IO_ADDRESS(EXC_UART00_BASE)) & UART_TSR_TX_LEVEL_MSK)==15); + while ((*UART_TSR(EXC_UART00_BASE) & + UART_TSR_TX_LEVEL_MSK)==15) + barrier(); - *UART_TD(IO_ADDRESS(EXC_UART00_BASE)) = *s; + *UART_TD(EXC_UART00_BASE) = *s; if (*s == '\n') { - while ((*UART_TSR(IO_ADDRESS(EXC_UART00_BASE)) & UART_TSR_TX_LEVEL_MSK)==15); + while ((*UART_TSR(EXC_UART00_BASE) & + UART_TSR_TX_LEVEL_MSK)==15) + barrier(); - *UART_TD(IO_ADDRESS(EXC_UART00_BASE)) = '\r'; + *UART_TD(EXC_UART00_BASE) = '\r'; } s++; } -- cgit v1.2.3 From 8afb2b635cfa155dd13ac6816e47adab0bcaae8e Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 25 Feb 2002 22:36:13 +0000 Subject: Add ARM BadgePAD4 machine support. --- arch/arm/config.in | 4 +- arch/arm/def-configs/badge4 | 923 +++++++++++++++++++++++++++++++++ arch/arm/mach-sa1100/badge4.c | 211 ++++++++ include/asm-arm/arch-sa1100/badge4.h | 74 +++ include/asm-arm/arch-sa1100/hardware.h | 2 + 5 files changed, 1213 insertions(+), 1 deletion(-) create mode 100644 arch/arm/def-configs/badge4 create mode 100644 arch/arm/mach-sa1100/badge4.c create mode 100644 include/asm-arm/arch-sa1100/badge4.h (limited to 'include') diff --git a/arch/arm/config.in b/arch/arm/config.in index 991a4e5e7f65..9442894a09a0 100644 --- a/arch/arm/config.in +++ b/arch/arm/config.in @@ -91,6 +91,7 @@ dep_bool ' FlexaNet' CONFIG_SA1100_FLEXANET $CONFIG_ARCH_SA1100 dep_bool ' FreeBird-v1.1' CONFIG_SA1100_FREEBIRD $CONFIG_ARCH_SA1100 dep_bool ' GraphicsClient Plus' CONFIG_SA1100_GRAPHICSCLIENT $CONFIG_ARCH_SA1100 dep_bool ' GraphicsMaster' CONFIG_SA1100_GRAPHICSMASTER $CONFIG_ARCH_SA1100 +dep_bool ' HP Labs BadgePAD 4' CONFIG_SA1100_BADGE4 $CONFIG_ARCH_SA1100 dep_bool ' HP Jornada 720' CONFIG_SA1100_JORNADA720 $CONFIG_ARCH_SA1100 dep_bool ' HuW WebPanel' CONFIG_SA1100_HUW_WEBPANEL $CONFIG_ARCH_SA1100 dep_bool ' Itsy' CONFIG_SA1100_ITSY $CONFIG_ARCH_SA1100 @@ -115,7 +116,8 @@ if [ "$CONFIG_ASSABET_NEPONSET" = "y" -o \ "$CONFIG_SA1100_XP860" = "y" -o \ "$CONFIG_SA1100_GRAPHICSMASTER" = "y" -o \ "$CONFIG_SA1100_PT_SYSTEM3" = "y" -o \ - "$CONFIG_SA1100_ADSBITSY" = "y" ]; then + "$CONFIG_SA1100_ADSBITSY" = "y" -o \ + "$CONFIG_SA1100_BADGE4" = "y" ]; then define_bool CONFIG_SA1111 y define_int CONFIG_FORCE_MAX_ZONEORDER 9 fi diff --git a/arch/arm/def-configs/badge4 b/arch/arm/def-configs/badge4 new file mode 100644 index 000000000000..1229bdaf509d --- /dev/null +++ b/arch/arm/def-configs/badge4 @@ -0,0 +1,923 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_ARM=y +# CONFIG_EISA is not set +# CONFIG_SBUS is not set +# CONFIG_MCA is not set +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +# CONFIG_GENERIC_BUST_SPINLOCK is not set +# CONFIG_GENERIC_ISA_DMA is not set + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +# CONFIG_OBSOLETE is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODVERSIONS=y +CONFIG_KMOD=y + +# +# System Type +# +# CONFIG_ARCH_ANAKIN is not set +# CONFIG_ARCH_ARCA5K is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_RPC is not set +CONFIG_ARCH_SA1100=y +# CONFIG_ARCH_SHARK is not set + +# +# Archimedes/A5000 Implementations +# + +# +# Archimedes/A5000 Implementations (select only ONE) +# + +# +# Footbridge Implementations +# + +# +# SA11x0 Implementations +# +# CONFIG_SA1100_ASSABET is not set +# CONFIG_SA1100_ADSBITSY is not set +# CONFIG_SA1100_BRUTUS is not set +# CONFIG_SA1100_CERF is not set +# CONFIG_SA1100_H3100 is not set +# CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set +# CONFIG_SA1100_H3XXX is not set +# CONFIG_SA1100_EXTENEX1 is not set +# CONFIG_SA1100_FLEXANET is not set +# CONFIG_SA1100_FREEBIRD is not set +# CONFIG_SA1100_GRAPHICSCLIENT is not set +# CONFIG_SA1100_GRAPHICSMASTER is not set +CONFIG_SA1100_BADGE4=y +# CONFIG_SA1100_JORNADA720 is not set +# CONFIG_SA1100_HUW_WEBPANEL is not set +# CONFIG_SA1100_ITSY is not set +# CONFIG_SA1100_LART is not set +# CONFIG_SA1100_NANOENGINE is not set +# CONFIG_SA1100_OMNIMETER is not set +# CONFIG_SA1100_PANGOLIN is not set +# CONFIG_SA1100_PLEB is not set +# CONFIG_SA1100_SHANNON is not set +# CONFIG_SA1100_SHERMAN is not set +# CONFIG_SA1100_SIMPAD is not set +# CONFIG_SA1100_PFS168 is not set +# CONFIG_SA1100_VICTOR is not set +# CONFIG_SA1100_XP860 is not set +# CONFIG_SA1100_YOPY is not set +CONFIG_SA1111=y +CONFIG_FORCE_MAX_ZONEORDER=9 +CONFIG_SA1100_USB=m +CONFIG_SA1100_USB_NETLINK=m +CONFIG_SA1100_USB_CHAR=m + +# +# CLPS711X/EP721X Implementations +# +# CONFIG_ARCH_EP7211 is not set +# CONFIG_ARCH_EP7212 is not set +# CONFIG_ARCH_ACORN is not set +# CONFIG_FOOTBRIDGE is not set +# CONFIG_FOOTBRIDGE_HOST is not set +# CONFIG_FOOTBRIDGE_ADDIN is not set +CONFIG_CPU_32=y +# CONFIG_CPU_26 is not set + +# +# Processor Type +# +# CONFIG_CPU_32v3 is not set +CONFIG_CPU_32v4=y +# CONFIG_CPU_ARM610 is not set +# CONFIG_CPU_ARM710 is not set +# CONFIG_CPU_ARM720T is not set +# CONFIG_CPU_ARM920T is not set +# CONFIG_CPU_ARM922T is not set +# CONFIG_CPU_ARM926T is not set +# CONFIG_CPU_ARM1020 is not set +# CONFIG_CPU_SA110 is not set +CONFIG_CPU_SA1100=y +# CONFIG_ARM_THUMB is not set +CONFIG_DISCONTIGMEM=y + +# +# General setup +# +# CONFIG_PCI is not set +CONFIG_ISA=y +# CONFIG_ISA_DMA is not set +CONFIG_CPU_FREQ=y +CONFIG_HOTPLUG=y + +# +# PCMCIA/CardBus support +# +CONFIG_PCMCIA=y +CONFIG_PCMCIA_PROBE=y +# CONFIG_I82365 is not set +# CONFIG_TCIC is not set +CONFIG_PCMCIA_SA1100=y +CONFIG_NET=y +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y + +# +# At least one math emulation must be selected +# +CONFIG_FPE_NWFPE=y +CONFIG_FPE_FASTFPE=m +CONFIG_KCORE_ELF=y +# CONFIG_KCORE_AOUT is not set +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=m +# CONFIG_PM is not set +CONFIG_ARTHUR=m +CONFIG_CMDLINE="init=/linuxrc root=/dev/mtdblock3" +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +CONFIG_MTD_DEBUG=y +CONFIG_MTD_DEBUG_VERBOSE=1 +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_BOOTLDR_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_CFI_B1 is not set +CONFIG_MTD_CFI_B2=y +# CONFIG_MTD_CFI_B4 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_NORA is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +CONFIG_MTD_SA1100=y +# CONFIG_MTD_IQ80310 is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +CONFIG_MTD_MTDRAM=m +CONFIG_MTDRAM_TOTAL_SIZE=4096 +CONFIG_MTDRAM_ERASE_SIZE=128 +CONFIG_MTD_BLKMTD=m + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC1000 is not set +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOCPROBE is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# Plug and Play configuration +# +# CONFIG_PNP is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_XD is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_INITRD is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +# CONFIG_NETLINK_DEV is not set +# CONFIG_NETFILTER is not set +# CONFIG_FILTER is not set +CONFIG_UNIX=y +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_INET_ECN is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_IPV6 is not set +# CONFIG_KHTTPD is not set +# CONFIG_ATM is not set +# CONFIG_VLAN_8021Q is not set + +# +# +# +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_DECNET is not set +# CONFIG_BRIDGE is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_LLC is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set + +# +# Ethernet (10 or 100Mbit) +# +# CONFIG_NET_ETHERNET is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC_OMIT_TIGON_I is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y +# CONFIG_STRIP is not set +# CONFIG_WAVELAN is not set +# CONFIG_ARLAN is not set +# CONFIG_AIRONET4500 is not set +# CONFIG_AIRO is not set +CONFIG_HERMES=y + +# +# Wireless Pcmcia cards support +# +CONFIG_PCMCIA_HERMES=y +CONFIG_AIRO_CS=m +CONFIG_NET_WIRELESS=y + +# +# Token Ring devices +# +# CONFIG_TR is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set + +# +# PCMCIA network device support +# +CONFIG_NET_PCMCIA=y +CONFIG_PCMCIA_3C589=y +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_FMVJ18X=m +CONFIG_PCMCIA_PCNET=y +CONFIG_PCMCIA_AXNET=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_PCMCIA_SMC91C92=m +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_NET_PCMCIA_RADIO=y +CONFIG_PCMCIA_RAYCS=m +CONFIG_PCMCIA_NETWAVE=m +CONFIG_PCMCIA_WAVELAN=m + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# IrDA (infrared) support +# +CONFIG_IRDA=y + +# +# IrDA protocols +# +CONFIG_IRLAN=y +CONFIG_IRCOMM=y +CONFIG_IRDA_ULTRA=y +# CONFIG_IRDA_OPTIONS is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +# CONFIG_IRTTY_SIR is not set +# CONFIG_IRPORT_SIR is not set + +# +# Dongle support +# +# CONFIG_DONGLE is not set + +# +# FIR device drivers +# +# CONFIG_USB_IRDA is not set +# CONFIG_NSC_FIR is not set +# CONFIG_WINBOND_FIR is not set +# CONFIG_TOSHIBA_FIR is not set +# CONFIG_SMC_IRCC_FIR is not set +# CONFIG_ALI_FIR is not set +# CONFIG_VLSI_FIR is not set +CONFIG_SA1100_FIR=y + +# +# ATA/IDE/MFM/RLL support +# +CONFIG_IDE=m + +# +# IDE, ATA and ATAPI Block devices +# +CONFIG_BLK_DEV_IDE=m + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_HD_IDE is not set +# CONFIG_BLK_DEV_HD is not set +CONFIG_BLK_DEV_IDEDISK=m +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set +# CONFIG_BLK_DEV_COMMERIAL is not set +# CONFIG_BLK_DEV_IDECS is not set +CONFIG_BLK_DEV_IDECD=m +CONFIG_BLK_DEV_IDETAPE=m +CONFIG_BLK_DEV_IDEFLOPPY=m +CONFIG_BLK_DEV_IDESCSI=m + +# +# IDE chipset support/bugfixes +# +# CONFIG_BLK_DEV_CMD640 is not set +# CONFIG_IDE_CHIPSETS is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_DMA_NONPCI is not set +# CONFIG_BLK_DEV_IDE_MODES is not set +# CONFIG_BLK_DEV_ATARAID is not set + +# +# SCSI support +# +CONFIG_SCSI=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +CONFIG_SD_EXTRA_DEVS=40 +CONFIG_CHR_DEV_ST=m +CONFIG_CHR_DEV_OSST=m +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_SR_EXTRA_DEVS=2 +CONFIG_CHR_DEV_SG=y + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_DEBUG_QUEUES is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI low-level drivers +# +# CONFIG_SCSI_7000FASST is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AHA152X is not set +# CONFIG_SCSI_AHA1542 is not set +# CONFIG_SCSI_AHA1740 is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_MEGARAID is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_EATA_DMA is not set +# CONFIG_SCSI_EATA_PIO is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_NCR53C7xx_sync is not set +# CONFIG_SCSI_NCR53C7xx_FAST is not set +# CONFIG_SCSI_NCR53C7xx_DISCONNECT is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_PCI2000 is not set +# CONFIG_SCSI_PCI2220I is not set +# CONFIG_SCSI_PSI240I is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_SIM710 is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_U14_34F is not set +# CONFIG_SCSI_DEBUG is not set + +# +# PCMCIA SCSI adapter support +# +# CONFIG_SCSI_PCMCIA is not set + +# +# I2O device support +# +CONFIG_I2O=m +CONFIG_I2O_BLOCK=m +CONFIG_I2O_LAN=m +CONFIG_I2O_SCSI=m +CONFIG_I2O_PROC=m + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input core support +# +CONFIG_INPUT=m +CONFIG_INPUT_KEYBDEV=m +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_SA1100=y +CONFIG_SERIAL_SA1100_CONSOLE=y +CONFIG_SA1100_DEFAULT_BAUDRATE=115200 +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_UNIX98_PTY_COUNT=256 + +# +# I2C support +# +CONFIG_I2C=m +CONFIG_I2C_ALGOBIT=m +CONFIG_I2C_ELV=m +CONFIG_I2C_VELLEMAN=m +CONFIG_I2C_ALGOPCF=m +CONFIG_I2C_ELEKTOR=m +CONFIG_I2C_CHARDEV=m +CONFIG_I2C_PROC=m + +# +# L3 serial bus support +# +CONFIG_L3=m + +# +# Other L3 adapters +# +# CONFIG_BIT_SA1100_GPIO is not set + +# +# Mice +# +# CONFIG_BUSMOUSE is not set +# CONFIG_MOUSE is not set + +# +# Joysticks +# +# CONFIG_INPUT_GAMEPORT is not set +# CONFIG_INPUT_SERIO is not set + +# +# Joysticks +# +# CONFIG_INPUT_IFORCE_USB is not set +# CONFIG_QIC02_TAPE is not set + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_SOFT_WATCHDOG=m +# CONFIG_WDT is not set +# CONFIG_WDTPCI is not set +# CONFIG_PCWATCHDOG is not set +# CONFIG_ACQUIRE_WDT is not set +# CONFIG_ADVANTECH_WDT is not set +CONFIG_SA1100_WATCHDOG=m +# CONFIG_EUROTECH_WDT is not set +# CONFIG_IB700_WDT is not set +# CONFIG_I810_TCO is not set +# CONFIG_MIXCOMWD is not set +# CONFIG_60XX_WDT is not set +# CONFIG_W83877F_WDT is not set +# CONFIG_MACHZ_WDT is not set +# CONFIG_NVRAM is not set +CONFIG_RTC=m +CONFIG_SA1100_RTC=m +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_FTAPE is not set +# CONFIG_AGP is not set +# CONFIG_DRM is not set + +# +# PCMCIA character devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# File systems +# +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_BFS_FS is not set +CONFIG_EXT3_FS=m +CONFIG_JBD=m +# CONFIG_JBD_DEBUG is not set +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +# CONFIG_UMSDOS_FS is not set +CONFIG_VFAT_FS=m +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_CRAMFS=m +# CONFIG_TMPFS is not set +# CONFIG_RAMFS is not set +# CONFIG_ISO9660_FS is not set +CONFIG_MINIX_FS=m +# CONFIG_VXFS_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_HPFS_FS is not set +CONFIG_PROC_FS=y +CONFIG_DEVFS_FS=y +CONFIG_DEVFS_MOUNT=y +# CONFIG_DEVFS_DEBUG is not set +# CONFIG_DEVPTS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_EXT2_FS=m +# CONFIG_SYSV_FS is not set +# CONFIG_UDF_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +CONFIG_NFS_FS=m +CONFIG_NFS_V3=y +# CONFIG_NFSD is not set +CONFIG_SUNRPC=m +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_NCP_FS is not set +# CONFIG_ZISOFS_FS is not set +CONFIG_ZLIB_FS_INFLATE=m + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_SMB_NLS=y +CONFIG_NLS=y + +# +# Native Language Support +# +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Sound +# +CONFIG_SOUND=y +# CONFIG_SOUND_BT878 is not set +# CONFIG_SOUND_FUSION is not set +# CONFIG_SOUND_CS4281 is not set +# CONFIG_SOUND_ESSSOLO1 is not set +# CONFIG_SOUND_MAESTRO is not set +# CONFIG_SOUND_SONICVIBES is not set +# CONFIG_SOUND_TRIDENT is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set +CONFIG_SOUND_SA1100=y +CONFIG_SOUND_UDA1341=m +CONFIG_SOUND_SA1111_UDA1341=m +CONFIG_SOUND_SA1100SSP=m +# CONFIG_SOUND_OSS is not set +# CONFIG_SOUND_TVMIXER is not set + +# +# Multimedia Capabilities Port drivers +# +# CONFIG_MCP is not set + +# +# USB support +# +CONFIG_USB=y +CONFIG_USB_DEBUG=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_LONG_TIMEOUT is not set + +# +# USB Controllers +# +# CONFIG_USB_UHCI is not set +# CONFIG_USB_UHCI_ALT is not set +# CONFIG_USB_OHCI is not set +CONFIG_USB_OHCI_SA1111=y + +# +# USB Device Class drivers +# +CONFIG_USB_AUDIO=y +CONFIG_USB_BLUETOOTH=m +CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE_DEBUG=y +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_ISD200=y +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_HP8200e=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_JUMPSHOT=y +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m + +# +# USB Human Interface Devices (HID) +# +CONFIG_USB_HID=m +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_KBD=m +CONFIG_USB_MOUSE=m +CONFIG_USB_WACOM=m + +# +# USB Imaging devices +# +CONFIG_USB_DC2XX=m +CONFIG_USB_MDC800=m +CONFIG_USB_SCANNER=m +CONFIG_USB_MICROTEK=m +CONFIG_USB_HPUSBSCSI=m + +# +# USB Multimedia devices +# + +# +# Video4Linux support is needed for USB Multimedia device support +# + +# +# USB Network adaptors +# +CONFIG_USB_PEGASUS=m +CONFIG_USB_KAWETH=m +CONFIG_USB_CATC=m +CONFIG_USB_CDCETHER=m +CONFIG_USB_USBNET=m + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +CONFIG_USB_SERIAL=m +# CONFIG_USB_SERIAL_GENERIC is not set +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SERIAL_OMNINET=m + +# +# USB Miscellaneous drivers +# +CONFIG_USB_RIO500=m + +# +# Bluetooth support +# +CONFIG_BLUEZ=m +CONFIG_BLUEZ_L2CAP=m + +# +# Bluetooth device drivers +# +CONFIG_BLUEZ_HCIUSB=m +CONFIG_BLUEZ_HCIUART=m +CONFIG_BLUEZ_HCIVHCI=m + +# +# Kernel hacking +# +# CONFIG_NO_FRAME_POINTER is not set +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SLAB is not set +CONFIG_MAGIC_SYSRQ=y +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_WAITQ is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_LL_SER3=y diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c new file mode 100644 index 000000000000..c6e29a0b8bcc --- /dev/null +++ b/arch/arm/mach-sa1100/badge4.c @@ -0,0 +1,211 @@ +/* + * linux/arch/arm/mach-sa1100/badge4.c + * + * BadgePAD 4 specific initialization + * + * Tim Connors + * Christopher Hoover + * + * Copyright (C) 2002 Hewlett-Packard Company + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "generic.h" +#include "sa1111.h" + +static int __init badge4_sa1111_init(void) +{ + int ret; + + /* + * Ensure that the memory bus request/grant signals are setup, + * and the grant is held in its inactive state + */ + sa1110_mb_disable(); + + /* + * Probe for SA1111. + */ + ret = sa1111_probe(BADGE4_SA1111_BASE); + if (ret < 0) + return ret; + + /* + * We found it. Wake the chip up. + */ + sa1111_wake(); + + /* + * The SDRAM configuration of the SA1110 and the SA1111 must + * match. This is very important to ensure that SA1111 accesses + * don't corrupt the SDRAM. Note that this ungates the SA1111's + * MBGNT signal, so we must have called sa1110_mb_disable() + * beforehand. + */ + sa1111_configure_smc(1, + FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), + FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); + + /* + * We only need to turn on DCLK whenever we want to use the + * DMA. It can otherwise be held firmly in the off position. + */ + SKPCR |= SKPCR_DCLKEN; + + /* + * Enable the SA1110 memory bus request and grant signals. + */ + sa1110_mb_enable(); + + sa1111_init_irq(BADGE4_IRQ_GPIO_SA1111); + + return 0; +} + +static int __init badge4_init(void) +{ + int ret; + + if (!machine_is_badge4()) + return -ENODEV; + + ret = badge4_sa1111_init(); + if (ret < 0) + printk(KERN_ERR __FUNCTION__ + ": SA-1111 initialization failed (%d)\n", ret); + + /* N.B, according to rmk this is the singular place that GPDR + should be set */ + + /* Video expansion */ + GPCR = (BADGE4_GPIO_INT_VID | BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | + BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 | BADGE4_GPIO_LGP6 | + BADGE4_GPIO_LGP7 | BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 | + BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID | + BADGE4_GPIO_GPC_VID); + GPDR |= (BADGE4_GPIO_INT_VID | BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | + BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 | BADGE4_GPIO_LGP6 | + BADGE4_GPIO_LGP7 | BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 | + BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID | + BADGE4_GPIO_GPC_VID); + + /* SDRAM SPD i2c */ + GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); + GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); + + /* uart */ + GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); + GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); + + /* drives CPLD muxsel0 input */ + GPCR = BADGE4_GPIO_MUXSEL0; + GPDR |= BADGE4_GPIO_MUXSEL0; + + /* test points */ + GPCR = (BADGE4_GPIO_TESTPT_J7 | BADGE4_GPIO_TESTPT_J6 | + BADGE4_GPIO_TESTPT_J5); + GPDR |= (BADGE4_GPIO_TESTPT_J7 | BADGE4_GPIO_TESTPT_J6 | + BADGE4_GPIO_TESTPT_J5); + + /* drives CPLD sdram type inputs; this shouldn't be needed; + bootloader left it this way. */ + GPDR |= (BADGE4_GPIO_SDTYP0 | BADGE4_GPIO_SDTYP1); + + /* 5V supply rail. */ + GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ + GPDR |= BADGE4_GPIO_PCMEN5V; + + /* drives SA1111 reset pin; this shouldn't be needed; + bootloader left it this way. */ + GPSR = BADGE4_GPIO_SA1111_NRST; + GPDR |= BADGE4_GPIO_SA1111_NRST; + + return 0; +} + +__initcall(badge4_init); + + +static unsigned badge4_5V_bitmap = 0; + +void badge4_set_5V(unsigned subsystem, int on) +{ + unsigned long flags; + unsigned old_5V_bitmap; + + local_irq_save(flags); + + old_5V_bitmap = badge4_5V_bitmap; + + if (on) { + badge4_5V_bitmap |= subsystem; + } else { + badge4_5V_bitmap &= ~subsystem; + } + + /* detect on->off and off->on transitions */ + if ((!old_5V_bitmap) && (badge4_5V_bitmap)) { + /* was off, now on */ + printk(KERN_INFO __FUNCTION__ ": enabling 5V supply rail\n"); + GPSR = BADGE4_GPIO_PCMEN5V; + } else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) { + /* was on, now off */ + printk(KERN_INFO __FUNCTION__ ": disabling 5V supply rail\n"); + GPCR = BADGE4_GPIO_PCMEN5V; + } + + local_irq_restore(flags); +} +EXPORT_SYMBOL(badge4_set_5V); + + +static void __init +fixup_badge4(struct machine_desc *desc, struct param_struct *params, + char **cmdline, struct meminfo *mi) +{ + /* nothing needed here */ +} + +static struct map_desc badge4_io_desc[] __initdata = { + /* virtual physical length domain r w c b */ + {0xf1000000, 0x08000000, 0x00100000, DOMAIN_IO, 1,1,0,0},/* SRAM bank 1 */ + {0xf2000000, 0x10000000, 0x00100000, DOMAIN_IO, 1,1,0,0},/* SRAM bank 2 */ + {0xf4000000, 0x48000000, 0x00100000, DOMAIN_IO, 1,1,0,0},/* SA-1111 */ + LAST_DESC +}; + +static void __init badge4_map_io(void) +{ + sa1100_map_io(); + iotable_init(badge4_io_desc); + + sa1100_register_uart(0, 3); + sa1100_register_uart(1, 1); +} + +MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4") + BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000) + BOOT_PARAMS(0xc0000100) + FIXUP(fixup_badge4) + MAPIO(badge4_map_io) + INITIRQ(sa1100_init_irq) +MACHINE_END diff --git a/include/asm-arm/arch-sa1100/badge4.h b/include/asm-arm/arch-sa1100/badge4.h new file mode 100644 index 000000000000..5d9177fa7837 --- /dev/null +++ b/include/asm-arm/arch-sa1100/badge4.h @@ -0,0 +1,74 @@ +/* + * linux/include/asm-arm/arch-sa1100/badge4.h + * + * Tim Connors + * Christopher Hoover + * + * Copyright (C) 2002 Hewlett-Packard Company + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#error "include instead" +#endif + +#define BADGE4_SA1111_BASE (0x48000000) + +/* GPIOs on the BadgePAD 4 */ +#define BADGE4_GPIO_INT_1111 GPIO_GPIO0 /* SA-1111 IRQ */ + +#define BADGE4_GPIO_INT_VID GPIO_GPIO1 /* Video expansion */ +#define BADGE4_GPIO_LGP2 GPIO_GPIO2 /* GPIO_LDD8 */ +#define BADGE4_GPIO_LGP3 GPIO_GPIO3 /* GPIO_LDD9 */ +#define BADGE4_GPIO_LGP4 GPIO_GPIO4 /* GPIO_LDD10 */ +#define BADGE4_GPIO_LGP5 GPIO_GPIO5 /* GPIO_LDD11 */ +#define BADGE4_GPIO_LGP6 GPIO_GPIO6 /* GPIO_LDD12 */ +#define BADGE4_GPIO_LGP7 GPIO_GPIO7 /* GPIO_LDD13 */ +#define BADGE4_GPIO_LGP8 GPIO_GPIO8 /* GPIO_LDD14 */ +#define BADGE4_GPIO_LGP9 GPIO_GPIO9 /* GPIO_LDD15 */ +#define BADGE4_GPIO_GPA_VID GPIO_GPIO10 /* Video expansion */ +#define BADGE4_GPIO_GPB_VID GPIO_GPIO11 /* Video expansion */ +#define BADGE4_GPIO_GPC_VID GPIO_GPIO12 /* Video expansion */ + +#define BADGE4_GPIO_UART_HS1 GPIO_GPIO13 +#define BADGE4_GPIO_UART_HS2 GPIO_GPIO14 + +#define BADGE4_GPIO_MUXSEL0 GPIO_GPIO15 +#define BADGE4_GPIO_TESTPT_J7 GPIO_GPIO16 + +#define BADGE4_GPIO_SDSDA GPIO_GPIO17 /* SDRAM SPD Data */ +#define BADGE4_GPIO_SDSCL GPIO_GPIO18 /* SDRAM SPD Clock */ +#define BADGE4_GPIO_SDTYP0 GPIO_GPIO19 /* SDRAM Type Control */ +#define BADGE4_GPIO_SDTYP1 GPIO_GPIO20 /* SDRAM Type Control */ + +#define BADGE4_GPIO_BGNT_1111 GPIO_GPIO21 /* GPIO_MBGNT */ +#define BADGE4_GPIO_BREQ_1111 GPIO_GPIO22 /* GPIO_TREQA */ + +#define BADGE4_GPIO_TESTPT_J6 GPIO_GPIO23 + +#define BADGE4_GPIO_PCMEN5V GPIO_GPIO24 /* 5V power */ + +#define BADGE4_GPIO_SA1111_NRST GPIO_GPIO25 /* SA-1111 nRESET */ + +#define BADGE4_GPIO_TESTPT_J5 GPIO_GPIO26 + +#define BADGE4_GPIO_CLK_1111 GPIO_GPIO27 /* GPIO_32_768kHz */ + +/* Interrupts on the BadgePAD 4 */ +#define BADGE4_IRQ_GPIO_SA1111 IRQ_GPIO0 /* SA-1111 interrupt */ + + +/* PCM5ENV Usage tracking */ + +#define BADGE4_5V_PCMCIA_SOCK0 (1<<0) +#define BADGE4_5V_PCMCIA_SOCK1 (1<<1) +#define BADGE4_5V_PCMCIA_SOCK(n) (1<<(n)) +#define BADGE4_5V_USB (1<<2) + +#ifndef __ASSEMBLY__ +extern void badge4_set_5V(unsigned subsystem, int on); +#endif diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index 5c03f81403ea..dd952f3700e5 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -96,6 +96,8 @@ typedef struct { volatile u32 offset[4096]; } __regbase; * ifdefs, and lots of other preprocessor gunk elsewhere. */ +#include "badge4.h" + #ifdef CONFIG_SA1100_PANGOLIN #include "pangolin.h" #endif -- cgit v1.2.3 From 335611b8f1e3ee383bb54369bee5e3e475c14f5d Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 25 Feb 2002 22:45:20 +0000 Subject: Add support for Stork machine type to ARM architecture. --- arch/arm/Config.help | 4 + arch/arm/config.in | 1 + arch/arm/def-configs/stork | 976 +++++++++++++++++++++++++++++++++ arch/arm/mach-sa1100/stork.c | 361 ++++++++++++ include/asm-arm/arch-sa1100/hardware.h | 2 + include/asm-arm/arch-sa1100/stork.h | 164 ++++++ 6 files changed, 1508 insertions(+) create mode 100644 arch/arm/def-configs/stork create mode 100644 arch/arm/mach-sa1100/stork.c create mode 100644 include/asm-arm/arch-sa1100/stork.h (limited to 'include') diff --git a/arch/arm/Config.help b/arch/arm/Config.help index 5dcb3a722cd4..a350fc014ebd 100644 --- a/arch/arm/Config.help +++ b/arch/arm/Config.help @@ -657,6 +657,10 @@ CONFIG_SA1100_SHANNON platform with a 640x480 LCD, touchscreen, CIR keyboard, PCMCIA slots, and a telco interface. +CONFIG_SA1100_STORK + Say Y here if you intend to run this kernel on the Stork + handheld computer. + CONFIG_SA1100_VICTOR Say Y here if you are using a Visu Aide Intel(R) StrongARM(R) SA-1100 based Victor Digital Talking Book Reader. See diff --git a/arch/arm/config.in b/arch/arm/config.in index 9442894a09a0..be1349e8112a 100644 --- a/arch/arm/config.in +++ b/arch/arm/config.in @@ -108,6 +108,7 @@ dep_bool ' Tulsa' CONFIG_SA1100_PFS168 $CONFIG_ARCH_SA1100 dep_bool ' Victor' CONFIG_SA1100_VICTOR $CONFIG_ARCH_SA1100 dep_bool ' XP860' CONFIG_SA1100_XP860 $CONFIG_ARCH_SA1100 dep_bool ' Yopy' CONFIG_SA1100_YOPY $CONFIG_ARCH_SA1100 +dep_bool ' Stork' CONFIG_SA1100_STORK $CONFIG_ARCH_SA1100 # Determine if SA1111 support is required if [ "$CONFIG_ASSABET_NEPONSET" = "y" -o \ diff --git a/arch/arm/def-configs/stork b/arch/arm/def-configs/stork new file mode 100644 index 000000000000..22681fb100d5 --- /dev/null +++ b/arch/arm/def-configs/stork @@ -0,0 +1,976 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_ARM=y +# CONFIG_EISA is not set +# CONFIG_SBUS is not set +# CONFIG_MCA is not set +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +# CONFIG_GENERIC_BUST_SPINLOCK is not set +# CONFIG_GENERIC_ISA_DMA is not set + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +# CONFIG_OBSOLETE is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODVERSIONS is not set +CONFIG_KMOD=y + +# +# System Type +# +# CONFIG_ARCH_ADIFCC is not set +# CONFIG_ARCH_ANAKIN is not set +# CONFIG_ARCH_ARCA5K is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP310 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_RPC is not set +CONFIG_ARCH_SA1100=y +# CONFIG_ARCH_SHARK is not set + +# +# Archimedes/A5000 Implementations +# + +# +# Archimedes/A5000 Implementations (select only ONE) +# +# CONFIG_ARCH_ARC is not set +# CONFIG_ARCH_A5K is not set + +# +# Footbridge Implementations +# +# CONFIG_ARCH_CATS is not set +# CONFIG_ARCH_PERSONAL_SERVER is not set +# CONFIG_ARCH_EBSA285_ADDIN is not set +# CONFIG_ARCH_EBSA285_HOST is not set +# CONFIG_ARCH_NETWINDER is not set + +# +# SA11x0 Implementations +# +# CONFIG_SA1100_ASSABET is not set +# CONFIG_ASSABET_NEPONSET is not set +# CONFIG_SA1100_ADSBITSY is not set +# CONFIG_SA1100_BRUTUS is not set +# CONFIG_SA1100_CERF is not set +# CONFIG_SA1100_H3100 is not set +CONFIG_SA1100_H3600=y +# CONFIG_SA1100_H3800 is not set +CONFIG_SA1100_H3XXX=y +# CONFIG_SA1100_EXTENEX1 is not set +# CONFIG_SA1100_FLEXANET is not set +# CONFIG_SA1100_FREEBIRD is not set +# CONFIG_SA1100_GRAPHICSCLIENT is not set +# CONFIG_SA1100_GRAPHICSMASTER is not set +# CONFIG_SA1100_BADGE4 is not set +# CONFIG_SA1100_JORNADA720 is not set +# CONFIG_SA1100_HUW_WEBPANEL is not set +# CONFIG_SA1100_ITSY is not set +# CONFIG_SA1100_LART is not set +# CONFIG_SA1100_NANOENGINE is not set +# CONFIG_SA1100_OMNIMETER is not set +# CONFIG_SA1100_PANGOLIN is not set +# CONFIG_SA1100_PLEB is not set +# CONFIG_SA1100_PT_SYSTEM3 is not set +# CONFIG_SA1100_SHANNON is not set +# CONFIG_SA1100_SHERMAN is not set +# CONFIG_SA1100_SIMPAD is not set +# CONFIG_SA1100_PFS168 is not set +# CONFIG_SA1100_VICTOR is not set +# CONFIG_SA1100_XP860 is not set +# CONFIG_SA1100_YOPY is not set +CONFIG_SA1100_USB=m +CONFIG_SA1100_USB_NETLINK=m +# CONFIG_SA1100_USB_CHAR is not set +CONFIG_H3600_SLEEVE=m + +# +# CLPS711X/EP721X Implementations +# +# CONFIG_ARCH_AUTCPU12 is not set +# CONFIG_ARCH_CDB89712 is not set +# CONFIG_ARCH_CLEP7312 is not set +# CONFIG_ARCH_EDB7211 is not set +# CONFIG_ARCH_P720T is not set +# CONFIG_ARCH_FORTUNET is not set +# CONFIG_ARCH_EP7211 is not set +# CONFIG_ARCH_EP7212 is not set +# CONFIG_ARCH_ACORN is not set +# CONFIG_FOOTBRIDGE is not set +# CONFIG_FOOTBRIDGE_HOST is not set +# CONFIG_FOOTBRIDGE_ADDIN is not set +CONFIG_CPU_32=y +# CONFIG_CPU_26 is not set + +# +# Processor Type +# +# CONFIG_CPU_32v3 is not set +CONFIG_CPU_32v4=y +# CONFIG_CPU_ARM610 is not set +# CONFIG_CPU_ARM710 is not set +# CONFIG_CPU_ARM720T is not set +# CONFIG_CPU_ARM920T is not set +# CONFIG_CPU_ARM922T is not set +# CONFIG_CPU_ARM926T is not set +# CONFIG_CPU_ARM1020 is not set +# CONFIG_CPU_SA110 is not set +CONFIG_CPU_SA1100=y +# CONFIG_XSCALE_PMU is not set +# CONFIG_ARM_THUMB is not set +CONFIG_DISCONTIGMEM=y + +# +# General setup +# +# CONFIG_PCI is not set +CONFIG_ISA=y +# CONFIG_ISA_DMA is not set +# CONFIG_FIQ is not set +CONFIG_CPU_FREQ=y +CONFIG_HOTPLUG=y + +# +# PCMCIA/CardBus support +# +CONFIG_PCMCIA=m +CONFIG_PCMCIA_PROBE=y +# CONFIG_I82092 is not set +# CONFIG_I82365 is not set +# CONFIG_TCIC is not set +# CONFIG_PCMCIA_CLPS6700 is not set +CONFIG_PCMCIA_SA1100=m +CONFIG_NET=y +CONFIG_SYSVIPC=y +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y + +# +# At least one math emulation must be selected +# +CONFIG_FPE_NWFPE=m +CONFIG_FPE_FASTFPE=y +CONFIG_KCORE_ELF=y +# CONFIG_KCORE_AOUT is not set +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_PM=y +# CONFIG_APM is not set +# CONFIG_ARTHUR is not set +CONFIG_CMDLINE="N" +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_BOOTLDR_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_AMDSTD is not set +# CONFIG_MTD_SHARP is not set +# CONFIG_MTD_JEDEC is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_NORA is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_CDB89712 is not set +CONFIG_MTD_SA1100=y +# CONFIG_MTD_DC21285 is not set +# CONFIG_MTD_IQ80310 is not set +# CONFIG_MTD_EPXA10DB is not set +# CONFIG_MTD_PCI is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC1000 is not set +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOCPROBE is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# Plug and Play configuration +# +# CONFIG_PNP is not set +# CONFIG_ISAPNP is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_XD is not set +# CONFIG_PARIDE is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_CISS_SCSI_TAPE is not set +# CONFIG_BLK_DEV_DAC960 is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_BLK_DEV_INITRD is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set +# CONFIG_BLK_DEV_MD is not set +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID5 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_BLK_DEV_LVM is not set + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_NETLINK=y +CONFIG_RTNETLINK=y +# CONFIG_NETLINK_DEV is not set +# CONFIG_NETFILTER is not set +# CONFIG_FILTER is not set +CONFIG_UNIX=y +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_INET_ECN is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_IPV6 is not set +# CONFIG_KHTTPD is not set +# CONFIG_ATM is not set +# CONFIG_VLAN_8021Q is not set + +# +# +# +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_DECNET is not set +# CONFIG_BRIDGE is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_LLC is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set + +# +# Ethernet (10 or 100Mbit) +# +# CONFIG_NET_ETHERNET is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_MYRI_SBUS is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_SK98LIN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PLIP is not set +CONFIG_PPP=m +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +# CONFIG_PPPOE is not set +# CONFIG_SLIP is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y +# CONFIG_STRIP is not set +CONFIG_WAVELAN=m +# CONFIG_ARLAN is not set +# CONFIG_AIRONET4500 is not set +# CONFIG_AIRONET4500_NONCS is not set +# CONFIG_AIRONET4500_PROC is not set +# CONFIG_AIRO is not set +CONFIG_HERMES=m + +# +# Wireless Pcmcia cards support +# +CONFIG_PCMCIA_HERMES=m +# CONFIG_AIRO_CS is not set +CONFIG_NET_WIRELESS=y + +# +# Token Ring devices +# +# CONFIG_TR is not set +# CONFIG_NET_FC is not set +# CONFIG_RCPCI is not set +# CONFIG_SHAPER is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set + +# +# PCMCIA network device support +# +CONFIG_NET_PCMCIA=y +CONFIG_PCMCIA_3C589=m +# CONFIG_PCMCIA_3C574 is not set +# CONFIG_PCMCIA_FMVJ18X is not set +CONFIG_PCMCIA_PCNET=m +# CONFIG_PCMCIA_NMCLAN is not set +# CONFIG_PCMCIA_SMC91C92 is not set +CONFIG_PCMCIA_XIRC2PS=m +# CONFIG_PCMCIA_AXNET is not set +# CONFIG_ARCNET_COM20020_CS is not set +# CONFIG_PCMCIA_IBMTR is not set +# CONFIG_NET_PCMCIA_RADIO is not set + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# IrDA (infrared) support +# +# CONFIG_IRDA is not set + +# +# ATA/IDE/MFM/RLL support +# +CONFIG_IDE=m + +# +# IDE, ATA and ATAPI Block devices +# +CONFIG_BLK_DEV_IDE=m + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_HD_IDE is not set +# CONFIG_BLK_DEV_HD is not set +CONFIG_BLK_DEV_IDEDISK=m +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set +# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set +# CONFIG_BLK_DEV_IDEDISK_IBM is not set +# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set +# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set +# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set +# CONFIG_BLK_DEV_IDEDISK_WD is not set +# CONFIG_BLK_DEV_COMMERIAL is not set +# CONFIG_BLK_DEV_TIVO is not set +CONFIG_BLK_DEV_IDECS=m +CONFIG_BLK_DEV_IDECD=m +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_BLK_DEV_IDESCSI is not set + +# +# IDE chipset support/bugfixes +# +# CONFIG_BLK_DEV_CMD640 is not set +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set +# CONFIG_BLK_DEV_ISAPNP is not set +# CONFIG_IDE_CHIPSETS is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_DMA_NONPCI is not set +# CONFIG_BLK_DEV_IDE_MODES is not set +# CONFIG_BLK_DEV_ATARAID is not set +# CONFIG_BLK_DEV_ATARAID_PDC is not set +# CONFIG_BLK_DEV_ATARAID_HPT is not set + +# +# SCSI support +# +# CONFIG_SCSI is not set + +# +# I2O device support +# +# CONFIG_I2O is not set +# CONFIG_I2O_BLOCK is not set +# CONFIG_I2O_LAN is not set +# CONFIG_I2O_SCSI is not set +# CONFIG_I2O_PROC is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input core support +# +# CONFIG_INPUT is not set +# CONFIG_INPUT_KEYBDEV is not set +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set + +# +# Character devices +# +CONFIG_VT=y +# CONFIG_VT_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_CONSOLE=y +# CONFIG_SERIAL_EXTENDED is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_ANAKIN is not set +# CONFIG_SERIAL_ANAKIN_CONSOLE is not set +# CONFIG_SERIAL_AMBA is not set +# CONFIG_SERIAL_AMBA_CONSOLE is not set +# CONFIG_SERIAL_CLPS711X is not set +# CONFIG_SERIAL_CLPS711X_CONSOLE is not set +# CONFIG_SERIAL_21285 is not set +# CONFIG_SERIAL_21285_OLD is not set +# CONFIG_SERIAL_21285_CONSOLE is not set +# CONFIG_SERIAL_UART00 is not set +# CONFIG_SERIAL_UART00_CONSOLE is not set +CONFIG_SERIAL_SA1100=y +CONFIG_SERIAL_SA1100_CONSOLE=y +CONFIG_SA1100_DEFAULT_BAUDRATE=115200 +CONFIG_SERIAL_8250=m +# CONFIG_SERIAL_8250_CONSOLE is not set +# CONFIG_ATOMWIDE_SERIAL is not set +# CONFIG_DUALSP_SERIAL is not set +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_SHARE_IRQ is not set +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_MULTIPORT is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_UNIX98_PTY_COUNT=32 + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# L3 serial bus support +# +CONFIG_L3=y +CONFIG_L3_ALGOBIT=y +CONFIG_L3_BIT_SA1100_GPIO=y + +# +# Other L3 adapters +# +# CONFIG_L3_SA1111 is not set +CONFIG_BIT_SA1100_GPIO=y + +# +# Mice +# +# CONFIG_BUSMOUSE is not set +CONFIG_MOUSE=m +# CONFIG_PSMOUSE is not set +# CONFIG_82C710_MOUSE is not set +# CONFIG_PC110_PAD is not set + +# +# Joysticks +# +# CONFIG_INPUT_GAMEPORT is not set + +# +# Input core support is needed for gameports +# + +# +# Input core support is needed for joysticks +# +# CONFIG_QIC02_TAPE is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_INTEL_RNG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +CONFIG_SA1100_RTC=m +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_FTAPE is not set +# CONFIG_AGP is not set +# CONFIG_DRM is not set + +# +# PCMCIA character devices +# +# CONFIG_PCMCIA_SERIAL_CS is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# File systems +# +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_ADFS_FS is not set +# CONFIG_ADFS_FS_RW is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_JBD_DEBUG is not set +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +# CONFIG_UMSDOS_FS is not set +CONFIG_VFAT_FS=m +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_CRAMFS=y +# CONFIG_TMPFS is not set +CONFIG_RAMFS=y +# CONFIG_ISO9660_FS is not set +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS_RW is not set +# CONFIG_HPFS_FS is not set +CONFIG_PROC_FS=y +CONFIG_DEVFS_FS=y +CONFIG_DEVFS_MOUNT=y +# CONFIG_DEVFS_DEBUG is not set +CONFIG_DEVPTS_FS=y +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX4FS_RW is not set +# CONFIG_ROMFS_FS is not set +CONFIG_EXT2_FS=y +# CONFIG_SYSV_FS is not set +# CONFIG_UDF_FS is not set +# CONFIG_UDF_RW is not set +# CONFIG_UFS_FS is not set +# CONFIG_UFS_FS_WRITE is not set + +# +# Network File Systems +# +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_ROOT_NFS is not set +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +CONFIG_SUNRPC=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_NCP_FS is not set +# CONFIG_NCPFS_PACKET_SIGNING is not set +# CONFIG_NCPFS_IOCTL_LOCKING is not set +# CONFIG_NCPFS_STRONG is not set +# CONFIG_NCPFS_NFS_NS is not set +# CONFIG_NCPFS_OS2_NS is not set +# CONFIG_NCPFS_SMALLDOS is not set +# CONFIG_NCPFS_NLS is not set +# CONFIG_NCPFS_EXTRAS is not set +# CONFIG_ZISOFS_FS is not set +CONFIG_ZLIB_FS_INFLATE=y + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_SMB_NLS=y +CONFIG_NLS=y + +# +# Native Language Support +# +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Console drivers +# +CONFIG_PC_KEYMAP=y +# CONFIG_VGA_CONSOLE is not set + +# +# Frame-buffer support +# +CONFIG_FB=y +CONFIG_DUMMY_CONSOLE=y +# CONFIG_FB_ACORN is not set +# CONFIG_FB_ANAKIN is not set +# CONFIG_FB_CLPS711X is not set +CONFIG_FB_SA1100=y +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_FBCON_ADVANCED=y +# CONFIG_FBCON_MFB is not set +# CONFIG_FBCON_CFB2 is not set +# CONFIG_FBCON_CFB4 is not set +# CONFIG_FBCON_CFB8 is not set +CONFIG_FBCON_CFB16=y +# CONFIG_FBCON_CFB24 is not set +# CONFIG_FBCON_CFB32 is not set +# CONFIG_FBCON_AFB is not set +# CONFIG_FBCON_ILBM is not set +# CONFIG_FBCON_IPLAN2P2 is not set +# CONFIG_FBCON_IPLAN2P4 is not set +# CONFIG_FBCON_IPLAN2P8 is not set +# CONFIG_FBCON_MAC is not set +# CONFIG_FBCON_VGA_PLANES is not set +# CONFIG_FBCON_VGA is not set +# CONFIG_FBCON_HGA is not set +CONFIG_FBCON_FONTWIDTH8_ONLY=y +CONFIG_FBCON_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set + +# +# Sound +# +CONFIG_SOUND=y +# CONFIG_SOUND_BT878 is not set +# CONFIG_SOUND_CMPCI is not set +# CONFIG_SOUND_EMU10K1 is not set +# CONFIG_MIDI_EMU10K1 is not set +# CONFIG_SOUND_FUSION is not set +# CONFIG_SOUND_CS4281 is not set +# CONFIG_SOUND_ES1370 is not set +# CONFIG_SOUND_ES1371 is not set +# CONFIG_SOUND_ESSSOLO1 is not set +# CONFIG_SOUND_MAESTRO is not set +# CONFIG_SOUND_MAESTRO3 is not set +# CONFIG_SOUND_ICH is not set +# CONFIG_SOUND_RME96XX is not set +# CONFIG_SOUND_SONICVIBES is not set +# CONFIG_SOUND_TRIDENT is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set +# CONFIG_SOUND_VIA82CXXX is not set +# CONFIG_MIDI_VIA82CXXX is not set +CONFIG_SOUND_SA1100=y +CONFIG_SOUND_UDA1341=m +# CONFIG_SOUND_ASSABET_UDA1341 is not set +CONFIG_SOUND_H3600_UDA1341=m +# CONFIG_SOUND_PANGOLIN_UDA1341 is not set +# CONFIG_SOUND_SA1111_UDA1341 is not set +# CONFIG_SOUND_SA1100SSP is not set +# CONFIG_SOUND_OSS is not set +# CONFIG_SOUND_WAVEARTIST is not set +# CONFIG_SOUND_TVMIXER is not set + +# +# Multimedia Capabilities Port drivers +# +# CONFIG_MCP is not set +# CONFIG_MCP_SA1100 is not set +# CONFIG_MCP_UCB1200 is not set +# CONFIG_MCP_UCB1200_AUDIO is not set +# CONFIG_MCP_UCB1200_TS is not set + +# +# USB support +# +# CONFIG_USB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_UHCI is not set +# CONFIG_USB_UHCI_ALT is not set +# CONFIG_USB_OHCI is not set +# CONFIG_USB_OHCI_SA1111 is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_BLUETOOTH is not set + +# +# SCSI support is needed for USB Storage +# +# CONFIG_USB_STORAGE is not set +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_HP8200e is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# USB Human Interface Devices (HID) +# + +# +# Input core support is needed for USB HID +# + +# +# USB Imaging devices +# +# CONFIG_USB_DC2XX is not set +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_SCANNER is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_HPUSBSCSI is not set + +# +# USB Multimedia devices +# + +# +# Video4Linux support is needed for USB Multimedia device support +# + +# +# USB Network adaptors +# +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_CATC is not set +# CONFIG_USB_CDCETHER is not set +# CONFIG_USB_USBNET is not set + +# +# USB port drivers +# +# CONFIG_USB_USS720 is not set + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OMNINET is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_AUERSWALD is not set + +# +# Bluetooth support +# +# CONFIG_BLUEZ is not set + +# +# Kernel hacking +# +# CONFIG_NO_FRAME_POINTER is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_NO_PGT_CACHE is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_WAITQ is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_LL is not set +# CONFIG_DEBUG_DC21285_PORT is not set +# CONFIG_DEBUG_CLPS711X_UART2 is not set + +# +# Library routines +# +# CONFIG_CRC32 is not set diff --git a/arch/arm/mach-sa1100/stork.c b/arch/arm/mach-sa1100/stork.c new file mode 100644 index 000000000000..eacf6f8d786f --- /dev/null +++ b/arch/arm/mach-sa1100/stork.c @@ -0,0 +1,361 @@ +/* + * linux/arch/arm/mach-sa1100/stork.c + * + * Copyright (C) 2001 Ken Gordon + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "generic.h" + + +#define STORK_VM_BASE_CS1 0xf0000000 /* where we get mapped (virtual) */ +#define STORK_VM_OFF_CS1 0x08000000 /* where we started mapping (physical) */ +#define STORK_VM_ADJUST_CS1 (STORK_VM_BASE_CS1-STORK_VM_OFF_CS1) /* add to the phys to get virt */ + +#define STORK_VM_BASE_CS2 0xf1000000 /* where we get mapped (virtual) */ +#define STORK_VM_OFF_CS2 0x10000000 /* where we started mapping (physical) */ +#define STORK_VM_ADJUST_CS2 (STORK_VM_BASE_CS2-STORK_VM_OFF_CS2) /* add to the phys to get virt */ + +static int debug = 0; + +static int storkLatchA = 0; +static int storkLatchB = 0; +static int storkLCDCPLD[4] = { 0, 0, 0, 0}; + +int +storkSetLatchA(int bits) +{ + int ret = storkLatchA; + volatile unsigned int *latch = (unsigned int *)(STORK_LATCH_A_ADDR+STORK_VM_ADJUST_CS1); + + storkLatchA |= bits; + *latch = storkLatchA; + return ret; +} + +int +storkClearLatchA(int bits) +{ + int ret = storkLatchA; + volatile unsigned int *latch = (unsigned int *)(STORK_LATCH_A_ADDR+STORK_VM_ADJUST_CS1); + + storkLatchA &= ~bits; + *latch = storkLatchA; + return ret; +} + +int +storkSetLCDCPLD(int which, int bits) +{ + int ret = storkLCDCPLD[which]; + volatile unsigned int *latch = (unsigned int *)(STORK_LCDCPLD_BASE_ADDR+STORK_VM_ADJUST_CS2 + 0x20*which); + + storkLCDCPLD[which] |= bits; + *latch = storkLCDCPLD[which]; + return ret; +} + + +/* NB we don't shadow these 'cos there is no relation between the data written and the data read */ +/* ie the read registers are read only and the write registers write only */ + +int +storkGetLCDCPLD(int which) +{ + volatile unsigned int *latch = (unsigned int *)(STORK_LCDCPLD_BASE_ADDR+STORK_VM_ADJUST_CS2 + 0x20*which); + return *latch; +} + +int +storkClearLCDCPLD(int which, int bits) +{ + int ret = storkLCDCPLD[which]; + volatile unsigned int *latch = (unsigned int *)(STORK_LCDCPLD_BASE_ADDR+STORK_VM_ADJUST_CS2 + 0x20*which); + + storkLCDCPLD[which] &= ~bits; + *latch = storkLCDCPLD[which]; + return ret; +} + +int +storkSetLatchB(int bits) +{ + int ret = storkLatchB; + char buf[100]; + + volatile unsigned int *latch = (unsigned int *)(STORK_LATCH_B_ADDR+STORK_VM_ADJUST_CS1); + sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits); + if (debug) printk(buf); + + storkLatchB |= bits; + *latch = storkLatchB; + return ret; +} + +int +storkClearLatchB(int bits) +{ + int ret = storkLatchB; + char buf[100]; + + volatile unsigned int *latch = (unsigned int *)(STORK_LATCH_B_ADDR+STORK_VM_ADJUST_CS1); + sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits); + if (debug) printk(buf); + + storkLatchB &= ~bits; + *latch = storkLatchB; + return ret; +} + +void +storkSetGPIO(int bits) +{ + char buf[100]; + + sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits); + if (debug) printk(buf); + GPSR = bits; +} + +void +storkClearGPIO(int bits) +{ + char buf[100]; + + sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits); + if (debug) printk(buf); + GPCR = bits; +} + +int +storkGetGPIO() +{ + char buf[100]; + + int bits = GPLR; + + sprintf(buf, "%s: bits %04x\n", __FUNCTION__, bits); + if (debug) printk(buf); + + return bits; +} + +/* this will return the current state of the hardware ANDED with the given bits + so NE => at least one bit was set, but maybe not all of them! */ + +int +storkTestGPIO(int bits) +{ + int val = storkGetGPIO(); + char buf[100]; + + sprintf(buf, "%s: bits %04x val %04x\n", __FUNCTION__, bits, val); + if (debug) printk(buf); + + return (val & bits); +} + +/* NB the touch screen and the d to a use the same data and clock out pins */ + +static void storkClockTS(void) +{ + storkSetLatchB(STORK_TOUCH_SCREEN_DCLK); + udelay(10); /* hmm wait 200ns (min) - ok this ought to be udelay(1) but that doesn't get */ + /* consistant values so I'm using 10 (urgh) */ + storkClearLatchB(STORK_TOUCH_SCREEN_DCLK); + udelay(10); +} + + +int /* there is always a 12 bit read after the write! */ +storkClockByteToTS(int byte) +{ + int timeout = 10000; /* stuff is meant to happen in 60ns */ + int bit; + int result = 0; + + if (debug) printk("storkClockByteToTS: %02x\n", byte); + + storkClearLatchB(STORK_TOUCH_SCREEN_CS); /* slect touch screen */ + + while (timeout-- > 0) + if (storkTestGPIO(GPIO_STORK_TOUCH_SCREEN_BUSY) == 0) + break; + + if (timeout < 0) { + printk("storkClockBitToTS: GPIO_STORK_TOUCH_SCREEN_BUSY didn't go low!\n\r"); +/* ignore error for now return; */ + } + +/* clock out the given byte */ + + for (bit = 0x80; bit > 0; bit = bit >> 1) { + + if ((bit & byte) == 0) + storkClearLatchB(STORK_TOUCH_SCREEN_DIN); + else + storkSetLatchB(STORK_TOUCH_SCREEN_DIN); + + storkClockTS(); + } + + storkClockTS(); /* will be busy for at a clock (at least) */ + + for (timeout = 10000; timeout >= 0; timeout--) + if (storkTestGPIO(GPIO_STORK_TOUCH_SCREEN_BUSY) == 0) + break; + + if (timeout < 0) { + printk("storkClockBitToTS: 2nd GPIO_STORK_TOUCH_SCREEN_BUSY didn't go low!\n\r"); +/* ignore error for now return; */ + } + +/* clock in the result */ + + for (bit = 0x0800; bit > 0; bit = bit >> 1) { + + if (storkTestGPIO(GPIO_STORK_TOUCH_SCREEN_DATA)) + result |= bit; + + storkClockTS(); + } + + storkSetLatchB(STORK_TOUCH_SCREEN_CS); /* unselect touch screen */ + + return result; +} + +void +storkClockShortToDtoA(int word) +{ + int bit; + + storkClearLatchB(STORK_DA_CS); /* select D to A */ + +/* clock out the given byte */ + + for (bit = 0x8000; bit > 0; bit = bit >> 1) { + + if ((bit & word) == 0) + storkClearLatchB(STORK_TOUCH_SCREEN_DIN); + else + storkSetLatchB(STORK_TOUCH_SCREEN_DIN); + + storkClockTS(); + } + + storkSetLatchB(STORK_DA_CS); /* unselect D to A */ + +/* set DTOA#_LOAD low then high (min 20ns) to transfer value to D to A */ + storkClearLatchB(STORK_DA_LD); + storkSetLatchB(STORK_DA_LD); +} + + + +void +storkInitTSandDtoA(void) +{ + storkClearLatchB(STORK_TOUCH_SCREEN_DCLK | STORK_TOUCH_SCREEN_DIN); + storkSetLatchB(STORK_TOUCH_SCREEN_CS | STORK_DA_CS | STORK_DA_LD); + storkClockByteToTS(0xE2); /* turn on the reference */ + storkClockShortToDtoA(0x8D00); /* turn on the contrast */ + storkClockShortToDtoA(0x0A00); /* turn on the brightness */ +} + +/* see asm-arm/keyboard.h - there are a bunch of basically virtual functions required */ +/* we have to fill in for them or else we can't call handle_scancode when we see a button pressed */ + +static int +stork_kbd_translate(unsigned char scancode, unsigned char *keycode, char rawmode) +{ + if (keycode) + *keycode = scancode; + + return 1; +} + +static char +stork_kbd_unexpected_up(unsigned char code) +{ + return 0; +} + + +struct map_desc stork_io_desc[] __initdata = { + /* virtual physical length domain r w c b */ + { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */ + { STORK_VM_BASE_CS1, STORK_VM_OFF_CS1, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* EGPIO 0 */ + { 0xf1000000, 0x10000000, 0x02800000, DOMAIN_IO, 1, 1, 0, 0 }, /* static memory bank 2 */ + { 0xf3800000, 0x40000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* static memory bank 4 */ + LAST_DESC +}; + +int __init +stork_map_io(void) +{ + sa1100_map_io(); + iotable_init(stork_io_desc); + + sa1100_register_uart(0, 1); /* com port */ + sa1100_register_uart(1, 2); + sa1100_register_uart(2, 3); + + printk("Stork driver initing latches\r\n"); + + storkClearLatchB(STORK_RED_LED); /* let's have the red LED on please */ + storkSetLatchB(STORK_YELLOW_LED); + storkSetLatchB(STORK_GREEN_LED); + storkSetLatchA(STORK_BATTERY_CHARGER_ON); + storkSetLatchA(STORK_LCD_5V_POWER_ON); + storkSetLatchA(STORK_LCD_3V3_POWER_ON); + + storkInitTSandDtoA(); + + k_translate = stork_kbd_translate; + k_unexpected_up = stork_kbd_unexpected_up; + + return 0; +} + + +MACHINE_START(STORK, "Stork Technologies prototype") + BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000) + BOOT_PARAMS(0xc0000100) + MAPIO(stork_map_io) + INITIRQ(sa1100_init_irq) +MACHINE_END + + +EXPORT_SYMBOL(storkTestGPIO); +EXPORT_SYMBOL(storkSetGPIO); +EXPORT_SYMBOL(storkClearGPIO); +EXPORT_SYMBOL(storkSetLatchA); +EXPORT_SYMBOL(storkClearLatchA); +EXPORT_SYMBOL(storkSetLatchB); +EXPORT_SYMBOL(storkClearLatchB); +EXPORT_SYMBOL(storkClockByteToTS); +EXPORT_SYMBOL(storkClockShortToDtoA); +EXPORT_SYMBOL(storkGetLCDCPLD); +EXPORT_SYMBOL(storkSetLCDCPLD); diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index dd952f3700e5..af9ce59b8ab2 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -165,6 +165,8 @@ typedef struct { volatile u32 offset[4096]; } __regbase; #include "adsbitsy.h" #endif +#include "stork.h" + #include "system3.h" #ifdef CONFIG_SA1101 diff --git a/include/asm-arm/arch-sa1100/stork.h b/include/asm-arm/arch-sa1100/stork.h new file mode 100644 index 000000000000..91b3dbc5a30e --- /dev/null +++ b/include/asm-arm/arch-sa1100/stork.h @@ -0,0 +1,164 @@ +/* + stork.h + +*/ + +#ifndef STORK_SA1100_H +#define STORK_SA1100_H + +/* ugly - this will make sure we build sa1100fb for the Nec display not the Kyocera */ +#define STORK_TFT 1 + + +#define GPIO_STORK_SWITCH_1 (1 << 0) /* Switch 1 - input */ +#define GPIO_STORK_SWITCH_2 (1 << 1) /* Switch 2 - input */ +#define GPIO_STORK_TOUCH_SCREEN_BUSY (1 << 10) /* TOUCH_SCREEN_BUSY - input */ +#define GPIO_STORK_TOUCH_SCREEN_DATA (1 << 11) /* TOUCH_SCREEN_DATA - input */ +#define GPIO_STORK_CODEC_AGCSTAT (1 << 12) /* CODEC_AGCSTAT -input */ +#define GPIO_STORK_RS232_ON (1 << 13) /* enable RS232 (UART1) */ +#define GPIO_STORK_TEST_POINT (1 << 14) /* to test point */ +#define GPIO_STORK_L3_I2C_SDA (1 << 15) /* L3_I2C_SDA - bidirectional */ +#define GPIO_STORK_PSU_SYNC_MODE (1 << 16) /* PSU_SYNC_MODE - output */ +#define GPIO_STORK_L3_MODE (1 << 17) /* L3 mode - output (??) */ +#define GPIO_STORK_L3_I2C_SCL (1 << 18) /* L3_I2C_SCL - bidirectional */ +#define GPIO_STORK_AUDIO_CLK (1 << 19) /* SSP external clock (Audio clock) - input */ +#define GPIO_STORK_PCMCIA_A_CARD_DETECT (1 << 20) /* PCMCIA_A_CARD_DETECT - input */ +#define GPIO_STORK_PCMCIA_B_CARD_DETECT (1 << 21) /* PCMCIA_B_CARD_DETECT - input */ +#define GPIO_STORK_PCMCIA_A_RDY (1 << 22) /* PCMCIA_A_RDY - input */ +#define GPIO_STORK_PCMCIA_B_RDY (1 << 23) /* PCMCIA_B_RDY - input */ +#define GPIO_STORK_SWITCH_EXTRA_IRQ (1 << 24) /* Extra IRQ from switch detect logic - input */ +#define GPIO_STORK_SWITCH_IRQ (1 << 25) /* Sitch irq - input */ +#define GPIO_STORK_BATTERY_LOW_IRQ (1 << 26) /* BATTERY_LOW_IRQ - input */ +#define GPIO_STORK_TOUCH_SCREEN_PEN_IRQ (1 << 27) /* TOUCH_SCREEN_PEN_IRQ -input */ + +#define IRQ_GPIO_STORK_PCMCIA_A_CARD_DETECT IRQ_GPIO20 /* PCMCIA_A_CARD_DETECT - input */ +#define IRQ_GPIO_STORK_PCMCIA_B_CARD_DETECT IRQ_GPIO21 /* PCMCIA_B_CARD_DETECT - input */ + +#define IRQ_GPIO_STORK_SWITCH_1 IRQ_GPIO0 /* Switch 1 - input - active low */ +#define IRQ_GPIO_STORK_SWITCH_2 IRQ_GPIO1 /* Switch 2 - input - active low */ +#define IRQ_GPIO_STORK_SWITCH_EXTRA_IRQ IRQ_GPIO24 /* Extra IRQ from switch detect logic - input - active low */ +#define IRQ_GPIO_STORK_SWITCH_IRQ IRQ_GPIO25 /* Switch irq - input- active low */ +#define IRQ_GPIO_STORK_BATTERY_LOW_IRQ IRQ_GPIO26 /* BATTERY_LOW_IRQ - input - active low */ +#define IRQ_GPIO_STORK_TOUCH_SCREEN_PEN_IRQ IRQ_GPIO27 /* TOUCH_SCREEN_PEN_IRQ -input - goes low when it happens */ + +/* this may be bogus - no it's not the RDY line becomes the IRQ line when we're up as an IO device */ +#define IRQ_GPIO_STORK_PCMCIA_A_RDY IRQ_GPIO22 /* PCMCIA_A_RDY - input */ +#define IRQ_GPIO_STORK_PCMCIA_B_RDY IRQ_GPIO23 /* PCMCIA_B_RDY - input */ + +/* the default outputs, others are optional - I'll set these in the bootldr for now */ +#define GPIO_STORK_OUTPUT_BITS (GPIO_STORK_RS232_ON | GPIO_STORK_PSU_SYNC_MODE | GPIO_STORK_L3_MODE) + +#define STORK_LATCH_A_ADDR 0x08000000 /* cs1 A5 = 0 */ +#define STORK_LATCH_B_ADDR 0x08000020 /* cs1 A5 = 1 */ + +#define STORK_LCDCPLD_BASE_ADDR 0x10000000 /* cs2 A5 = 0 */ + +/* bit defs for latch A - these are write only and will need to be mirrored! */ + +#define STORK_TEMP_IC_POWER_ON (1 << 0) +#define STORK_SED1386_POWER_ON (1 << 1) +#define STORK_LCD_3V3_POWER_ON (1 << 2) +#define STORK_LCD_5V_POWER_ON (1 << 3) +#define STORK_LCD_BACKLIGHT_INVERTER_ON (1 << 4) +#define STORK_PCMCIA_PULL_UPS_POWER_ON (1 << 5) +#define STORK_PCMCIA_A_POWER_ON (1 << 6) +#define STORK_PCMCIA_B_POWER_ON (1 << 7) +#define STORK_AUDIO_POWER_ON (1 << 8) +#define STORK_AUDIO_AMP_ON (1 << 9) +#define STORK_BAR_CODE_POWER_ON (1 << 10) +#define STORK_BATTERY_CHARGER_ON (1 << 11) +#define STORK_SED1386_RESET (1 << 12) +#define STORK_IRDA_FREQUENCY_SELECT (1 << 13) +#define STORK_IRDA_MODE_0 (1 << 14) +#define STORK_IRDA_MODE_1 (1 << 15) + +/* and for B */ + +#define STORK_AUX_AD_SEL_0 (1 << 0) +#define STORK_AUX_AD_SEL_1 (1 << 1) +#define STORK_TOUCH_SCREEN_DCLK (1 << 2) +#define STORK_TOUCH_SCREEN_DIN (1 << 3) +#define STORK_TOUCH_SCREEN_CS (1 << 4) +#define STORK_DA_CS (1 << 5) +#define STORK_DA_LD (1 << 6) +#define STORK_RED_LED (1 << 7) /* active LOW */ +#define STORK_GREEN_LED (1 << 8) /* active LOW */ +#define STORK_YELLOW_LED (1 << 9) /* active LOW */ +#define STORK_PCMCIA_B_RESET (1 << 10) +#define STORK_PCMCIA_A_RESET (1 << 11) +#define STORK_AUDIO_CODEC_RESET (1 << 12) +#define STORK_CODEC_QMUTE (1 << 13) +#define STORK_AUDIO_CLOCK_SEL0 (1 << 14) +#define STORK_AUDIO_CLOCK_SEL1 (1 << 15) + + +/* + + There are 8 control bits in the touch screen controller (AD7873) + + S A2 A1 A0 MODE SER/DFR# PD1 PD0 + + S Start bit, always one. + A2 - A0 Channel select bits + MODE 0 => 12 bit resolution, 1 => 8 bit + SER/DFR# Single ender/Differential Reference Select bit + PD1, PD0 Power management bits (usually 10) + + +From Table 1. + + A2-A0 + + 0 Temp0 (SER must be 1) + 1 X+ (is this a typo? - is this X- really?) + 2 VBAT, + 3 read X+ (Z1), + 4 read Y- (Z2), 5 => read Y+, + +*/ + +#define AD7873_START 0x80 /* all commands need this to be set */ +#define AD7873_ADDR_BITS 4 /* ie shift by this */ +#define AD7873_8BITMODE 0x08 /* 0 => 12 bit convertions */ +#define AD7873_SER_DFR 0x04 +#define AD7873_PD1 0x02 +#define AD7873_PD0 0x01 + +#define AD7873_TEMP0 AD7873_SER_DFR +#define AD7873_X (1 << AD7873_ADDR_BITS) +#define AD7873_VBAT ((2 << AD7873_ADDR_BITS) | AD7873_SER_DFR) +#define AD7873_X_Z1 (3 << AD7873_ADDR_BITS) +#define AD7873_Y_Z2 (4 << AD7873_ADDR_BITS) +#define AD7873_Y (5 << AD7873_ADDR_BITS) +#define AD7873_AUX ((6 << AD7873_ADDR_BITS) | AD7873_SER_DFR) +#define AD7873_TEMP1 ((7 << AD7873_ADDR_BITS) | AD7873_SER_DFR) + +#ifndef __ASSEMBLY__ + +extern int storkSetLatchA(int bits); +extern int storkClearLatchA(int bits); + +extern int storkSetLatchB(int bits); +extern int storkClearLatchB(int bits); + +extern int storkSetLCDCPLD(int which, int bits); +extern int storkClearLCDCPLD(int which, int bits); + +extern void storkSetGPIO(int bits); +extern void storkClearGPIO(int bits); + +extern int storkGetGPIO(void); + +extern void storkClockShortToDtoA(int word); +extern int storkClockByteToTS(int byte); + + +/* this will return the current state of the hardware ANDED with the given bits + so NE => at least one bit was set, but maybe not all of them! */ + +extern int storkTestGPIO(int bits); + + +#endif + +#endif -- cgit v1.2.3 From e51b59f61845f132d7d3fde1010296f9397c147d Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 25 Feb 2002 23:24:10 +0000 Subject: Update Shark machine type. --- arch/arm/def-configs/shark | 83 +++++++++++++++++++++------- arch/arm/kernel/via82c505.c | 100 +++++----------------------------- arch/arm/mach-shark/pci.c | 11 ++-- include/asm-arm/arch-shark/hardware.h | 3 +- include/asm-arm/arch-shark/keyboard.h | 2 - include/asm-arm/arch-shark/param.h | 6 +- include/asm-arm/arch-shark/time.h | 68 ++++------------------- 7 files changed, 97 insertions(+), 176 deletions(-) (limited to 'include') diff --git a/arch/arm/def-configs/shark b/arch/arm/def-configs/shark index c06c952b2588..1926d68f3d55 100644 --- a/arch/arm/def-configs/shark +++ b/arch/arm/def-configs/shark @@ -9,6 +9,7 @@ CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set # CONFIG_GENERIC_BUST_SPINLOCK is not set +# CONFIG_GENERIC_ISA_DMA is not set # # Code maturity level options @@ -26,14 +27,17 @@ CONFIG_KMOD=y # # System Type # +# CONFIG_ARCH_ADIFCC is not set # CONFIG_ARCH_ANAKIN is not set # CONFIG_ARCH_ARCA5K is not set # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set # CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP310 is not set # CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set @@ -66,12 +70,16 @@ CONFIG_ARCH_SHARK=y # CONFIG_SA1100_ADSBITSY is not set # CONFIG_SA1100_BRUTUS is not set # CONFIG_SA1100_CERF is not set +# CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set +# CONFIG_SA1100_H3XXX is not set # CONFIG_SA1100_EXTENEX1 is not set # CONFIG_SA1100_FLEXANET is not set # CONFIG_SA1100_FREEBIRD is not set # CONFIG_SA1100_GRAPHICSCLIENT is not set # CONFIG_SA1100_GRAPHICSMASTER is not set +# CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HUW_WEBPANEL is not set # CONFIG_SA1100_ITSY is not set @@ -80,20 +88,28 @@ CONFIG_ARCH_SHARK=y # CONFIG_SA1100_OMNIMETER is not set # CONFIG_SA1100_PANGOLIN is not set # CONFIG_SA1100_PLEB is not set +# CONFIG_SA1100_PT_SYSTEM3 is not set +# CONFIG_SA1100_SHANNON is not set # CONFIG_SA1100_SHERMAN is not set # CONFIG_SA1100_SIMPAD is not set # CONFIG_SA1100_PFS168 is not set # CONFIG_SA1100_VICTOR is not set # CONFIG_SA1100_XP860 is not set # CONFIG_SA1100_YOPY is not set +# CONFIG_SA1100_USB is not set +# CONFIG_SA1100_USB_NETLINK is not set +# CONFIG_SA1100_USB_CHAR is not set +# CONFIG_H3600_SLEEVE is not set # # CLPS711X/EP721X Implementations # +# CONFIG_ARCH_AUTCPU12 is not set # CONFIG_ARCH_CDB89712 is not set # CONFIG_ARCH_CLEP7312 is not set # CONFIG_ARCH_EDB7211 is not set # CONFIG_ARCH_P720T is not set +# CONFIG_ARCH_FORTUNET is not set # CONFIG_ARCH_EP7211 is not set # CONFIG_ARCH_EP7212 is not set # CONFIG_ARCH_ACORN is not set @@ -112,9 +128,12 @@ CONFIG_CPU_32v4=y # CONFIG_CPU_ARM710 is not set # CONFIG_CPU_ARM720T is not set # CONFIG_CPU_ARM920T is not set +# CONFIG_CPU_ARM922T is not set +# CONFIG_CPU_ARM926T is not set # CONFIG_CPU_ARM1020 is not set CONFIG_CPU_SA110=y # CONFIG_CPU_SA1100 is not set +# CONFIG_XSCALE_PMU is not set # CONFIG_ARM_THUMB is not set # CONFIG_DISCONTIGMEM is not set @@ -122,8 +141,11 @@ CONFIG_CPU_SA110=y # General setup # CONFIG_PCI=y +# CONFIG_PCI_HOST_PLX90X0 is not set +CONFIG_PCI_HOST_VIA82C505=y CONFIG_ISA=y CONFIG_ISA_DMA=y +# CONFIG_FIQ is not set # CONFIG_PCI_NAMES is not set # CONFIG_HOTPLUG is not set # CONFIG_PCMCIA is not set @@ -143,6 +165,7 @@ CONFIG_KCORE_ELF=y CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_MISC is not set # CONFIG_PM is not set +# CONFIG_APM is not set # CONFIG_ARTHUR is not set CONFIG_LEDS=y CONFIG_LEDS_TIMER=y @@ -172,7 +195,6 @@ CONFIG_PARPORT_PC_CML1=y # # CONFIG_PNP is not set # CONFIG_ISAPNP is not set -# CONFIG_PNPBIOS is not set # # Block devices @@ -182,6 +204,7 @@ CONFIG_PARPORT_PC_CML1=y # CONFIG_PARIDE is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_CISS_SCSI_TAPE is not set # CONFIG_BLK_DEV_DAC960 is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set @@ -204,10 +227,11 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # Networking options # -# CONFIG_PACKET is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set # CONFIG_NETLINK is not set # CONFIG_NETFILTER is not set -# CONFIG_FILTER is not set +CONFIG_FILTER=y CONFIG_UNIX=y CONFIG_INET=y # CONFIG_IP_MULTICAST is not set @@ -220,6 +244,7 @@ CONFIG_INET=y # CONFIG_IPV6 is not set # CONFIG_KHTTPD is not set # CONFIG_ATM is not set +# CONFIG_VLAN_8021Q is not set # # @@ -260,6 +285,7 @@ CONFIG_NETDEVICES=y # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y +# CONFIG_ARM_AM79C961A is not set # CONFIG_SUNLANCE is not set # CONFIG_HAPPYMEAL is not set # CONFIG_SUNBMAC is not set @@ -280,6 +306,7 @@ CONFIG_NET_PCI=y # CONFIG_AC3200 is not set # CONFIG_APRICOT is not set CONFIG_CS89x0=y +# CONFIG_DE2104X is not set # CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set @@ -291,6 +318,7 @@ CONFIG_CS89x0=y # CONFIG_NE2K_PCI is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set +# CONFIG_8139CP is not set # CONFIG_8139TOO is not set # CONFIG_8139TOO_PIO is not set # CONFIG_8139TOO_TUNE_TWISTER is not set @@ -300,6 +328,7 @@ CONFIG_CS89x0=y # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set # CONFIG_VIA_RHINE is not set +# CONFIG_VIA_RHINE_MMIO is not set # CONFIG_WINBOND_840 is not set # CONFIG_NET_POCKET is not set @@ -416,7 +445,6 @@ CONFIG_CHR_DEV_SG=m # # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # -# CONFIG_SCSI_DEBUG_QUEUES is not set # CONFIG_SCSI_MULTI_LUN is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set @@ -453,6 +481,7 @@ CONFIG_CHR_DEV_SG=m # CONFIG_SCSI_IMM is not set # CONFIG_SCSI_NCR53C406A is not set # CONFIG_SCSI_NCR53C7xx is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_NCR53C8XX is not set # CONFIG_SCSI_SYM53C8XX is not set # CONFIG_SCSI_PAS16 is not set @@ -521,16 +550,20 @@ CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_21285 is not set # CONFIG_SERIAL_21285_OLD is not set # CONFIG_SERIAL_21285_CONSOLE is not set +# CONFIG_SERIAL_UART00 is not set +# CONFIG_SERIAL_UART00_CONSOLE is not set # CONFIG_SERIAL_SA1100 is not set # CONFIG_SERIAL_SA1100_CONSOLE is not set # CONFIG_SERIAL_8250 is not set # CONFIG_SERIAL_8250_CONSOLE is not set +# CONFIG_ATOMWIDE_SERIAL is not set +# CONFIG_DUALSP_SERIAL is not set # CONFIG_SERIAL_8250_EXTENDED is not set # CONFIG_SERIAL_8250_MANY_PORTS is not set # CONFIG_SERIAL_8250_SHARE_IRQ is not set # CONFIG_SERIAL_8250_DETECT_IRQ is not set # CONFIG_SERIAL_8250_MULTIPORT is not set -# CONFIG_SERIAL_8250_HUB6 is not set +# CONFIG_SERIAL_8250_RSA is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 CONFIG_PRINTER=m @@ -588,7 +621,6 @@ CONFIG_RTC=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -# CONFIG_SONYPI is not set # # Ftape, the floppy tape device driver @@ -596,7 +628,6 @@ CONFIG_RTC=y # CONFIG_FTAPE is not set # CONFIG_AGP is not set # CONFIG_DRM is not set -# CONFIG_MWAVE is not set # # Multimedia devices @@ -617,7 +648,6 @@ CONFIG_RTC=y # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_BFS_FS is not set -# CONFIG_CMS_FS is not set CONFIG_EXT3_FS=y CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set @@ -630,12 +660,12 @@ CONFIG_VFAT_FS=y # CONFIG_JFFS2_FS is not set # CONFIG_CRAMFS is not set # CONFIG_TMPFS is not set -# CONFIG_RAMFS is not set +CONFIG_RAMFS=y CONFIG_ISO9660_FS=y CONFIG_JOLIET=y # CONFIG_ZISOFS is not set # CONFIG_MINIX_FS is not set -# CONFIG_FREEVXFS_FS is not set +# CONFIG_VXFS_FS is not set # CONFIG_NTFS_FS is not set # CONFIG_NTFS_RW is not set # CONFIG_HPFS_FS is not set @@ -807,7 +837,7 @@ CONFIG_SOUND_OSS=m # CONFIG_SOUND_DMAP is not set # CONFIG_SOUND_AD1816 is not set # CONFIG_SOUND_SGALAXY is not set -# CONFIG_SOUND_ADLIB is not set +CONFIG_SOUND_ADLIB=m # CONFIG_SOUND_ACI_MIXER is not set # CONFIG_SOUND_CS4232 is not set # CONFIG_SOUND_SSCAPE is not set @@ -850,8 +880,9 @@ CONFIG_SOUND_SB=m # CONFIG_USB is not set # -# USB Controllers +# USB Host Controller Drivers # +# CONFIG_USB_EHCI_HCD is not set # CONFIG_USB_UHCI is not set # CONFIG_USB_UHCI_ALT is not set # CONFIG_USB_OHCI is not set @@ -867,10 +898,10 @@ CONFIG_SOUND_SB=m # CONFIG_USB_STORAGE_DATAFAB is not set # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_STORAGE_DPCM is not set # CONFIG_USB_STORAGE_HP8200e is not set # CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set @@ -898,12 +929,10 @@ CONFIG_SOUND_SB=m # # Video4Linux support is needed for USB Multimedia device support # -# CONFIG_USB_DABUSB is not set # # USB Network adaptors # -# CONFIG_USB_PLUSB is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set @@ -926,27 +955,31 @@ CONFIG_SOUND_SB=m # CONFIG_USB_SERIAL_EMPEG is not set # CONFIG_USB_SERIAL_FTDI_SIO is not set # CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set # CONFIG_USB_SERIAL_IR is not set # CONFIG_USB_SERIAL_EDGEPORT is not set # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set # CONFIG_USB_SERIAL_KEYSPAN is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set +# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set # CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_KLSI is not set # CONFIG_USB_SERIAL_PL2303 is not set # CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_XIRCOM is not set # CONFIG_USB_SERIAL_OMNINET is not set # -# Miscellaneous USB drivers +# USB Miscellaneous drivers # # CONFIG_USB_RIO500 is not set -# CONFIG_USB_ID75 is not set +# CONFIG_USB_AUERSWALD is not set # # Bluetooth support @@ -957,11 +990,21 @@ CONFIG_SOUND_SB=m # Kernel hacking # CONFIG_NO_FRAME_POINTER=y -CONFIG_DEBUG_ERRORS=y CONFIG_DEBUG_USER=y # CONFIG_DEBUG_INFO is not set -# CONFIG_MAGIC_SYSRQ is not set # CONFIG_NO_PGT_CACHE is not set -CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_WAITQ is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_LL is not set # CONFIG_DEBUG_DC21285_PORT is not set # CONFIG_DEBUG_CLPS711X_UART2 is not set + +# +# Library routines +# +CONFIG_CRC32=y diff --git a/arch/arm/kernel/via82c505.c b/arch/arm/kernel/via82c505.c index 504eec9b71bb..5b52bbaa1dcd 100644 --- a/arch/arm/kernel/via82c505.c +++ b/arch/arm/kernel/via82c505.c @@ -74,85 +74,7 @@ static struct pci_ops via82c505_ops = { via82c505_write_config_dword, }; -#ifdef CONFIG_ARCH_SHARK - -static char size_wanted; - -static int -dummy_read_config_byte(struct pci_dev *dev, int where, u8 *value) -{ - *value=0; - return PCIBIOS_SUCCESSFUL; -} - -static int -dummy_read_config_word(struct pci_dev *dev, int where, u16 *value) -{ - *value=0; - return PCIBIOS_SUCCESSFUL; -} - -static int -dummy_read_config_dword(struct pci_dev *dev, int where, u32 *value) -{ - if (dev->devfn != 0) *value = 0; - else - switch(where) { - case PCI_VENDOR_ID: - *value = PCI_VENDOR_ID_INTERG | PCI_DEVICE_ID_INTERG_2010 << 16; - break; - case PCI_CLASS_REVISION: - *value = PCI_CLASS_DISPLAY_VGA << 16; - break; - case PCI_BASE_ADDRESS_0: - if (size_wanted) { - /* 0x00900000 bytes long (0xff700000) */ - *value = 0xff000000; - size_wanted = 0; - } else { - *value = FB_START; - } - break; - case PCI_INTERRUPT_LINE: - *value = 6; - break; - default: - *value = 0; - } - return PCIBIOS_SUCCESSFUL; -} - -static int -dummy_write_config_byte(struct pci_dev *dev, int where, u8 value) -{ - return PCIBIOS_SUCCESSFUL; -} - -static int -dummy_write_config_word(struct pci_dev *dev, int where, u16 value) -{ - return PCIBIOS_SUCCESSFUL; -} - -static int -dummy_write_config_dword(struct pci_dev *dev, int where, u32 value) -{ - if ((dev->devfn == 0) && (where == PCI_BASE_ADDRESS_0) && (value == 0xffffffff)) - size_wanted = 1; - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops dummy_ops = { - dummy_read_config_byte, - dummy_read_config_word, - dummy_read_config_dword, - dummy_write_config_byte, - dummy_write_config_word, - dummy_write_config_dword, -}; -#endif - -void __init via82c505_init(void *sysdata) +void __init via82c505_preinit(void *sysdata) { struct pci_bus *bus; @@ -166,13 +88,17 @@ void __init via82c505_init(void *sysdata) outb(0x93,0xA8); outb(0xd0,0xA9); - pci_scan_bus(0, &via82c505_ops, sysdata); +} + +int __init via82c505_setup(int nr, struct pci_sys_data *sys) +{ + return (nr == 0); +} + +struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata) +{ + if (nr == 0) + return pci_scan_bus(0, &via82c505_ops, sysdata); -#ifdef CONFIG_ARCH_SHARK - /* - * Initialize a fake pci-bus number 1 for the CyberPro - * on the vlbus - */ - bus = pci_scan_bus(1, &dummy_ops, sysdata); -#endif + return NULL; } diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c index 601922ce8ffa..c7384ce0c627 100644 --- a/arch/arm/mach-shark/pci.c +++ b/arch/arm/mach-shark/pci.c @@ -17,11 +17,14 @@ static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin) if (dev->bus->number == 0) if (dev->devfn == 0) return 255; else return 11; - else return 6; + else return 255; } struct hw_pci shark_pci __initdata = { - init: via82c505_init, - swizzle: no_swizzle, - map_irq: shark_map_irq + setup: via82c505_setup, + swizzle: pci_std_swizzle, + map_irq: shark_map_irq, + nr_controllers: 1, + scan: via82c505_scan_bus, + preinit: via82c505_preinit }; diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h index 5d75012c4660..f4f54113fd1c 100644 --- a/include/asm-arm/arch-shark/hardware.h +++ b/include/asm-arm/arch-shark/hardware.h @@ -38,7 +38,8 @@ /* defines for the Framebuffer */ -#define FB_START 0x06000000 +#define FB_START 0x06000000 +#define FB_SIZE 0x01000000 #define UNCACHEABLE_ADDR 0xdf010000 diff --git a/include/asm-arm/arch-shark/keyboard.h b/include/asm-arm/arch-shark/keyboard.h index 3d400663a304..52b5ed6e198a 100644 --- a/include/asm-arm/arch-shark/keyboard.h +++ b/include/asm-arm/arch-shark/keyboard.h @@ -29,7 +29,6 @@ extern unsigned char pckbd_sysrq_xlate[128]; static inline void kbd_init_hw(void) { - if (have_isa_bridge) { k_setkeycode = pckbd_setkeycode; k_getkeycode = pckbd_getkeycode; k_translate = pckbd_translate; @@ -40,7 +39,6 @@ static inline void kbd_init_hw(void) k_sysrq_xlate = pckbd_sysrq_xlate; #endif pckbd_init_hw(); - } } /* diff --git a/include/asm-arm/arch-shark/param.h b/include/asm-arm/arch-shark/param.h index fd18c5142ebb..3bb89b094e5b 100644 --- a/include/asm-arm/arch-shark/param.h +++ b/include/asm-arm/arch-shark/param.h @@ -4,9 +4,5 @@ * by Alexander Schulz */ -/* This must be a power of 2 because the RTC - * can't use anything else. - */ -#define HZ 64 +#define HZ 100 -#define hz_to_std(a) ((a * HZ)/100) diff --git a/include/asm-arm/arch-shark/time.h b/include/asm-arm/arch-shark/time.h index 3d5bd8c0ca3f..69f0001088d2 100644 --- a/include/asm-arm/arch-shark/time.h +++ b/include/asm-arm/arch-shark/time.h @@ -3,44 +3,21 @@ * * by Alexander Schulz * - * Uses the real time clock because you can't run - * the timer with level triggered interrupts and - * you can't run the shark with edge triggered - * inetrrupts (loses ints and hangs). - * - * derived from linux/drivers/char/rtc.c and: - * linux/include/asm-arm/arch-ebsa110/time.h + * derived from include/asm-arm/arch-ebsa110/time.h * Copyright (c) 1996,1997,1998 Russell King. */ #include -#include - -#define IRQ_TIMER 8 +#include -extern void get_rtc_time(struct rtc_time *rtc_tm); -extern void set_rtc_irq_bit(unsigned char bit); -extern unsigned long epoch; +#define IRQ_TIMER 0 +#define HZ_TIME ((1193180 + HZ/2) / HZ) static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { - - CMOS_READ(RTC_INTR_FLAGS); - do_leds(); - - { -#ifdef DIVISOR - static unsigned int divisor; - - if (divisor-- == 0) { - divisor = DIVISOR - 1; -#else - { -#endif - do_timer(regs); - } - } + do_timer(regs); + do_profile(regs); } /* @@ -48,38 +25,15 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) */ void __init time_init(void) { - struct rtc_time r_time; unsigned long flags; - int tmp = 0; - unsigned char val; - - /* - * Set the clock to 128 Hz, we already have a valid - * vector now: - */ - - while (HZ > (1<> 8, 0x40); - get_rtc_time(&r_time); - xtime.tv_sec = mktime(r_time.tm_year+epoch, r_time.tm_mon+1, r_time.tm_mday, - r_time.tm_hour, r_time.tm_min, r_time.tm_sec); + xtime.tv_sec = 0; timer_irq.handler = timer_interrupt; timer_irq.flags = SA_INTERRUPT; /* FIXME: really? */ - setup_arm_irq(IRQ_TIMER, &timer_irq); + setup_irq(IRQ_TIMER, &timer_irq); } -- cgit v1.2.3