From 69964a474a397a844e82d0b49e40f8f6d46eaefa Mon Sep 17 00:00:00 2001
From: Sam Ravnborg <sam@mars.ravnborg.org>
Date: Mon, 30 Dec 2002 13:09:26 -0600
Subject: kbuild: $(build) and $(clean) macros for make invocation

The former macro $(descend ...) hide for make the fact that a recursively make was
invoked. The replacement $(Q)$(MAKE) -f scripts/Makefile.build obj=dir was too verbose.

Introduced $(build) and $(clean) allowing the following syntax:
$(Q)$(MAKE) $(build)=arch/i386/boot target
and similar for clean.

Introduced $(build) and $(clean) in general, and for i386 architecture.
---
 scripts/Makefile.build | 2 +-
 scripts/Makefile.clean | 7 ++++++-
 scripts/Makefile.lib   | 7 ++++++-
 3 files changed, 13 insertions(+), 3 deletions(-)

(limited to 'scripts')

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 5d4c0a41972b..2db7cc59c2bd 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -286,7 +286,7 @@ targets += $(host-csingle)  $(host-cmulti) $(host-cobjs)\
 
 .PHONY: $(subdir-ym)
 $(subdir-ym):
-	$(Q)$(MAKE) -f scripts/Makefile.build obj=$@
+	$(Q)$(MAKE) $(build)=$@
 
 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
 # ---------------------------------------------------------------------------
diff --git a/scripts/Makefile.clean b/scripts/Makefile.clean
index e7c392fd5788..07af41d7933e 100644
--- a/scripts/Makefile.clean
+++ b/scripts/Makefile.clean
@@ -56,8 +56,13 @@ endif
 
 .PHONY: $(subdir-ymn)
 $(subdir-ymn):
-	$(Q)$(MAKE) -f scripts/Makefile.clean obj=$@
+	$(Q)$(MAKE) $(clean)=$@
 
 # If quiet is set, only print short version of command
 
 cmd = @$(if $($(quiet)cmd_$(1)),echo '  $($(quiet)cmd_$(1))' &&) $(cmd_$(1))
+
+# Shorthand for $(Q)$(MAKE) scripts/Makefile.clean obj=dir
+# Usage:
+# $(Q)$(MAKE) $(clean)=dir
+clean := -f scripts/Makefile.clean obj
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index f9136c459970..bc1d58cb93c1 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -244,5 +244,10 @@ endef
 
 #	$(call descend,<dir>,<target>)
 #	Recursively call a sub-make in <dir> with target <target> 
-
+# Usage is deprecated, because make do not see this as an invocation of make.
 descend =$(Q)$(MAKE) -f scripts/Makefile.build obj=$(1) $(2)
+
+# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
+# Usage:
+# $(Q)$(MAKE) $(build)=dir
+build := -f scripts/Makefile.build obj
-- 
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