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authorDamien George <damien.p.george@gmail.com>2019-10-21 12:23:41 +1100
committerDamien George <damien.p.george@gmail.com>2019-10-21 12:23:41 +1100
commit12413e92a3f938bdfe844bd65bf189ee1431e1d0 (patch)
treef3396921486331635f225465f406b730779d97ba
parent8f9e2e325ab0d0dfa9457779010a4cb2cfe60fef (diff)
stm32/powerctrlboot: Fix config of systick IRQ priority on F0/L0/WB MCU.
Prior to this commit the systick IRQ priority was set at lowest priority on F0/L0/WB MCUs, because it was left at the default and never configured. This commit ensures the priority is configured and sets it to the highest priority.
-rw-r--r--ports/stm32/irq.h4
-rw-r--r--ports/stm32/powerctrlboot.c19
2 files changed, 12 insertions, 11 deletions
diff --git a/ports/stm32/irq.h b/ports/stm32/irq.h
index 78ba46ced..4b1251666 100644
--- a/ports/stm32/irq.h
+++ b/ports/stm32/irq.h
@@ -120,7 +120,7 @@ MP_DECLARE_CONST_FUN_OBJ_0(pyb_irq_stats_obj);
#if __CORTEX_M == 0
-//#def IRQ_PRI_SYSTICK 0
+#define IRQ_PRI_SYSTICK 0
#define IRQ_PRI_UART 1
#define IRQ_PRI_SDIO 1
#define IRQ_PRI_DMA 1
@@ -136,7 +136,7 @@ MP_DECLARE_CONST_FUN_OBJ_0(pyb_irq_stats_obj);
#else
-//#def IRQ_PRI_SYSTICK NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 0, 0)
+#define IRQ_PRI_SYSTICK NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 0, 0)
// The UARTs have no FIFOs, so if they don't get serviced quickly then characters
// get dropped. The handling for each character only consumes about 0.5 usec
diff --git a/ports/stm32/powerctrlboot.c b/ports/stm32/powerctrlboot.c
index 766c52dfb..acc33f125 100644
--- a/ports/stm32/powerctrlboot.c
+++ b/ports/stm32/powerctrlboot.c
@@ -27,6 +27,13 @@
#include "py/mphal.h"
#include "powerctrl.h"
+static inline void powerctrl_config_systick(void) {
+ // Configure SYSTICK to run at 1kHz (1ms interval)
+ SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
+ SysTick_Config(HAL_RCC_GetHCLKFreq() / 1000);
+ NVIC_SetPriority(SysTick_IRQn, IRQ_PRI_SYSTICK);
+}
+
#if defined(STM32F0)
void SystemClock_Config(void) {
@@ -88,9 +95,7 @@ void SystemClock_Config(void) {
}
SystemCoreClockUpdate();
-
- HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
- HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+ powerctrl_config_systick();
}
#elif defined(STM32L0)
@@ -122,9 +127,7 @@ void SystemClock_Config(void) {
}
SystemCoreClockUpdate();
-
- HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
- HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+ powerctrl_config_systick();
#if MICROPY_HW_ENABLE_RNG || MICROPY_HW_ENABLE_USB
// Enable the 48MHz internal oscillator
@@ -189,9 +192,7 @@ void SystemClock_Config(void) {
RCC->CCIPR = 2 << RCC_CCIPR_CLK48SEL_Pos;
SystemCoreClockUpdate();
-
- HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
- HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+ powerctrl_config_systick();
}
#endif