diff options
| author | Yuuki NAGAO <wf.yn386@gmail.com> | 2023-07-01 15:07:18 +0900 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2023-09-01 13:52:00 +1000 |
| commit | 141750ff7924cbf4b023e8b0c5715c5d7ae970b7 (patch) | |
| tree | 276b7c0ac3c40548109b94c7f407d27ce19728b4 | |
| parent | a175f98a65173e254d4185e51f49b11cab20ffac (diff) | |
stm32/uart: Fix UART timeout issue with low baudrate on G4 MCUs.
With using UART FIFO, the timeout should be long enough that FIFO becomes
empty. Since previous data transfer may be ongoing, the timeout must be
timeout_char multiplied by FIFO size + 1.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
| -rw-r--r-- | ports/stm32/uart.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c index e477c5c16..7a2a3a958 100644 --- a/ports/stm32/uart.c +++ b/ports/stm32/uart.c @@ -1052,12 +1052,20 @@ size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars, // the overall timeout rather than the character timeout. timeout = self->timeout; } else { + #if defined(STM32G4) + // With using UART FIFO, the timeout should be long enough that FIFO becomes empty. + // Since previous data transfer may be ongoing, the timeout must be multiplied + // timeout_char by FIFO size + 1. + // STM32G4 has 8 words FIFO. + timeout = (8 + 1) * self->timeout_char; + #else // The timeout specified here is for waiting for the TX data register to // become empty (ie between chars), as well as for the final char to be // completely transferred. The default value for timeout_char is long // enough for 1 char, but we need to double it to wait for the last char // to be transferred to the data register, and then to be transmitted. timeout = 2 * self->timeout_char; + #endif } const uint8_t *src = (const uint8_t *)src_in; |
