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authorbadlyby <badlyby@gmail.com>2019-07-19 08:58:02 +0800
committerDamien George <damien.p.george@gmail.com>2019-07-25 16:31:36 +1000
commit09267bb147c06ef5350b91034342924a9d9efa05 (patch)
tree71c5a15f285ecd786664eeccb6918d831abe9423
parent0da2f6f23a8316f6810c47b2d8410bf11029f2a1 (diff)
stm32/boards/stm32f722.ld: Provide memory regions for internal FS.
-rw-r--r--ports/stm32/boards/stm32f722.ld8
1 files changed, 5 insertions, 3 deletions
diff --git a/ports/stm32/boards/stm32f722.ld b/ports/stm32/boards/stm32f722.ld
index ab41f0ea9..fe84a4963 100644
--- a/ports/stm32/boards/stm32f722.ld
+++ b/ports/stm32/boards/stm32f722.ld
@@ -6,9 +6,11 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
- FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sectors 0,1 */
- FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 480K /* sectors 2-7 */
- RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K /* DTCM+SRAM1+SRAM2 */
+ FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0, 16K */
+ FLASH_FS (r) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1-4 3*16KiB 1*64KiB*/
+ FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5-7 3*128KiB = 384K */
+ DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K /* Used for storage cache */
+ RAM (xrw) : ORIGIN = 0x20010000, LENGTH = 192K /* SRAM1 = 176K, SRAM2 = 16K */
}
/* produce a link error if there is not this amount of RAM for these sections */