diff options
| author | Damien George <damien@micropython.org> | 2025-03-31 12:35:26 +1100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2025-04-09 00:22:33 +1000 |
| commit | 3564ce5bd8c22254c39a556232891f9d43201eac (patch) | |
| tree | 0ba6abd9231ad5cb9ac85f269079cc862d1fb085 | |
| parent | 737acef5cbd8ffb5a7c0ef605741debd70e72606 (diff) | |
alif/ospi_flash: Don't invalidate cache after erasing/writing.
It's not needed, the MPU configures the XIP as non-cacheable.
Signed-off-by: Damien George <damien@micropython.org>
| -rw-r--r-- | ports/alif/ospi_flash.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/ports/alif/ospi_flash.c b/ports/alif/ospi_flash.c index 9ba7ebe6e..8bcd1fb5b 100644 --- a/ports/alif/ospi_flash.c +++ b/ports/alif/ospi_flash.c @@ -393,14 +393,11 @@ int ospi_flash_erase_sector(uint32_t addr) { ospi_flash_write_cmd(self, self->set->write_en); int ret = ospi_flash_wait_wel1(self); - if (ret < 0) { - return ret; + if (ret == 0) { + ospi_flash_write_cmd_addr(self, self->set->erase_command, OSPI_ADDR_L_32bit, addr); + ret = ospi_flash_wait_wip0(self); } - ospi_flash_write_cmd_addr(self, self->set->erase_command, OSPI_ADDR_L_32bit, addr); - ret = ospi_flash_wait_wip0(self); - - SCB_InvalidateDCache_by_Addr(global_flash.cfg.xip_base + addr, MICROPY_HW_FLASH_BLOCK_SIZE_BYTES); return ret; } @@ -463,7 +460,6 @@ int ospi_flash_write(uint32_t addr, uint32_t len, const uint8_t *src) { offset = 0; } - SCB_InvalidateDCache_by_Addr(global_flash.cfg.xip_base + addr, len); return ret; } |
