rp2/main: Enable SEVONPEND CPU interrupt bit.

Previously this was not set, so potential for race conditions in interrupt
handlers this didn't issue SEV.  (Which is currently all of them, as far as
I can see.)

Eventually we might be able to augment the interrupt handlers that wake the
main thread to call SEV, and leave the others as-is to suspend the CPU
slightly faster, but this will solve the issue for now.

This work was funded through GitHub Sponsors.

Signed-off-by: Angus Gratton <angus@redyak.com.au>

1 files changed, 3 insertions, 0 deletions

diff --git a/ports/rp2/main.c b/ports/rp2/main.c
index 43680a46c..8b41fac4b 100644
--- a/ports/rp2/main.c
+++ b/ports/rp2/main.c
@@ -73,6 +73,9 @@ bi_decl(bi_program_feature_group_with_flags(BINARY_INFO_TAG_MICROPYTHON,
     BI_NAMED_GROUP_SEPARATE_COMMAS | BI_NAMED_GROUP_SORT_ALPHA));
 
 int main(int argc, char **argv) {
+    // This is a tickless port, interrupts should always trigger SEV.
+    SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
+
     #if MICROPY_HW_ENABLE_UART_REPL
     bi_decl(bi_program_feature("UART REPL"))
     setup_default_uart();