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authorAndrew Leech <andrew.leech@planetinnovation.com.au>2018-07-18 07:14:19 +1000
committerDamien George <damien.p.george@gmail.com>2018-07-23 23:16:32 +1000
commit434975defac12125e550d42eb71d5454e0386d51 (patch)
treeb3a60867733cf2047251afb40c4906f8449bd319
parent968fa47392de2f84a968760f73df4e8e850ce578 (diff)
stm32/boards/STM32F429DISC: Enable onboard SDRAM.
-rw-r--r--ports/stm32/boards/STM32F429DISC/mpconfigboard.h63
-rw-r--r--ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h2
2 files changed, 64 insertions, 1 deletions
diff --git a/ports/stm32/boards/STM32F429DISC/mpconfigboard.h b/ports/stm32/boards/STM32F429DISC/mpconfigboard.h
index be25d2e77..2ef560975 100644
--- a/ports/stm32/boards/STM32F429DISC/mpconfigboard.h
+++ b/ports/stm32/boards/STM32F429DISC/mpconfigboard.h
@@ -72,3 +72,66 @@
#define MICROPY_HW_USB_HS_IN_FS (1)
#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_B13)
#define MICROPY_HW_USB_OTG_ID_PIN (pin_B12)
+
+// SDRAM
+#define MICROPY_HW_SDRAM_SIZE (64 / 8 * 1024 * 1024) // 64 Mbit
+#define MICROPY_HW_SDRAM_STARTUP_TEST (1)
+
+// Timing configuration for 90 Mhz (11.90ns) of SD clock frequency (180Mhz/2)
+#define MICROPY_HW_SDRAM_TIMING_TMRD (2)
+#define MICROPY_HW_SDRAM_TIMING_TXSR (7)
+#define MICROPY_HW_SDRAM_TIMING_TRAS (4)
+#define MICROPY_HW_SDRAM_TIMING_TRC (7)
+#define MICROPY_HW_SDRAM_TIMING_TWR (2)
+#define MICROPY_HW_SDRAM_TIMING_TRP (2)
+#define MICROPY_HW_SDRAM_TIMING_TRCD (2)
+#define MICROPY_HW_SDRAM_REFRESH_RATE (64) // ms
+
+#define MICROPY_HW_SDRAM_CAS_LATENCY 3
+#define MICROPY_HW_SDRAM_COLUMN_BITS_NUM 8
+#define MICROPY_HW_SDRAM_ROW_BITS_NUM 12
+#define MICROPY_HW_SDRAM_MEM_BUS_WIDTH 16
+#define MICROPY_HW_SDRAM_INTERN_BANKS_NUM 4
+#define MICROPY_HW_SDRAM_CLOCK_PERIOD 2
+#define MICROPY_HW_SDRAM_RPIPE_DELAY 1
+#define MICROPY_HW_SDRAM_RBURST (0)
+#define MICROPY_HW_SDRAM_WRITE_PROTECTION (0)
+
+#define MICROPY_HW_FMC_SDCKE1 (pin_B5)
+#define MICROPY_HW_FMC_SDNE1 (pin_B6)
+#define MICROPY_HW_FMC_SDCLK (pin_G8)
+#define MICROPY_HW_FMC_SDNCAS (pin_G15)
+#define MICROPY_HW_FMC_SDNRAS (pin_F11)
+#define MICROPY_HW_FMC_SDNWE (pin_C0)
+#define MICROPY_HW_FMC_BA0 (pin_G4)
+#define MICROPY_HW_FMC_BA1 (pin_G5)
+#define MICROPY_HW_FMC_NBL0 (pin_E0)
+#define MICROPY_HW_FMC_NBL1 (pin_E1)
+#define MICROPY_HW_FMC_A0 (pin_F0)
+#define MICROPY_HW_FMC_A1 (pin_F1)
+#define MICROPY_HW_FMC_A2 (pin_F2)
+#define MICROPY_HW_FMC_A3 (pin_F3)
+#define MICROPY_HW_FMC_A4 (pin_F4)
+#define MICROPY_HW_FMC_A5 (pin_F5)
+#define MICROPY_HW_FMC_A6 (pin_F12)
+#define MICROPY_HW_FMC_A7 (pin_F13)
+#define MICROPY_HW_FMC_A8 (pin_F14)
+#define MICROPY_HW_FMC_A9 (pin_F15)
+#define MICROPY_HW_FMC_A10 (pin_G0)
+#define MICROPY_HW_FMC_A11 (pin_G1)
+#define MICROPY_HW_FMC_D0 (pin_D14)
+#define MICROPY_HW_FMC_D1 (pin_D15)
+#define MICROPY_HW_FMC_D2 (pin_D0)
+#define MICROPY_HW_FMC_D3 (pin_D1)
+#define MICROPY_HW_FMC_D4 (pin_E7)
+#define MICROPY_HW_FMC_D5 (pin_E8)
+#define MICROPY_HW_FMC_D6 (pin_E9)
+#define MICROPY_HW_FMC_D7 (pin_E10)
+#define MICROPY_HW_FMC_D8 (pin_E11)
+#define MICROPY_HW_FMC_D9 (pin_E12)
+#define MICROPY_HW_FMC_D10 (pin_E13)
+#define MICROPY_HW_FMC_D11 (pin_E14)
+#define MICROPY_HW_FMC_D12 (pin_E15)
+#define MICROPY_HW_FMC_D13 (pin_D8)
+#define MICROPY_HW_FMC_D14 (pin_D9)
+#define MICROPY_HW_FMC_D15 (pin_D10)
diff --git a/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h b/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h
index 5b5a8a3e4..ec70793c8 100644
--- a/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h
+++ b/ports/stm32/boards/STM32F429DISC/stm32f4xx_hal_conf.h
@@ -65,7 +65,7 @@
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
-/* #define HAL_SDRAM_MODULE_ENABLED */
+#define HAL_SDRAM_MODULE_ENABLED
/* #define HAL_HASH_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED