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authorrobert-hh <robert@hammelrath.com>2022-02-02 08:52:37 +0100
committerDamien George <damien@micropython.org>2022-03-08 23:08:30 +1100
commit5cc50b9f1cdc2991008bedec6e012c3ec877999a (patch)
tree644d5707295236e2f5f8e8b833664c3cac428343
parent62cb2069bb107f32efedcd59481de6373c854db1 (diff)
mimxrt/machine_spi: Add omitted GPIO config.
The method was changed, but not for the CSx pins. No functional change.
-rw-r--r--ports/mimxrt/machine_spi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/ports/mimxrt/machine_spi.c b/ports/mimxrt/machine_spi.c
index 0332d9a9e..e25e219c7 100644
--- a/ports/mimxrt/machine_spi.c
+++ b/ports/mimxrt/machine_spi.c
@@ -93,11 +93,11 @@ bool lpspi_set_iomux(int8_t spi, uint8_t drive, uint8_t cs) {
if (cs == 0 && CS0.muxRegister != 0) {
IOMUXC_SetPinMux(CS0.muxRegister, CS0.muxMode, CS0.inputRegister, CS0.inputDaisy, CS0.configRegister, 0U);
IOMUXC_SetPinConfig(CS0.muxRegister, CS0.muxMode, CS0.inputRegister, CS0.inputDaisy, CS0.configRegister,
- 0x1080u | drive << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT);
+ pin_generate_config(PIN_PULL_UP_100K, PIN_MODE_OUT, drive, CS0.configRegister));
} else if (cs == 1 && CS1.muxRegister != 0) {
IOMUXC_SetPinMux(CS1.muxRegister, CS1.muxMode, CS1.inputRegister, CS1.inputDaisy, CS1.configRegister, 0U);
IOMUXC_SetPinConfig(CS1.muxRegister, CS1.muxMode, CS1.inputRegister, CS1.inputDaisy, CS1.configRegister,
- 0x1080u | drive << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT);
+ pin_generate_config(PIN_PULL_UP_100K, PIN_MODE_OUT, drive, CS1.configRegister));
} else {
mp_raise_ValueError(MP_ERROR_TEXT("The chosen CS is not available"));
}