alif: Support more fine-grained pin alternate function selection.

Now raises an exception if the pin doesn't support the alternate function
unit number and line type, eg UART0_TX (previously it only checked the
peripheral).

Signed-off-by: Damien George <damien@micropython.org>

8 files changed, 371 insertions, 185 deletions

diff --git a/ports/alif/cyw43_port_spi.c b/ports/alif/cyw43_port_spi.c
index 84d84b0e1..6ebcaa057 100644
--- a/ports/alif/cyw43_port_spi.c
+++ b/ports/alif/cyw43_port_spi.c
@@ -34,6 +34,7 @@
 #include "sys_ctrl_spi.h"
 
 // CYW43 is connected to SPI3.
+#define HW_SPI_UNIT (3)
 #define HW_SPI ((SPI_Type *)SPI3_BASE)
 #define SPI_BAUDRATE (16000000)
 #define SPI_RX_FIFO_SIZE (16)
@@ -56,9 +57,12 @@ static void spi_bus_init(void) {
     mp_hal_pin_output(pin_WL_CS);
     mp_hal_pin_high(pin_WL_CS);
     // NOTE: Alif recommends enabled input read for all SPI pins.
-    mp_hal_pin_config(pin_WL_SCLK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
-    mp_hal_pin_config(pin_WL_MOSI, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
-    mp_hal_pin_config(pin_WL_MISO, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
+    mp_hal_pin_config(pin_WL_SCLK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(SPI_SCLK, HW_SPI_UNIT), true);
+    mp_hal_pin_config(pin_WL_MOSI, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(SPI_MOSI, HW_SPI_UNIT), true);
+    mp_hal_pin_config(pin_WL_MISO, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(SPI_MISO, HW_SPI_UNIT), true);
 
     // Starts out clock_polarity=1, clock_phase=0.
     spi_mode_master(HW_SPI);
diff --git a/ports/alif/machine_i2c.c b/ports/alif/machine_i2c.c
index f117b93c2..a710aeeb0 100644
--- a/ports/alif/machine_i2c.c
+++ b/ports/alif/machine_i2c.c
@@ -135,9 +135,9 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n
 
     // Configure I2C pins.
     mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
-        MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_I2C, true);
+        MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SCL, self->i2c_id), true);
     mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
-        MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_I2C, true);
+        MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SDA, self->i2c_id), true);
 
     // Initialize I2C controller.
     self->i2c->I2C_CON = I2C_IC_CON_ENABLE_MASTER_MODE |
@@ -244,18 +244,18 @@ int machine_i2c_transfer(mp_obj_base_t *self_in, uint16_t addr, size_t n, mp_mac
 
         // Switch pins to GPIO/OD.
         mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_UP,
-            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_NONE, true);
+            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, 0, true);
         mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_OPEN_DRAIN, MP_HAL_PIN_PULL_UP,
-            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_NONE, true);
+            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, 0, true);
 
         // Perform the transfer.
         ret = mp_machine_soft_i2c_transfer(&soft_i2c.base, addr, 1, &bufs, flags);
 
         // Re-configure I2C pins.
         mp_hal_pin_config(self->scl, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
-            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_I2C, true);
+            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SCL, self->i2c_id), true);
         mp_hal_pin_config(self->sda, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
-            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_I2C, true);
+            MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(I2C_SDA, self->i2c_id), true);
 
         return ret;
     }
diff --git a/ports/alif/machine_spi.c b/ports/alif/machine_spi.c
index d13c6368f..abb60bc4e 100644
--- a/ports/alif/machine_spi.c
+++ b/ports/alif/machine_spi.c
@@ -60,6 +60,20 @@ static machine_spi_obj_t machine_spi_obj[] = {
 
 };
 
+static const uint8_t spi_pin_alt[] = {
+    MP_HAL_PIN_ALT_SPI_SCLK,
+    MP_HAL_PIN_ALT_SPI_MISO,
+    MP_HAL_PIN_ALT_SPI_MOSI,
+    MP_HAL_PIN_ALT_SPI_SS0,
+};
+
+static const uint8_t lpspi_pin_alt[] = {
+    MP_HAL_PIN_ALT_LPSPI_SCLK,
+    MP_HAL_PIN_ALT_LPSPI_MISO,
+    MP_HAL_PIN_ALT_LPSPI_MOSI,
+    MP_HAL_PIN_ALT_LPSPI_SS,
+};
+
 static inline uint32_t spi_get_clk(machine_spi_obj_t *spi) {
     return spi->is_lp ? GetSystemCoreClock() : GetSystemAHBClock();
 }
@@ -131,9 +145,15 @@ static void spi_init(machine_spi_obj_t *spi, uint32_t baudrate,
     }
 
     // Configure SPI pins.
+    const uint8_t *alt;
+    if (spi->id <= 3) {
+        alt = spi_pin_alt;
+    } else {
+        alt = lpspi_pin_alt;
+    }
     for (size_t i = 0; i < MP_ARRAY_SIZE(pins) && pins[i]; i++) {
         mp_hal_pin_config(pins[i], MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_MAKE(alt[i], spi->id), true);
     }
 
     // Disable all interrupts.
diff --git a/ports/alif/mcu/ensemble_pin_alt.csv b/ports/alif/mcu/ensemble_pin_alt.csv
index 10bfedc9a..34f13e86f 100644
--- a/ports/alif/mcu/ensemble_pin_alt.csv
+++ b/ports/alif/mcu/ensemble_pin_alt.csv
@@ -1,130 +1,130 @@
 Pin,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7
-P0_0,,OSPI,UART,I3C,UT,LPCAM,CAM,ANA
-P0_1,,OSPI,UART,I3C,UT,LPCAM,CAM,ANA
-P0_2,,OSPI,UART,I2C,UT,LPCAM,CAM,ANA
-P0_3,,OSPI,UART,I2C,UT,LPCAM,CAM,ANA
-P0_4,,OSPI,UART,PDM,I2C,UT,,ANA
-P0_5,,OSPI,UART,PDM,I2C,UT,,ANA
-P0_6,,OSPI,UART,PDM,I2C,UT,,ANA
-P0_7,,OSPI,UART,PDM,I2C,UT,CDC,ANA
-P1_0,,UART,SPI,I2C,UT,LPCAM,ETH,ANA
-P1_1,,UART,SPI,I2C,UT,LPCAM,ETH,ANA
-P1_2,,UART,SPI,I3C,UT,LPCAM,ETH,ANA
-P1_3,,UART,SPI,I3C,UT,LPCAM,ETH,ANA
-P1_4,,OSPI,UART,SPI,UT,LPCAM,ETH,ANA
-P1_5,,OSPI,UART,SPI,UT,LPCAM,ETH,ANA
-P1_6,,OSPI,UART,I2S,UT,LPCAM,ETH,ANA
-P1_7,,OSPI,UART,I2S,UT,LPCAM,ETH,ANA
-P2_0,,OSPI,UART,LPPDM,UT,LPCAM,ETH,ANA
-P2_1,,OSPI,UART,LPPDM,UT,LPCAM,ETH,ANA
-P2_2,,OSPI,UART,LPPDM,UT,LPCAM,ETH,ANA
-P2_3,,OSPI,UART,LPPDM,UT,LPCAM,CDC,ANA
-P2_4,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
-P2_5,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
-P2_6,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
-P2_7,,OSPI,LPI2S,SPI,UT,LPCAM,CAM,ANA
-P3_0,,OSPI,UART,PDM,I2S,QEC,LPCAM,CAM
-P3_1,,OSPI,UART,PDM,I2S,QEC,LPCAM,CAM
-P3_2,,OSPI,PDM,I2S,I3C,QEC,LPCAM,CAM
-P3_3,,OSPI,PDM,I2S,I3C,QEC,LPCAM,CAM
-P3_4,,OSPI,UART,LPPDM,I2S,I2C,QEC,CAM
-P3_5,,OSPI,UART,LPPDM,SPI,I2C,QEC,CAM
-P3_6,,HFXO,LPUART,LPPDM,SPI,I2C,QEC,CAM
-P3_7,,JTAG,LPUART,LPPDM,SPI,I2C,QEC,CAM
-P4_0,,JTAG,,I2S,SPI,QEC,CDC,CAM
-P4_1,,JTAG,I2S,SPI,QEC,SD,CDC,CAM
-P4_2,,JTAG,,I2S,SPI,QEC,SD,CAM
-P4_3,,JTAG,,I2S,SPI,QEC,SD,CAM
-P4_4,,JTAG,I2S,SPI,FAULT,,,
-P4_5,,JTAG,SPI,FAULT,,,,
-P4_6,,JTAG,SPI,FAULT,,,,
-P4_7,,JTAG,SPI,FAULT,,,,
-P5_0,,OSPI,UART,PDM,SPI,I2C,UT,SD
-P5_1,,OSPI,UART,PDM,SPI,I2C,UT,SD
-P5_2,,OSPI,UART,PDM,SPI,LPI2C,UT,SD
-P5_3,,OSPI,UART,SPI,LPI2C,UT,SD,CDC
-P5_4,,OSPI,UART,PDM,SPI,UT,SD,CDC
-P5_5,,OSPI,UART,PDM,UT,SD,ETH,CDC
-# P5_6 doesn't really have OSPI on AF1 but it's needed for P10_7 to be in OSPI mode
-P5_6,,OSPI,UART,I2C,UT,SD,ETH,CDC
-P5_7,,OSPI,UART,I2C,UT,SD,ETH,
-P6_0,,OSPI,UART,PDM,UT,SD,ETH,
-P6_1,,OSPI,UART,PDM,UT,SD,ETH,
-P6_2,,OSPI,UART,,PDM,UT,SD,ETH
-P6_3,,OSPI,UART,,PDM,UT,SD,ETH
-P6_4,,OSPI,UART,,SPI,UT,SD,ETH
-P6_5,,OSPI,UART,,SPI,UT,SD,ETH
-P6_6,,OSPI,UART,,SPI,UT,SD,ETH
-P6_7,,OSPI,UART,PDM,SPI,UT,SD,ETH
-P7_0,,,CMP,SPI,I2C,UT,SD,
-P7_1,,,CMP,SPI,I2C,UT,SD,
-P7_2,,,UART,CMP,SPI,I2C,UT,SD
-P7_3,,,UART,CMP,SPI,I2C,UT,
-P7_4,,,LPUART,LPPDM,LPSPI,LPI2C,UT,
-P7_5,,,LPUART,,LPPDM,LPSPI,LPI2C,UT
-P7_6,,,LPUART,,LPPDM,LPSPI,I3C,UT
-P7_7,,,LPUART,,LPPDM,LPSPI,I3C,UT
-P8_0,,OSPI,AUDIO,FAULT,LPCAM,SD,CDC,CAM
-P8_1,,I2S,FAULT,LPCAM,SD,CDC,CAM,
-P8_2,,I2S,SPI,FAULT,LPCAM,SD,CDC,CAM
-P8_3,,I2S,SPI,FAULT,LPCAM,SD,CDC,CAM
-P8_4,,I2S,SPI,QEC,LPCAM,SD,CDC,CAM
-P8_5,,,SPI,QEC,LPCAM,SD,CDC,CAM
-P8_6,,,I2S,QEC,LPCAM,SD,CDC,CAM
-P8_7,,,I2S,QEC,LPCAM,SD,CDC,CAM
-P9_0,,,I2S,QEC,SD,CDC,CAM,
-P9_1,,LPUART,I2S,QEC,SD,CDC,CAM,
-P9_2,,LPUART,I2S,SPI,QEC,SD,CDC,CAM
-P9_3,,HFXO,UART,I2S,SPI,QEC,CDC,CAM
-P9_4,,UART,I2S,SPI,I2C,QEC,CDC,CAM
-P9_5,,OSPI,I2S,SPI,I2C,QEC,CDC,CAM
-P9_6,,OSPI,AUDIO,SPI,I2C,QEC,CDC,CAM
-P9_7,,OSPI,UART,SPI,I2C,QEC,CDC,CAM
-P10_0,,OSPI,UART,SPI,UT,LPCAM,CDC,CAM
-P10_1,,OSPI,,LPI2S,UT,LPCAM,CDC,CAM
-P10_2,,OSPI,,LPI2S,UT,LPCAM,CDC,CAM
-P10_3,,OSPI,,LPI2S,UT,LPCAM,CDC,CAM
-P10_4,,OSPI,,LPI2S,I2C,UT,ETH,CDC
-P10_5,,UART,I2S,SPI,I2C,UT,ETH,CDC
-P10_6,,UART,I2S,SPI,I2C,UT,ETH,CDC
-P10_7,,UART,I2S,SPI,I2C,UT,CDC,OSPI
-P11_0,,OSPI,UART,I2S,SPI,UT,ETH,CDC
-P11_1,,OSPI,UART,SPI,UT,ETH,CDC,
-P11_2,,OSPI,UART,LPPDM,SPI,UT,ETH,CDC
-P11_3,,OSPI,UART,LPPDM,SPI,UT,ETH,CDC
-P11_4,,OSPI,UART,PDM,LPSPI,UT,ETH,CDC
-P11_5,,OSPI,UART,PDM,LPSPI,UT,ETH,CDC
-P11_6,,OSPI,UART,LPPDM,LPSPI,UT,ETH,CDC
-P11_7,,OSPI,UART,LPPDM,LPSPI,UT,ETH,CDC
-P12_0,,OSPI,AUDIO,I2S,UT,CDC,,
-P12_1,,OSPI,UART,I2S,UT,CDC,,
-P12_2,,OSPI,UART,I2S,UT,CDC,,
-P12_3,,OSPI,UART,I2S,UT,CDC,,
-P12_4,,OSPI,SPI,UT,,CDC,,
-P12_5,,,SPI,UT,,CDC,,
-P12_6,,,SPI,UT,,CDC,,
-P12_7,,OSPI,,SPI,UT,CDC,,
-P13_0,,OSPI,,SPI,QEC,SD,CDC,
-P13_1,,OSPI,SPI,QEC,SD,CDC,,
-P13_2,,OSPI,SPI,QEC,SD,CDC,,
-P13_3,,OSPI,SPI,QEC,SD,CDC,,
-P13_4,,OSPI,LPI2S,QEC,SD,CDC,,
-P13_5,,OSPI,LPI2S,QEC,SD,CDC,,
-P13_6,,OSPI,LPI2S,QEC,SD,CDC,,
-P13_7,,OSPI,LPI2S,QEC,SD,CDC,,
-P14_0,,OSPI,UART,QEC,SD,,,
-P14_1,,OSPI,UART,,QEC,SD,,
-P14_2,,OSPI,UART,,QEC,SD,,
-P14_3,,OSPI,UART,,QEC,,,
-P14_4,,CMP,SPI,FAULT,,,,
-P14_5,,CMP,SPI,FAULT,,,,
-P14_6,,CMP,SPI,FAULT,,,,
-P14_7,,CMP,SPI,FAULT,,,,
-P15_0,,LPTMR,,,,,,
-P15_1,,LPTMR,,,,,,
-P15_2,,LPTMR,,,,,,
-P15_3,,LPTMR,,,,,,
-P15_4,,,,,,,,
-P15_5,,,,,,,,
-P15_6,,,,,,,,
-P15_7,,,,,,,,
+P0_0,GPIO,OSPI0_D0,UART0_RX,I3C_SDA,UT0_T0,LPCAM_HSYNC,CAM_HSYNC,ANA_S0
+P0_1,GPIO,OSPI0_D1,UART0_TX,I3C_SCL,UT0_T1,LPCAM_VSYNC,CAM_VSYNC,ANA_S1
+P0_2,GPIO,OSPI0_D2,UART0_CTS,I2C0_SDA,UT1_T0,LPCAM_PCLK,CAM_PCLK,ANA_S2
+P0_3,GPIO,OSPI0_D3,UART0_RTS,I2C0_SCL,UT1_T1,LPCAM_XVCLK,CAM_XVCLK,ANA_S3
+P0_4,GPIO,OSPI0_D4,UART1_RX,PDM_D0,I2C1_SDA,UT2_T0,,ANA_S4
+P0_5,GPIO,OSPI0_D5,UART1_TX,PDM_C0,I2C1_SCL,UT2_T1,,ANA_S5
+P0_6,GPIO,OSPI0_D6,UART1_CTS,PDM_D1,I2C2_SCL,UT3_T0,,ANA_S6
+P0_7,GPIO,OSPI0_D7,UART1_RTS,PDM_C1,I2C2_SDA,UT3_T1,CDC_DE,ANA_S7
+P1_0,GPIO,UART2_RX,SPI0_MISO,I2C3_SDA,UT4_T0,LPCAM_HSYNC,ETH_RXD0,ANA_S8
+P1_1,GPIO,UART2_TX,SPI0_MOSI,I2C3_SCL,UT4_T1,LPCAM_VSYNC,ETH_RXD1,ANA_S9
+P1_2,GPIO,UART3_RX,SPI0_SCLK,I3C_SDA,UT5_T0,LPCAM_PCLK,ETH_RST,ANA_S10
+P1_3,GPIO,UART3_TX,SPI0_SS0,I3C_SCL,UT5_T1,LPCAM_XVCLK,ETH_TXD0,ANA_S11
+P1_4,GPIO,OSPI0_SS0,UART0_RX,SPI0_SS1,UT6_T0,LPCAM_D0,ETH_TXD1,ANA_S12
+P1_5,GPIO,OSPI0_SS1,UART0_TX,SPI0_SS2,UT6_T1,LPCAM_D1,ETH_TXEN,ANA_S13
+P1_6,GPIO,OSPI0_RXDS,UART1_RX,I2S0_SDI,UT7_T0,LPCAM_D2,ETH_IRQ,ANA_S14
+P1_7,GPIO,OSPI0_SCLK,UART1_TX,I2S0_SDO,UT7_T1,LPCAM_D3,ETH_REFCLK,ANA_S15
+P2_0,GPIO,OSPI0_D0,UART2_RX,LPPDM_D0,UT8_T0,LPCAM_D4,ETH_MDIO,ANA_S16
+P2_1,GPIO,OSPI0_D1,UART2_TX,LPPDM_C0,UT8_T1,LPCAM_D5,ETH_MDC,ANA_S17
+P2_2,GPIO,OSPI0_D2,UART3_RX,LPPDM_D1,UT9_T0,LPCAM_D6,ETH_CRS_DV_C,ANA_S18
+P2_3,GPIO,OSPI0_D3,UART3_TX,LPPDM_C1,UT9_T1,LPCAM_D7,CDC_PCLK,ANA_S19
+P2_4,GPIO,OSPI0_D4,LPI2S_SDI,SPI1_MISO,UT10_T0,LPCAM_D0,CAM_D0,ANA_S20
+P2_5,GPIO,OSPI0_D5,LPI2S_SDO,SPI1_MOSI,UT10_T1,LPCAM_D1,CAM_D1,ANA_S21
+P2_6,GPIO,OSPI0_D6,LPI2S_SCLK,SPI1_SCLK,UT11_T0,LPCAM_D2,CAM_D2,ANA_S22
+P2_7,GPIO,OSPI0_D7,LPI2S_WS,SPI1_SS0,UT11_T1,LPCAM_D3,CAM_D3,ANA_S23
+P3_0,GPIO,OSPI0_SCLK,UART4_RX,PDM_D0,I2S0_SCLK,QEC0_X,LPCAM_D4,CAM_D4
+P3_1,GPIO,OSPI0_SCLKN,UART4_TX,PDM_C0,I2S0_WS,QEC0_Y,LPCAM_D5,CAM_D5
+P3_2,GPIO,OSPI0_SS0,PDM_D1,I2S1_SDI,I3C_SDA,QEC0_Z,LPCAM_D6,CAM_D6
+P3_3,GPIO,OSPI0_SS1,PDM_C1,I2S1_SDO,I3C_SCL,QEC1_X,LPCAM_D7,CAM_D7
+P3_4,GPIO,OSPI0_RXDS,UART5_RX,LPPDM_C0,I2S1_SCLK,I2C0_SCL,QEC1_Y,CAM_D8
+P3_5,GPIO,OSPI0_SCLKN,UART5_TX,LPPDM_D0,SPI0_SS1,I2C0_SDA,QEC1_Z,CAM_D9
+P3_6,GPIO,HFXO_OUT,LPUART_CTS,LPPDM_C1,SPI0_SS2,I2C1_SDA,QEC2_X,CAM_D10
+P3_7,GPIO,JTAG_TRACECLK,LPUART_RTS,LPPDM_D1,SPI1_SS1,I2C1_SCL,QEC2_Y,CAM_D11
+P4_0,GPIO,JTAG_TDATA0,,I2S1_WS,SPI1_SS2,QEC2_Z,CDC_VSYNC,CAM_D12
+P4_1,GPIO,JTAG_TDATA1,I2S0_SDI,SPI1_SS3,QEC3_X,SD_CLK,CDC_HSYNC,CAM_D13
+P4_2,GPIO,JTAG_TDATA2,,I2S0_SDO,SPI2_MISO,QEC3_Y,SD_CMD,CAM_D14
+P4_3,GPIO,JTAG_TDATA3,,I2S0_SCLK,SPI2_MOSI,QEC3_Z,SD_RST,CAM_D15
+P4_4,GPIO,JTAG_TCK,I2S0_WS,SPI2_SCLK,FAULT0_A,,,
+P4_5,GPIO,JTAG_TMS,SPI2_SS0,FAULT1_A,,,,
+P4_6,GPIO,JTAG_TDI,SPI2_SS1,FAULT2_A,,,,
+P4_7,GPIO,JTAG_TDO,SPI2_SS2,FAULT3_A,,,,
+P5_0,GPIO,OSPI1_RXDS,UART4_RX,PDM_D2,SPI0_MISO,I2C2_SDA,UT0_T0,SD_D0
+P5_1,GPIO,OSPI1_SS0,UART4_TX,PDM_D3,SPI0_MOSI,I2C2_SCL,UT0_T1,SD_D1
+P5_2,GPIO,OSPI1_SCLKN,UART5_RX,PDM_C3,SPI0_SS0,LPI2C_SCL,UT1_T0,SD_D2
+P5_3,GPIO,OSPI1_SCLK,UART5_TX,SPI0_SCLK,LPI2C_SDA,UT1_T1,SD_D3,CDC_PCLK
+P5_4,GPIO,OSPI1_SS1,UART3_CTS,PDM_D2,SPI0_SS3,UT2_T0,SD_D4,CDC_DE
+P5_5,GPIO,OSPI1_SCLK,UART3_RTS,PDM_D3,UT2_T1,SD_D5,ETH_RXD0,CDC_HSYNC
+# P5_6 doesn't really have OSPI on AF1 but it's needed for P10_7 to be in OSPI1_RXDS mode
+P5_6,GPIO,OSPI1_RXDS,UART1_CTS,I2C2_SCL,UT3_T0,SD_D6,ETH_RXD1,CDC_VSYNC
+P5_7,GPIO,OSPI1_SS0,UART1_RTS,I2C2_SDA,UT3_T1,SD_D7,ETH_RST,
+P6_0,GPIO,OSPI0_D0,UART4_DE,PDM_D0,UT4_T0,SD_D0,ETH_TXD0,
+P6_1,GPIO,OSPI0_D1,UART5_DE,PDM_C0,UT4_T1,SD_D1,ETH_TXD1,
+P6_2,GPIO,OSPI0_D2,UART2_CTS,,PDM_D1,UT5_T0,SD_D2,ETH_TXEN
+P6_3,GPIO,OSPI0_D3,UART2_RTS,,PDM_C1,UT5_T1,SD_D3,ETH_IRQ
+P6_4,GPIO,OSPI0_D4,UART2_CTS,,SPI1_SS0,UT6_T0,SD_D4,ETH_REFCLK
+P6_5,GPIO,OSPI0_D5,UART2_RTS,,SPI1_SS1,UT6_T1,SD_D5,ETH_MDIO
+P6_6,GPIO,OSPI0_D6,UART0_CTS,,SPI1_SS2,UT7_T0,SD_D6,ETH_MDC
+P6_7,GPIO,OSPI0_D7,UART0_RTS,PDM_C2,SPI1_SS3,UT7_T1,SD_D7,ETH_CRS_DV_A
+P7_0,GPIO,,CMP3_OUT,SPI0_MISO,I2C0_SDA,UT8_T0,SD_CMD,
+P7_1,GPIO,,CMP2_OUT,SPI0_MOSI,I2C0_SCL,UT8_T1,SD_CLK,
+P7_2,GPIO,,UART3_CTS,CMP1_OUT,SPI0_SCLK,I2C1_SDA,UT9_T0,SD_RST
+P7_3,GPIO,,UART3_RTS,CMP0_OUT,SPI0_SS0,I2C1_SCL,UT9_T1,
+P7_4,GPIO,,LPUART_CTS,LPPDM_C2,LPSPI_MISO,LPI2C_SCL,UT10_T0,
+P7_5,GPIO,,LPUART_RTS,,LPPDM_D2,LPSPI_MOSI,LPI2C_SDA,UT10_T1
+P7_6,GPIO,,LPUART_RX,,LPPDM_C3,LPSPI_SCLK,I3C_SDA,UT11_T0
+P7_7,GPIO,,LPUART_TX,,LPPDM_D3,LPSPI_SS,I3C_SCL,UT11_T1
+P8_0,GPIO,OSPI1_SCLKN,AUDIO_CLK,FAULT0_B,LPCAM_D0,SD_D0,CDC_D0,CAM_D0
+P8_1,GPIO,I2S2_SDI,FAULT1_B,LPCAM_D1,SD_D1,CDC_D1,CAM_D1,
+P8_2,GPIO,I2S2_SDO,SPI0_SS3,FAULT2_B,LPCAM_D2,SD_D2,CDC_D2,CAM_D2
+P8_3,GPIO,I2S2_SCLK,SPI1_MISO,FAULT3_B,LPCAM_D3,SD_D3,CDC_D3,CAM_D3
+P8_4,GPIO,I2S2_WS,SPI1_MOSI,QEC0_X,LPCAM_D4,SD_D4,CDC_D4,CAM_D4
+P8_5,GPIO,,SPI1_SCLK,QEC0_Y,LPCAM_D5,SD_D5,CDC_D5,CAM_D5
+P8_6,GPIO,,I2S3_SCLK,QEC0_Z,LPCAM_D6,SD_D6,CDC_D6,CAM_D6
+P8_7,GPIO,,I2S3_WS,QEC1_X,LPCAM_D7,SD_D7,CDC_D7,CAM_D7
+P9_0,GPIO,,I2S3_SDI,QEC1_Y,SD_CMD,CDC_D8,CAM_D8,
+P9_1,GPIO,LPUART_RX,I2S3_SDO,QEC1_Z,SD_CLK,CDC_D9,CAM_D9,
+P9_2,GPIO,LPUART_TX,I2S3_SDI,SPI2_MISO,QEC2_X,SD_RST,CDC_D10,CAM_D10
+P9_3,GPIO,HFXO_OUT,UART7_RX,I2S3_SDO,SPI2_MOSI,QEC2_Y,CDC_D11,CAM_D11
+P9_4,GPIO,UART7_TX,I2S3_SCLK,SPI2_SCLK,I2C3_SDA,QEC2_Z,CDC_D12,CAM_D12
+P9_5,GPIO,OSPI1_D0,I2S3_WS,SPI2_SS0,I2C3_SCL,QEC3_X,CDC_D13,CAM_D13
+P9_6,GPIO,OSPI1_D1,AUDIO_CLK,SPI2_SS1,I2C3_SDA,QEC3_Y,CDC_D14,CAM_D14
+P9_7,GPIO,OSPI1_D2,UART7_DE,SPI2_SS2,I2C3_SCL,QEC3_Z,CDC_D15,CAM_D15
+P10_0,GPIO,OSPI1_D3,UART6_DE,SPI2_SS3,UT0_T0,LPCAM_HSYNC,CDC_D16,CAM_HSYNC
+P10_1,GPIO,OSPI1_D4,,LPI2S_SDI,UT0_T1,LPCAM_VSYNC,CDC_D17,CAM_VSYNC
+P10_2,GPIO,OSPI1_D5,,LPI2S_SDO,UT1_T0,LPCAM_PCLK,CDC_D18,CAM_PCLK
+P10_3,GPIO,OSPI1_D6,,LPI2S_SCLK,UT1_T1,LPCAM_XVCLK,CDC_D19,CAM_XVCLK
+P10_4,GPIO,OSPI1_D7,,LPI2S_WS,I2C0_SDA,UT2_T0,ETH_TXD0,CDC_D20
+P10_5,GPIO,UART6_RX,I2S2_SDI,SPI3_MISO,I2C0_SCL,UT2_T1,ETH_TXD1,CDC_D21
+P10_6,GPIO,UART6_TX,I2S2_SDO,SPI3_MOSI,I2C1_SDA,UT3_T0,ETH_TXEN,CDC_D22
+P10_7,GPIO,UART7_RX,I2S2_SCLK,SPI3_SCLK,I2C1_SCL,UT3_T1,CDC_D23,OSPI1_RXDS
+P11_0,GPIO,OSPI1_D0,UART7_TX,I2S2_WS,SPI3_SS0,UT4_T0,ETH_REFCLK,CDC_D0
+P11_1,GPIO,OSPI1_D1,UART7_DE,SPI3_SS1,UT4_T1,ETH_MDIO,CDC_D1,
+P11_2,GPIO,OSPI1_D2,UART6_DE,LPPDM_C2,SPI3_SS2,UT5_T0,ETH_MDC,CDC_D2
+P11_3,GPIO,OSPI1_D3,UART5_RX,LPPDM_C3,SPI3_SS3,UT5_T1,ETH_RXD0,CDC_D3
+P11_4,GPIO,OSPI1_D4,UART5_TX,PDM_C2,LPSPI_MISO,UT6_T0,ETH_RXD1,CDC_D4
+P11_5,GPIO,OSPI1_D5,UART6_RX,PDM_C3,LPSPI_MOSI,UT6_T1,ETH_CRS_DV_B,CDC_D5
+P11_6,GPIO,OSPI1_D6,UART6_TX,LPPDM_D2,LPSPI_SCLK,UT7_T0,ETH_RST,CDC_D6
+P11_7,GPIO,OSPI1_D7,UART5_DE,LPPDM_D3,LPSPI_SS,UT7_T1,ETH_IRQ,CDC_D7
+P12_0,GPIO,OSPI0_SCLK,AUDIO_CLK,I2S1_SDI,UT8_T0,CDC_D8,,
+P12_1,GPIO,OSPI0_SCLKN,UART4_RX,I2S1_SDO,UT8_T1,CDC_D9,,
+P12_2,GPIO,OSPI0_RXDS,UART4_TX,I2S1_SCLK,UT9_T0,CDC_D10,,
+P12_3,GPIO,OSPI0_SS0,UART4_DE,I2S1_WS,UT9_T1,CDC_D11,,
+P12_4,GPIO,OSPI0_SS1,SPI3_MISO,UT10_T0,,CDC_D12,,
+P12_5,GPIO,,SPI3_MOSI,UT10_T1,,CDC_D13,,
+P12_6,GPIO,,SPI3_SCLK,UT11_T0,,CDC_D14,,
+P12_7,GPIO,OSPI1_RXDS,,SPI3_SS0,UT11_T1,CDC_D15,,
+P13_0,GPIO,OSPI1_D0,,SPI3_SS1,QEC0_X,SD_D0,CDC_D16,
+P13_1,GPIO,OSPI1_D1,SPI3_SS2,QEC0_Y,SD_D1,CDC_D17,,
+P13_2,GPIO,OSPI1_D2,SPI3_SS3,QEC0_Z,SD_D2,CDC_D18,,
+P13_3,GPIO,OSPI1_D3,SPI2_SS3,QEC1_X,SD_D3,CDC_D19,,
+P13_4,GPIO,OSPI1_D4,LPI2S_SDI,QEC1_Y,SD_D4,CDC_D20,,
+P13_5,GPIO,OSPI1_D5,LPI2S_SDO,QEC1_Z,SD_D5,CDC_D21,,
+P13_6,GPIO,OSPI1_D6,LPI2S_SCLK,QEC2_X,SD_D6,CDC_D22,,
+P13_7,GPIO,OSPI1_D7,LPI2S_WS,QEC2_Y,SD_D7,CDC_D23,,
+P14_0,GPIO,OSPI1_SCLK,UART6_RX,QEC2_Z,SD_CMD,,,
+P14_1,GPIO,OSPI1_SCLKN,UART6_TX,,QEC3_X,SD_CLK,,
+P14_2,GPIO,OSPI1_SS0,UART7_RX,,QEC3_Y,SD_RST,,
+P14_3,GPIO,OSPI1_SS1,UART7_TX,,QEC3_Z,,,
+P14_4,GPIO,CMP3_OUT,SPI1_MISO,FAULT0_C,,,,
+P14_5,GPIO,CMP2_OUT,SPI1_MOSI,FAULT1_C,,,,
+P14_6,GPIO,CMP1_OUT,SPI1_SCLK,FAULT2_C,,,,
+P14_7,GPIO,CMP0_OUT,SPI1_SS0,FAULT3_C,,,,
+P15_0,GPIO,LPTMR0_CLK,,,,,,
+P15_1,GPIO,LPTMR1_CLK,,,,,,
+P15_2,GPIO,LPTMR2_CLK,,,,,,
+P15_3,GPIO,LPTMR3_CLK,,,,,,
+P15_4,GPIO,,,,,,,
+P15_5,GPIO,,,,,,,
+P15_6,GPIO,,,,,,,
+P15_7,GPIO,,,,,,,
diff --git a/ports/alif/mcu/make-pins.py b/ports/alif/mcu/make-pins.py
index fb0000826..3666953e6 100755
--- a/ports/alif/mcu/make-pins.py
+++ b/ports/alif/mcu/make-pins.py
@@ -36,11 +36,19 @@ ADC12_ANA_MAP = {
 class AlifPin(boardgen.Pin):
     def __init__(self, cpu_pin_name):
         super().__init__(cpu_pin_name)
-        self._afs = ["MP_HAL_PIN_ALT_NONE"] * 8
+        self._afs = [("NONE", -1)] * 8
 
     # Called for each AF defined in the csv file for this pin.
     def add_af(self, af_idx, af_name, af):
-        self._afs[af_idx] = f"MP_HAL_PIN_ALT_{af}"
+        if af == "GPIO":
+            self._afs[af_idx] = "GPIO", -1
+        elif af.startswith("ANA_S"):
+            self._afs[af_idx] = "ANA", int(af[5:])
+        else:
+            m = re.match(r"([A-Z0-9]+[A-Z])(\d*)_([A-Z0-9_]+)$", af)
+            periph, unit, line = m.groups()
+            unit = -1 if unit == "" else int(unit)
+            self._afs[af_idx] = f"{periph}_{line}", unit
 
     # Emit the struct which contains the pin instance.
     def definition(self):
@@ -63,7 +71,7 @@ class AlifPin(boardgen.Pin):
                 base=base,
                 adc12_periph=adc12_periph,
                 adc12_channel=adc12_channel,
-                alt=", ".join([f"{af}" for af in self._afs]),
+                alt=", ".join([f"MP_HAL_PIN_ALT({func}, {unit})" for func, unit in self._afs]),
             )
         )
 
diff --git a/ports/alif/mphalport.h b/ports/alif/mphalport.h
index 2ba62db2d..4f81439b5 100644
--- a/ports/alif/mphalport.h
+++ b/ports/alif/mphalport.h
@@ -92,34 +92,183 @@ extern ringbuf_t stdin_ringbuf;
 
 #define mp_hal_pin_obj_t const machine_pin_obj_t *
 
+#define MP_HAL_PIN_ALT(function, unit)          (MP_HAL_PIN_ALT_MAKE((MP_HAL_PIN_ALT_##function), (unit)))
+#define MP_HAL_PIN_ALT_MAKE(function, unit)     ((function) | ((unit) << 8))
+#define MP_HAL_PIN_ALT_GET_FUNC(alt)            ((alt) & 0xff)
+#define MP_HAL_PIN_ALT_GET_UNIT(alt)            ((alt) >> 8)
+
 enum {
     MP_HAL_PIN_ALT_NONE = 0,
+    MP_HAL_PIN_ALT_GPIO,
     MP_HAL_PIN_ALT_ANA,
-    MP_HAL_PIN_ALT_AUDIO,
-    MP_HAL_PIN_ALT_CAM,
-    MP_HAL_PIN_ALT_CDC,
-    MP_HAL_PIN_ALT_CMP,
-    MP_HAL_PIN_ALT_ETH,
-    MP_HAL_PIN_ALT_FAULT,
-    MP_HAL_PIN_ALT_HFXO,
-    MP_HAL_PIN_ALT_I2C,
-    MP_HAL_PIN_ALT_I2S,
-    MP_HAL_PIN_ALT_I3C,
-    MP_HAL_PIN_ALT_JTAG,
-    MP_HAL_PIN_ALT_LPCAM,
-    MP_HAL_PIN_ALT_LPI2C,
-    MP_HAL_PIN_ALT_LPI2S,
-    MP_HAL_PIN_ALT_LPPDM,
-    MP_HAL_PIN_ALT_LPSPI,
-    MP_HAL_PIN_ALT_LPTMR,
-    MP_HAL_PIN_ALT_LPUART,
-    MP_HAL_PIN_ALT_OSPI,
-    MP_HAL_PIN_ALT_PDM,
-    MP_HAL_PIN_ALT_QEC,
-    MP_HAL_PIN_ALT_SD,
-    MP_HAL_PIN_ALT_SPI,
-    MP_HAL_PIN_ALT_UART,
-    MP_HAL_PIN_ALT_UT,
+    MP_HAL_PIN_ALT_AUDIO_CLK,
+    MP_HAL_PIN_ALT_CAM_D0,
+    MP_HAL_PIN_ALT_CAM_D1,
+    MP_HAL_PIN_ALT_CAM_D2,
+    MP_HAL_PIN_ALT_CAM_D3,
+    MP_HAL_PIN_ALT_CAM_D4,
+    MP_HAL_PIN_ALT_CAM_D5,
+    MP_HAL_PIN_ALT_CAM_D6,
+    MP_HAL_PIN_ALT_CAM_D7,
+    MP_HAL_PIN_ALT_CAM_D8,
+    MP_HAL_PIN_ALT_CAM_D9,
+    MP_HAL_PIN_ALT_CAM_D10,
+    MP_HAL_PIN_ALT_CAM_D11,
+    MP_HAL_PIN_ALT_CAM_D12,
+    MP_HAL_PIN_ALT_CAM_D13,
+    MP_HAL_PIN_ALT_CAM_D14,
+    MP_HAL_PIN_ALT_CAM_D15,
+    MP_HAL_PIN_ALT_CAM_HSYNC,
+    MP_HAL_PIN_ALT_CAM_PCLK,
+    MP_HAL_PIN_ALT_CAM_VSYNC,
+    MP_HAL_PIN_ALT_CAM_XVCLK,
+    MP_HAL_PIN_ALT_CDC_D0,
+    MP_HAL_PIN_ALT_CDC_D1,
+    MP_HAL_PIN_ALT_CDC_D2,
+    MP_HAL_PIN_ALT_CDC_D3,
+    MP_HAL_PIN_ALT_CDC_D4,
+    MP_HAL_PIN_ALT_CDC_D5,
+    MP_HAL_PIN_ALT_CDC_D6,
+    MP_HAL_PIN_ALT_CDC_D7,
+    MP_HAL_PIN_ALT_CDC_D8,
+    MP_HAL_PIN_ALT_CDC_D9,
+    MP_HAL_PIN_ALT_CDC_D10,
+    MP_HAL_PIN_ALT_CDC_D11,
+    MP_HAL_PIN_ALT_CDC_D12,
+    MP_HAL_PIN_ALT_CDC_D13,
+    MP_HAL_PIN_ALT_CDC_D14,
+    MP_HAL_PIN_ALT_CDC_D15,
+    MP_HAL_PIN_ALT_CDC_D16,
+    MP_HAL_PIN_ALT_CDC_D17,
+    MP_HAL_PIN_ALT_CDC_D18,
+    MP_HAL_PIN_ALT_CDC_D19,
+    MP_HAL_PIN_ALT_CDC_D20,
+    MP_HAL_PIN_ALT_CDC_D21,
+    MP_HAL_PIN_ALT_CDC_D22,
+    MP_HAL_PIN_ALT_CDC_D23,
+    MP_HAL_PIN_ALT_CDC_DE,
+    MP_HAL_PIN_ALT_CDC_HSYNC,
+    MP_HAL_PIN_ALT_CDC_PCLK,
+    MP_HAL_PIN_ALT_CDC_VSYNC,
+    MP_HAL_PIN_ALT_CMP_OUT,
+    MP_HAL_PIN_ALT_ETH_CRS_DV_A,
+    MP_HAL_PIN_ALT_ETH_CRS_DV_B,
+    MP_HAL_PIN_ALT_ETH_CRS_DV_C,
+    MP_HAL_PIN_ALT_ETH_IRQ,
+    MP_HAL_PIN_ALT_ETH_MDC,
+    MP_HAL_PIN_ALT_ETH_MDIO,
+    MP_HAL_PIN_ALT_ETH_REFCLK,
+    MP_HAL_PIN_ALT_ETH_RST,
+    MP_HAL_PIN_ALT_ETH_RXD0,
+    MP_HAL_PIN_ALT_ETH_RXD1,
+    MP_HAL_PIN_ALT_ETH_TXD0,
+    MP_HAL_PIN_ALT_ETH_TXD1,
+    MP_HAL_PIN_ALT_ETH_TXEN,
+    MP_HAL_PIN_ALT_FAULT_A,
+    MP_HAL_PIN_ALT_FAULT_B,
+    MP_HAL_PIN_ALT_FAULT_C,
+    MP_HAL_PIN_ALT_HFXO_OUT,
+    MP_HAL_PIN_ALT_I2C_SCL,
+    MP_HAL_PIN_ALT_I2C_SDA,
+    MP_HAL_PIN_ALT_I2S_SCLK,
+    MP_HAL_PIN_ALT_I2S_SDI,
+    MP_HAL_PIN_ALT_I2S_SDO,
+    MP_HAL_PIN_ALT_I2S_WS,
+    MP_HAL_PIN_ALT_I3C_SCL,
+    MP_HAL_PIN_ALT_I3C_SDA,
+    MP_HAL_PIN_ALT_JTAG_TCK,
+    MP_HAL_PIN_ALT_JTAG_TDATA0,
+    MP_HAL_PIN_ALT_JTAG_TDATA1,
+    MP_HAL_PIN_ALT_JTAG_TDATA2,
+    MP_HAL_PIN_ALT_JTAG_TDATA3,
+    MP_HAL_PIN_ALT_JTAG_TDI,
+    MP_HAL_PIN_ALT_JTAG_TDO,
+    MP_HAL_PIN_ALT_JTAG_TMS,
+    MP_HAL_PIN_ALT_JTAG_TRACECLK,
+    MP_HAL_PIN_ALT_LPCAM_D0,
+    MP_HAL_PIN_ALT_LPCAM_D1,
+    MP_HAL_PIN_ALT_LPCAM_D2,
+    MP_HAL_PIN_ALT_LPCAM_D3,
+    MP_HAL_PIN_ALT_LPCAM_D4,
+    MP_HAL_PIN_ALT_LPCAM_D5,
+    MP_HAL_PIN_ALT_LPCAM_D6,
+    MP_HAL_PIN_ALT_LPCAM_D7,
+    MP_HAL_PIN_ALT_LPCAM_HSYNC,
+    MP_HAL_PIN_ALT_LPCAM_PCLK,
+    MP_HAL_PIN_ALT_LPCAM_VSYNC,
+    MP_HAL_PIN_ALT_LPCAM_XVCLK,
+    MP_HAL_PIN_ALT_LPI2C_SCL,
+    MP_HAL_PIN_ALT_LPI2C_SDA,
+    MP_HAL_PIN_ALT_LPI2S_SCLK,
+    MP_HAL_PIN_ALT_LPI2S_SDI,
+    MP_HAL_PIN_ALT_LPI2S_SDO,
+    MP_HAL_PIN_ALT_LPI2S_WS,
+    MP_HAL_PIN_ALT_LPPDM_C0,
+    MP_HAL_PIN_ALT_LPPDM_C1,
+    MP_HAL_PIN_ALT_LPPDM_C2,
+    MP_HAL_PIN_ALT_LPPDM_C3,
+    MP_HAL_PIN_ALT_LPPDM_D0,
+    MP_HAL_PIN_ALT_LPPDM_D1,
+    MP_HAL_PIN_ALT_LPPDM_D2,
+    MP_HAL_PIN_ALT_LPPDM_D3,
+    MP_HAL_PIN_ALT_LPSPI_MISO,
+    MP_HAL_PIN_ALT_LPSPI_MOSI,
+    MP_HAL_PIN_ALT_LPSPI_SCLK,
+    MP_HAL_PIN_ALT_LPSPI_SS,
+    MP_HAL_PIN_ALT_LPTMR_CLK,
+    MP_HAL_PIN_ALT_LPUART_CTS,
+    MP_HAL_PIN_ALT_LPUART_RTS,
+    MP_HAL_PIN_ALT_LPUART_RX,
+    MP_HAL_PIN_ALT_LPUART_TX,
+    MP_HAL_PIN_ALT_OSPI_D0,
+    MP_HAL_PIN_ALT_OSPI_D1,
+    MP_HAL_PIN_ALT_OSPI_D2,
+    MP_HAL_PIN_ALT_OSPI_D3,
+    MP_HAL_PIN_ALT_OSPI_D4,
+    MP_HAL_PIN_ALT_OSPI_D5,
+    MP_HAL_PIN_ALT_OSPI_D6,
+    MP_HAL_PIN_ALT_OSPI_D7,
+    MP_HAL_PIN_ALT_OSPI_RXDS,
+    MP_HAL_PIN_ALT_OSPI_SCLK,
+    MP_HAL_PIN_ALT_OSPI_SCLKN,
+    MP_HAL_PIN_ALT_OSPI_SS0,
+    MP_HAL_PIN_ALT_OSPI_SS1,
+    MP_HAL_PIN_ALT_PDM_C0,
+    MP_HAL_PIN_ALT_PDM_C1,
+    MP_HAL_PIN_ALT_PDM_C2,
+    MP_HAL_PIN_ALT_PDM_C3,
+    MP_HAL_PIN_ALT_PDM_D0,
+    MP_HAL_PIN_ALT_PDM_D1,
+    MP_HAL_PIN_ALT_PDM_D2,
+    MP_HAL_PIN_ALT_PDM_D3,
+    MP_HAL_PIN_ALT_QEC_X,
+    MP_HAL_PIN_ALT_QEC_Y,
+    MP_HAL_PIN_ALT_QEC_Z,
+    MP_HAL_PIN_ALT_SD_CLK,
+    MP_HAL_PIN_ALT_SD_CMD,
+    MP_HAL_PIN_ALT_SD_D0,
+    MP_HAL_PIN_ALT_SD_D1,
+    MP_HAL_PIN_ALT_SD_D2,
+    MP_HAL_PIN_ALT_SD_D3,
+    MP_HAL_PIN_ALT_SD_D4,
+    MP_HAL_PIN_ALT_SD_D5,
+    MP_HAL_PIN_ALT_SD_D6,
+    MP_HAL_PIN_ALT_SD_D7,
+    MP_HAL_PIN_ALT_SD_RST,
+    MP_HAL_PIN_ALT_SPI_MISO,
+    MP_HAL_PIN_ALT_SPI_MOSI,
+    MP_HAL_PIN_ALT_SPI_SCLK,
+    MP_HAL_PIN_ALT_SPI_SS0,
+    MP_HAL_PIN_ALT_SPI_SS1,
+    MP_HAL_PIN_ALT_SPI_SS2,
+    MP_HAL_PIN_ALT_SPI_SS3,
+    MP_HAL_PIN_ALT_UART_CTS,
+    MP_HAL_PIN_ALT_UART_DE,
+    MP_HAL_PIN_ALT_UART_RTS,
+    MP_HAL_PIN_ALT_UART_RX,
+    MP_HAL_PIN_ALT_UART_TX,
+    MP_HAL_PIN_ALT_UT_T0,
+    MP_HAL_PIN_ALT_UT_T1,
 };
 
 typedef struct _machine_pin_obj_t {
@@ -130,7 +279,7 @@ typedef struct _machine_pin_obj_t {
     uint8_t adc12_periph : 2;
     uint8_t adc12_channel : 3;
     qstr name;
-    const uint8_t alt[8];
+    const uint16_t alt[8]; // holds result of MP_HAL_PIN_ALT_MAKE(function, unit)
 } machine_pin_obj_t;
 
 mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t pin_in);
diff --git a/ports/alif/mpuart.c b/ports/alif/mpuart.c
index 4fe82ce12..b646e6f2b 100644
--- a/ports/alif/mpuart.c
+++ b/ports/alif/mpuart.c
@@ -91,8 +91,10 @@ void mp_uart_init(unsigned int uart_id, uint32_t baudrate,
     uart_state_t *state = &uart_state[uart_id];
 
     // Configure TX/RX pins.
-    mp_hal_pin_config(tx, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_UART, false);
-    mp_hal_pin_config(rx, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_UART, true);
+    mp_hal_pin_config(tx, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(UART_TX, uart_id), false);
+    mp_hal_pin_config(rx, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(UART_RX, uart_id), true);
 
     // Configure the UART peripheral.
     select_uart_clock_syst_pclk(uart_id);
@@ -152,11 +154,13 @@ void mp_uart_set_flow(unsigned int uart_id, mp_hal_pin_obj_t rts, mp_hal_pin_obj
     unsigned int flow = UART_FLOW_CONTROL_NONE;
     if (rts != NULL) {
         flow |= UART_FLOW_CONTROL_RTS;
-        mp_hal_pin_config(rts, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_UART, false);
+        mp_hal_pin_config(rts, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(UART_RTS, uart_id), false);
     }
     if (cts != NULL) {
         flow |= UART_FLOW_CONTROL_CTS;
-        mp_hal_pin_config(cts, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_UART, true);
+        mp_hal_pin_config(cts, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT(UART_CTS, uart_id), true);
     }
     uart_set_flow_control(uart, flow);
 }
diff --git a/ports/alif/ospi_flash.c b/ports/alif/ospi_flash.c
index 17c8be812..9ba7ebe6e 100644
--- a/ports/alif/ospi_flash.c
+++ b/ports/alif/ospi_flash.c
@@ -262,40 +262,41 @@ int ospi_flash_init(void) {
 
     self->pin = pin;
 
+    unsigned int unit = pin->peripheral_number;
     mp_hal_pin_config(pin->pin_cs, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-        MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, false);
+        MP_HAL_PIN_SPEED_LOW, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_SS0, unit), false);
     mp_hal_pin_config(pin->pin_clk_p, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, false);
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_SCLK, unit), false);
     if (pin->pin_clk_n != NULL) {
         mp_hal_pin_config(pin->pin_clk_n, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, false);
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_SCLKN, unit), false);
     }
     if (pin->pin_rwds != NULL) {
         mp_hal_pin_config(pin->pin_rwds, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_RXDS, unit), true);
         if (pin->pin_rwds->port == PORT_10 && pin->pin_rwds->pin == PIN_7) {
             // Alif: P5_6 is needed to support proper alt function selection of P10_7.
             mp_hal_pin_config(pin_P5_6, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-                MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+                MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_RXDS, unit), true);
         }
     }
     mp_hal_pin_config(pin->pin_d0, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D0, unit), true);
     mp_hal_pin_config(pin->pin_d1, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D1, unit), true);
     mp_hal_pin_config(pin->pin_d2, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_UP,
-        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D2, unit), true);
     mp_hal_pin_config(pin->pin_d3, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+        MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D3, unit), true);
     if (pin->pin_d4 != NULL) {
         mp_hal_pin_config(pin->pin_d4, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D4, unit), true);
         mp_hal_pin_config(pin->pin_d5, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D5, unit), true);
         mp_hal_pin_config(pin->pin_d6, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D6, unit), true);
         mp_hal_pin_config(pin->pin_d7, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE,
-            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT_OSPI, true);
+            MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_12MA, MP_HAL_PIN_ALT(OSPI_D7, unit), true);
     }
 
     // Reset the SPI flash.