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authorDamien George <damien.p.george@gmail.com>2018-12-30 00:59:16 +1100
committerDamien George <damien.p.george@gmail.com>2018-12-30 00:59:16 +1100
commit7bdbea9a0ce99fd934c8f5f9d0eba7b1cf458567 (patch)
tree62dc93f1deefe55e055a04e475c14e79a0de4c5f
parent0d860fdcd01614a109cd85a09c727b547dcb1378 (diff)
stm32/uart: Clear overrun error flag after reading RX data register.
On MCUs other than F4 the ORE (overrun error) flag needs to be cleared independently of clearing RXNE, even though both are wired to trigger the same RXNE IRQ. In the case that an overrun occurred it's necessary to explicitly clear the ORE flag or else the RXNE interrupt will keep firing.
-rw-r--r--ports/stm32/uart.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c
index cdc3e2670..5071fed44 100644
--- a/ports/stm32/uart.c
+++ b/ports/stm32/uart.c
@@ -597,7 +597,9 @@ int uart_rx_char(pyb_uart_obj_t *self) {
} else {
// no buffering
#if defined(STM32F0) || defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
- return self->uartx->RDR & self->char_mask;
+ int data = self->uartx->RDR & self->char_mask;
+ self->uartx->ICR = USART_ICR_ORECF; // clear ORE if it was set
+ return data;
#else
return self->uartx->DR & self->char_mask;
#endif
@@ -722,6 +724,7 @@ void uart_irq_handler(mp_uint_t uart_id) {
// only read data if room in buf
#if defined(STM32F0) || defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
int data = self->uartx->RDR; // clears UART_FLAG_RXNE
+ self->uartx->ICR = USART_ICR_ORECF; // clear ORE if it was set
#else
int data = self->uartx->DR; // clears UART_FLAG_RXNE
#endif