stm32/boards: Enable RAM_ISR feature on boards with UART REPL.

Allows mpremote file transfer to work correctly when mpremote is used over
the ST-link USB/UART REPL port.

Fixes issue #8386.

Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>

30 files changed, 52 insertions, 0 deletions

diff --git a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk
index 137b6be23..2649b0968 100644
--- a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk
+++ b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk
@@ -5,3 +5,5 @@ CMSIS_MCU = STM32L475xx
 AF_FILE = boards/stm32l476_af.csv
 LD_FILES = boards/stm32l476xg.ld boards/common_basic.ld
 OPENOCD_CONFIG = boards/openocd_stm32l4.cfg
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk
index bb7142d1b..193ed793f 100644
--- a/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk
@@ -6,6 +6,7 @@ LD_FILES = boards/stm32f091xc.ld boards/common_basic.ld
 # MicroPython settings
 MICROPY_VFS_FAT = 0
 MICROPY_VFS_LFS1 ?= 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 # Don't include default frozen modules because MCU is tight on flash space
 FROZEN_MANIFEST ?=
diff --git a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk
index 4c3022f54..a9985df30 100644
--- a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk
@@ -4,3 +4,5 @@ AF_FILE = boards/stm32f401_af.csv
 LD_FILES = boards/stm32f401xe.ld boards/common_ifs.ld
 TEXT0_ADDR = 0x08000000
 TEXT1_ADDR = 0x08020000
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk
index df9506522..d17217e63 100644
--- a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk
@@ -4,3 +4,5 @@ AF_FILE = boards/stm32f411_af.csv
 LD_FILES = boards/stm32f411.ld boards/common_ifs.ld
 TEXT0_ADDR = 0x08000000
 TEXT1_ADDR = 0x08020000
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk
index dd671a9f9..2fbb4ddbe 100644
--- a/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk
@@ -4,3 +4,5 @@ AF_FILE = boards/stm32f412_af.csv
 LD_FILES = boards/stm32f412zx.ld boards/common_ifs.ld
 TEXT0_ADDR = 0x08000000
 TEXT1_ADDR = 0x08020000
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.mk
index 7d8ea6bf6..b1cbee9a6 100644
--- a/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.mk
@@ -4,3 +4,5 @@ AF_FILE = boards/stm32f413_af.csv
 LD_FILES = boards/stm32f413xh.ld boards/common_ifs.ld
 TEXT0_ADDR = 0x08000000
 TEXT1_ADDR = 0x08060000
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk
index e5fc89ab4..f691ad2ff 100644
--- a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk
@@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000
 MICROPY_PY_LWIP = 1
 MICROPY_PY_SSL = 1
 MICROPY_SSL_MBEDTLS = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.mk
index b8666755b..8a45794f0 100644
--- a/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.mk
@@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000
 MICROPY_PY_LWIP = 1
 MICROPY_PY_SSL = 1
 MICROPY_SSL_MBEDTLS = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk
index 3a922aceb..6567f829a 100644
--- a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk
@@ -4,3 +4,5 @@ AF_FILE = boards/stm32f446_af.csv
 LD_FILES = boards/stm32f411.ld boards/common_ifs.ld
 TEXT0_ADDR = 0x08000000
 TEXT1_ADDR = 0x08020000
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_F722ZE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F722ZE/mpconfigboard.mk
index 667c8e55d..1d32f0b97 100644
--- a/ports/stm32/boards/NUCLEO_F722ZE/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F722ZE/mpconfigboard.mk
@@ -4,3 +4,5 @@ AF_FILE = boards/stm32f722_af.csv
 LD_FILES = boards/stm32f722.ld boards/common_ifs.ld
 TEXT0_ADDR = 0x08000000
 TEXT1_ADDR = 0x08020000
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk
index 20acc63f1..81c6b4629 100644
--- a/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk
@@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000
 MICROPY_PY_LWIP = 1
 MICROPY_PY_SSL = 1
 MICROPY_SSL_MBEDTLS = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/NUCLEO_F756ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F756ZG/mpconfigboard.mk
index ab3eada5b..979df77e9 100644
--- a/ports/stm32/boards/NUCLEO_F756ZG/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F756ZG/mpconfigboard.mk
@@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000
 MICROPY_PY_LWIP = 1
 MICROPY_PY_SSL = 1
 MICROPY_SSL_MBEDTLS = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk
index 22c409815..693429241 100644
--- a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk
@@ -10,5 +10,6 @@ TEXT1_ADDR = 0x08020000
 MICROPY_PY_LWIP = 1
 MICROPY_PY_SSL = 1
 MICROPY_SSL_MBEDTLS = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/NUCLEO_G0B1RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_G0B1RE/mpconfigboard.mk
index abc9b43ef..f1c135710 100644
--- a/ports/stm32/boards/NUCLEO_G0B1RE/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_G0B1RE/mpconfigboard.mk
@@ -11,3 +11,5 @@ endif
 
 # LTO reduces final binary size, may be slower to build depending on gcc version and hardware
 LTO ?= 1
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.mk
index 24a06e08e..a72c4e03d 100644
--- a/ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.mk
@@ -4,3 +4,5 @@ CMSIS_MCU = STM32G474xx
 MICROPY_FLOAT_IMPL = single
 AF_FILE = boards/stm32g474_af.csv
 LD_FILES = boards/stm32g474.ld boards/common_basic.ld
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.mk
index a55a54d1c..e2ce5e333 100644
--- a/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_H563ZI/mpconfigboard.mk
@@ -21,3 +21,4 @@ endif
 MICROPY_PY_LWIP = 1
 MICROPY_PY_SSL = 1
 MICROPY_SSL_MBEDTLS = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk
index 6d512ec0e..b05da481f 100644
--- a/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk
@@ -21,5 +21,6 @@ MICROPY_PY_LWIP = 1
 MICROPY_PY_SSL = 1
 MICROPY_SSL_MBEDTLS = 1
 MICROPY_VFS_LFS2 = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk
index cbdf48c52..35e62c470 100644
--- a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk
@@ -21,5 +21,6 @@ MICROPY_PY_LWIP = 1
 MICROPY_PY_SSL = 1
 MICROPY_SSL_MBEDTLS = 1
 MICROPY_VFS_LFS2 = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.mk
index a62a775ac..c6dfeb85f 100644
--- a/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.mk
@@ -2,3 +2,5 @@ MCU_SERIES = l1
 CMSIS_MCU = STM32L152xE
 AF_FILE = boards/stm32l152_af.csv
 LD_FILES = boards/stm32l152xe.ld boards/common_basic.ld
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.mk
index c3fff8100..8e816b395 100644
--- a/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.mk
@@ -7,6 +7,7 @@ OPENOCD_CONFIG = boards/openocd_stm32l4.cfg
 # MicroPython settings
 MICROPY_VFS_FAT = 0
 MICROPY_VFS_LFS1 ?= 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 # Don't include default frozen modules because MCU is tight on flash space
 FROZEN_MANIFEST ?=
diff --git a/ports/stm32/boards/NUCLEO_L452RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L452RE/mpconfigboard.mk
index 25ccb45a9..3bfeda761 100644
--- a/ports/stm32/boards/NUCLEO_L452RE/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_L452RE/mpconfigboard.mk
@@ -3,3 +3,5 @@ CMSIS_MCU = STM32L452xx
 AF_FILE = boards/stm32l452_af.csv
 LD_FILES = boards/stm32l452xe.ld boards/common_basic.ld
 OPENOCD_CONFIG = boards/openocd_stm32l4.cfg
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk
index 10c69461c..2a7a6f9ad 100644
--- a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk
@@ -3,3 +3,5 @@ CMSIS_MCU = STM32L476xx
 AF_FILE = boards/stm32l476_af.csv
 LD_FILES = boards/stm32l476xg.ld boards/common_basic.ld
 OPENOCD_CONFIG = boards/openocd_stm32l4.cfg
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_L4A6ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L4A6ZG/mpconfigboard.mk
index 51caeaa3a..fddf0a6c3 100644
--- a/ports/stm32/boards/NUCLEO_L4A6ZG/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_L4A6ZG/mpconfigboard.mk
@@ -3,3 +3,5 @@ CMSIS_MCU = STM32L4A6xx
 AF_FILE = boards/stm32l496_af.csv
 LD_FILES = boards/stm32l496xg.ld boards/common_basic.ld
 OPENOCD_CONFIG = boards/openocd_stm32l4.cfg
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_WB55/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_WB55/mpconfigboard.mk
index 2e6ce1fe8..4beaf9cf6 100644
--- a/ports/stm32/boards/NUCLEO_WB55/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_WB55/mpconfigboard.mk
@@ -17,3 +17,4 @@ endif
 MICROPY_PY_BLUETOOTH = 1
 MICROPY_BLUETOOTH_NIMBLE = 1
 MICROPY_VFS_LFS2 = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk
index ced2e7619..f137fcceb 100644
--- a/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk
@@ -8,6 +8,7 @@ TEXT0_ADDR = 0x08000000
 # MicroPython settings
 MICROPY_VFS_FAT = 0
 MICROPY_VFS_LFS2 = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 # Board-specific manifest (doesn't include default modules, adds LoRa driver).
 FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/OLIMEX_H407/mpconfigboard.mk b/ports/stm32/boards/OLIMEX_H407/mpconfigboard.mk
index b154dcfba..5c74443c4 100644
--- a/ports/stm32/boards/OLIMEX_H407/mpconfigboard.mk
+++ b/ports/stm32/boards/OLIMEX_H407/mpconfigboard.mk
@@ -4,3 +4,5 @@ AF_FILE = boards/stm32f405_af.csv
 LD_FILES = boards/stm32f405.ld boards/common_ifs.ld
 TEXT0_ADDR = 0x08000000
 TEXT1_ADDR = 0x08020000
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk
index d19a35c31..0cff5fd2a 100644
--- a/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk
+++ b/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk
@@ -4,3 +4,5 @@ AF_FILE = boards/stm32f429_af.csv
 LD_FILES = boards/stm32f429.ld boards/common_ifs.ld
 TEXT0_ADDR = 0x08000000
 TEXT1_ADDR = 0x08020000
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
diff --git a/ports/stm32/boards/STM32F769DISC/f769_qspi.ld b/ports/stm32/boards/STM32F769DISC/f769_qspi.ld
index cde1ef5ca..817422bee 100644
--- a/ports/stm32/boards/STM32F769DISC/f769_qspi.ld
+++ b/ports/stm32/boards/STM32F769DISC/f769_qspi.ld
@@ -17,6 +17,7 @@
 
 MEMORY
 {
+    FLASH_FS (r)    : ORIGIN = 0x08008000, LENGTH = 96K     /* sectors 1, 2, 3 (32K each) */
     FLASH_APP (rx)  : ORIGIN = 0x08020000, LENGTH = 1920K   /* sectors 4-11 1*128K 7*256K */
     FLASH_QSPI (rx) : ORIGIN = 0x90000000, LENGTH = 64M     /* external QSPI flash in XIP mode */
     DTCM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K    /* Used for storage cache */
@@ -38,6 +39,12 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM);
 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack;
 
+/* Filesystem cache in RAM, and storage in flash */
+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(DTCM);
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+
 ENTRY(Reset_Handler)
 
 REGION_ALIAS("FLASH_ISR", FLASH_APP);
diff --git a/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk
index 20acc63f1..81c6b4629 100644
--- a/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk
+++ b/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk
@@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000
 MICROPY_PY_LWIP = 1
 MICROPY_PY_SSL = 1
 MICROPY_SSL_MBEDTLS = 1
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1
 
 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk b/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk
index a85635e30..b64229418 100644
--- a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk
+++ b/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk
@@ -3,3 +3,5 @@ CMSIS_MCU = STM32L496xx
 AF_FILE = boards/stm32l496_af.csv
 LD_FILES = boards/stm32l496xg.ld boards/common_basic.ld
 OPENOCD_CONFIG = boards/openocd_stm32l4.cfg
+
+MICROPY_HW_ENABLE_ISR_UART_FLASH_FUNCS_IN_RAM = 1