diff options
| author | Damien George <damien.p.george@gmail.com> | 2018-12-09 22:51:25 +1100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2018-12-10 16:21:50 +1100 |
| commit | 9690757ccaea0e1138c7580c138639e6c40489eb (patch) | |
| tree | c9a59ee79bc437cc6b57a77bcdee03307e0904cf | |
| parent | 524e13b0062ddbe96c1aadeec36c34f8012dc7a1 (diff) | |
stm32/uart: Rework uart_get_baudrate so it doesn't need a UART handle.
| -rw-r--r-- | ports/stm32/uart.c | 72 |
1 files changed, 47 insertions, 25 deletions
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c index e828f2538..ba9cce507 100644 --- a/ports/stm32/uart.c +++ b/ports/stm32/uart.c @@ -411,34 +411,56 @@ uint32_t uart_get_baudrate(pyb_uart_obj_t *self) { #if defined(STM32F0) uart_clk = HAL_RCC_GetPCLK1Freq(); - #elif defined(STM32F7) || defined(STM32H7) - UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED; - UART_GETCLOCKSOURCE(&self->uart, clocksource); - switch (clocksource) { - #if defined(STM32H7) - case UART_CLOCKSOURCE_D2PCLK1: uart_clk = HAL_RCC_GetPCLK1Freq(); break; - case UART_CLOCKSOURCE_D3PCLK1: uart_clk = HAL_RCC_GetPCLK1Freq(); break; - case UART_CLOCKSOURCE_D2PCLK2: uart_clk = HAL_RCC_GetPCLK2Freq(); break; - #else - case UART_CLOCKSOURCE_PCLK1: uart_clk = HAL_RCC_GetPCLK1Freq(); break; - case UART_CLOCKSOURCE_PCLK2: uart_clk = HAL_RCC_GetPCLK2Freq(); break; - case UART_CLOCKSOURCE_SYSCLK: uart_clk = HAL_RCC_GetSysClockFreq(); break; - #endif - #if defined(STM32H7) - case UART_CLOCKSOURCE_CSI: uart_clk = CSI_VALUE; break; - #endif - case UART_CLOCKSOURCE_HSI: uart_clk = HSI_VALUE; break; - case UART_CLOCKSOURCE_LSE: uart_clk = LSE_VALUE; break; - #if defined(STM32H7) - case UART_CLOCKSOURCE_PLL2: - case UART_CLOCKSOURCE_PLL3: - #endif - case UART_CLOCKSOURCE_UNDEFINED: break; + #elif defined(STM32F7) + switch ((RCC->DCKCFGR2 >> ((self->uart_id - 1) * 2)) & 3) { + case 0: + if (self->uart_id == 1 || self->uart_id == 6) { + uart_clk = HAL_RCC_GetPCLK2Freq(); + } else { + uart_clk = HAL_RCC_GetPCLK1Freq(); + } + break; + case 1: + uart_clk = HAL_RCC_GetSysClockFreq(); + break; + case 2: + uart_clk = HSI_VALUE; + break; + case 3: + uart_clk = LSE_VALUE; + break; + } + #elif defined(STM32H7) + uint32_t csel; + if (self->uart_id == 1 || self->uart_id == 6) { + csel = RCC->D2CCIP2R >> 3; + } else { + csel = RCC->D2CCIP2R; + } + switch (csel & 3) { + case 0: + if (self->uart_id == 1 || self->uart_id == 6) { + uart_clk = HAL_RCC_GetPCLK2Freq(); + } else { + uart_clk = HAL_RCC_GetPCLK1Freq(); + } + break; + case 3: + uart_clk = HSI_VALUE; + break; + case 4: + uart_clk = CSI_VALUE; + break; + case 5: + uart_clk = LSE_VALUE; + break; + default: + break; } #else - if (self->uart.Instance == USART1 + if (self->uart_id == 1 #if defined(USART6) - || self->uart.Instance == USART6 + || self->uart_id == 6 #endif ) { uart_clk = HAL_RCC_GetPCLK2Freq(); |