diff options
| author | Damien George <damien@micropython.org> | 2023-10-17 12:41:47 +1100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2023-10-17 12:41:47 +1100 |
| commit | 971f1cf987583d5607ec1563f9261b9b7fb0cafa (patch) | |
| tree | 4c48dceb251e551b9b0d0ba064c8da4d7abf9d75 | |
| parent | e15882ad2bfaf342e8e966a84877f338eabd1430 (diff) | |
stm32/powerctrl: Add support for frequency scaling with HSI on H5 MCUs.
Signed-off-by: Damien George <damien@micropython.org>
| -rw-r--r-- | ports/stm32/boards/pllvalues.py | 14 | ||||
| -rw-r--r-- | ports/stm32/powerctrl.c | 22 |
2 files changed, 31 insertions, 5 deletions
diff --git a/ports/stm32/boards/pllvalues.py b/ports/stm32/boards/pllvalues.py index 76320cc9c..2db6b5f25 100644 --- a/ports/stm32/boards/pllvalues.py +++ b/ports/stm32/boards/pllvalues.py @@ -41,6 +41,15 @@ mcu_table = { range_vco_in=range(1, 2 + 1), range_vco_out=range(100, 432 + 1), ), + "stm32h5": MCU( + range_sysclk=range(2, 250 + 1, 2), + range_m=range(1, 63 + 1), + range_n=range(4, 512 + 1), + range_p=range(2, 128 + 1, 2), + range_q=range(1, 128 + 1), + range_vco_in=range(1, 16 + 1), + range_vco_out=range(150, 836 + 1), # 150-420=medium, 192-836=wide + ), "stm32h7": MCU( range_sysclk=range(2, 400 + 1, 2), # above 400MHz currently unsupported range_m=range(1, 63 + 1), @@ -274,9 +283,6 @@ def main(): hse, hsi = search_header_for_hsx_values(argv[0][5:], [None, None]) if hse is None: raise ValueError("%s does not contain a definition of HSE_VALUE" % argv[0]) - if hsi is not None and hsi > 16: - # Currently, a HSI value greater than 16MHz is not supported - hsi = None else: # HSE given directly as an integer hse = int(argv[0]) @@ -289,7 +295,7 @@ def main(): break # Relax constraint on PLLQ being 48MHz on MCUs which have separate PLLs for 48MHz - relax_pll48 = mcu_series.startswith(("stm32f413", "stm32f7", "stm32h7")) + relax_pll48 = mcu_series.startswith(("stm32f413", "stm32f7", "stm32h5", "stm32h7")) hse_valid_plls = compute_pll_table(hse, relax_pll48) if hsi is not None: diff --git a/ports/stm32/powerctrl.c b/ports/stm32/powerctrl.c index 80195f04a..03224f4d8 100644 --- a/ports/stm32/powerctrl.c +++ b/ports/stm32/powerctrl.c @@ -498,6 +498,9 @@ set_clk: RCC_OscInitStruct.OscillatorType = MICROPY_HW_RCC_OSCILLATOR_TYPE; RCC_OscInitStruct.HSEState = MICROPY_HW_RCC_HSE_STATE; RCC_OscInitStruct.HSIState = MICROPY_HW_RCC_HSI_STATE; + #if defined(STM32G0) || defined(STM32H5) + RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; + #endif RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = MICROPY_HW_RCC_PLL_SRC; @@ -506,7 +509,24 @@ set_clk: RCC_OscInitStruct.PLL.PLLP = p; RCC_OscInitStruct.PLL.PLLQ = q; - #if defined(STM32H7) + #if defined(STM32H5) + RCC_OscInitStruct.PLL.PLLR = 0; + if (MICROPY_HW_CLK_VALUE / 1000000 <= 2 * m) { + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_0; // 1-2MHz + } else if (MICROPY_HW_CLK_VALUE / 1000000 <= 4 * m) { + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; // 2-4MHz + } else if (MICROPY_HW_CLK_VALUE / 1000000 <= 8 * m) { + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; // 4-8MHz + } else { + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_3; // 8-16MHz + } + if (MICROPY_HW_CLK_VALUE / 1000000 * n <= 420 * m) { + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_MEDIUM; // 150-420MHz + } else { + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; // 192-836MHz + } + RCC_OscInitStruct.PLL.PLLFRACN = 0; + #elif defined(STM32H7) RCC_OscInitStruct.PLL.PLLR = 0; if (MICROPY_HW_CLK_VALUE / 1000000 <= 2 * m) { RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_0; // 1-2MHz |