diff options
| author | robert-hh <robert@hammelrath.com> | 2023-08-16 08:41:40 +0200 |
|---|---|---|
| committer | robert-hh <robert@hammelrath.com> | 2023-08-16 10:06:59 +0200 |
| commit | a18d62e06727e0c424da1f43f80a5b0cb76bcc04 (patch) | |
| tree | 06f51b9a381e0d66474ef750d63214f50fd00c55 | |
| parent | 40fcbe1246e95eea33a727b1c6f22f76abb34d95 (diff) | |
mimxrt: Fix UART RTS/CTS assignments for the OLIMEX and Adafruit boards.
At the Adafruit Metro M7 the pin GPIO_AD_13 is used for JTAG. Therefore
it is not configured for RTS at UART 2 and 3.
Signed-off-by: robert-hh <robert@hammelrath.com>
| -rw-r--r-- | ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.h | 6 | ||||
| -rw-r--r-- | ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h | 4 |
2 files changed, 8 insertions, 2 deletions
diff --git a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.h b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.h index ac9cf9705..7d759df5e 100644 --- a/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.h +++ b/ports/mimxrt/boards/ADAFRUIT_METRO_M7/mpconfigboard.h @@ -23,6 +23,12 @@ { 0 }, { 0 }, \ { IOMUXC_GPIO_AD_02_LPUART4_TXD }, { IOMUXC_GPIO_AD_01_LPUART4_RXD }, +#define IOMUX_TABLE_UART_CTS_RTS \ + { IOMUXC_GPIO_08_LPUART1_CTS_B }, { IOMUXC_GPIO_07_LPUART1_RTS_B }, \ + { IOMUXC_GPIO_AD_14_LPUART3_CTS_B }, { 0 }, \ + { 0 }, { 0 }, \ + { IOMUXC_GPIO_AD_14_LPUART4_CTS_B }, { 0 }, + #define MICROPY_HW_SPI_INDEX { 1 } #define IOMUX_TABLE_SPI \ diff --git a/ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h b/ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h index 828855d4d..9443bb373 100644 --- a/ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h +++ b/ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h @@ -26,10 +26,10 @@ { IOMUXC_GPIO_06_LPUART4_TXD }, { IOMUXC_GPIO_05_LPUART4_RXD }, #define IOMUX_TABLE_UART_CTS_RTS \ - { IOMUXC_GPIO_AD_B0_14_LPUART1_CTS_B }, { IOMUXC_GPIO_AD_B0_15_LPUART1_RTS_B }, \ + { IOMUXC_GPIO_08_LPUART1_CTS_B }, { IOMUXC_GPIO_07_LPUART1_RTS_B }, \ { 0 }, { 0 }, \ { 0 }, { 0 }, \ - { IOMUXC_GPIO_EMC_17_LPUART4_CTS_B }, { IOMUXC_GPIO_EMC_18_LPUART4_RTS_B }, + { IOMUXC_GPIO_AD_14_LPUART4_CTS_B }, { IOMUXC_GPIO_AD_13_LPUART4_RTS_B }, #define MICROPY_HW_SPI_INDEX { 0, 1, 2 } |