stm32/boards/STM32F769DISC: Add optional support for external SDRAM.

3 files changed, 145 insertions, 1 deletions

diff --git a/ports/stm32/boards/STM32F769DISC/mpconfigboard.h b/ports/stm32/boards/STM32F769DISC/mpconfigboard.h
index 8b29e5773..de86e4dda 100644
--- a/ports/stm32/boards/STM32F769DISC/mpconfigboard.h
+++ b/ports/stm32/boards/STM32F769DISC/mpconfigboard.h
@@ -78,3 +78,90 @@
 #define MICROPY_HW_USB_HS_IN_FS        (1)
 /*#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_J12)*/
 #define MICROPY_HW_USB_OTG_ID_PIN      (pin_J12)
+
+#if 0
+// Optional SDRAM configuration; requires SYSCLK <= 200MHz
+#define MICROPY_HW_SDRAM_SIZE (128 * 1024 * 1024 / 8) // 128 Mbit
+#define MICROPY_HW_SDRAM_STARTUP_TEST (0)
+
+// Timing configuration for 90 Mhz (11.90ns) of SD clock frequency (180Mhz/2)
+#define MICROPY_HW_SDRAM_TIMING_TMRD        (2)
+#define MICROPY_HW_SDRAM_TIMING_TXSR        (7)
+#define MICROPY_HW_SDRAM_TIMING_TRAS        (4)
+#define MICROPY_HW_SDRAM_TIMING_TRC         (7)
+#define MICROPY_HW_SDRAM_TIMING_TWR         (2)
+#define MICROPY_HW_SDRAM_TIMING_TRP         (2)
+#define MICROPY_HW_SDRAM_TIMING_TRCD        (2)
+#define MICROPY_HW_SDRAM_REFRESH_RATE       (64) // ms
+
+#define MICROPY_HW_SDRAM_BURST_LENGTH       1
+#define MICROPY_HW_SDRAM_CAS_LATENCY        2
+#define MICROPY_HW_SDRAM_COLUMN_BITS_NUM    8
+#define MICROPY_HW_SDRAM_ROW_BITS_NUM       13
+#define MICROPY_HW_SDRAM_MEM_BUS_WIDTH      32
+#define MICROPY_HW_SDRAM_INTERN_BANKS_NUM   4
+#define MICROPY_HW_SDRAM_CLOCK_PERIOD       2
+#define MICROPY_HW_SDRAM_RPIPE_DELAY        0
+#define MICROPY_HW_SDRAM_RBURST             (1)
+#define MICROPY_HW_SDRAM_WRITE_PROTECTION   (0)
+#define MICROPY_HW_SDRAM_AUTOREFRESH_NUM    (8)
+
+// See pins.csv for CPU pin mapping
+#define MICROPY_HW_FMC_SDCKE0  (pyb_pin_FMC_SDCKE0)
+#define MICROPY_HW_FMC_SDNE0   (pyb_pin_FMC_SDNE0)
+#define MICROPY_HW_FMC_SDCLK   (pyb_pin_FMC_SDCLK)
+#define MICROPY_HW_FMC_SDNCAS  (pyb_pin_FMC_SDNCAS)
+#define MICROPY_HW_FMC_SDNRAS  (pyb_pin_FMC_SDNRAS)
+#define MICROPY_HW_FMC_SDNWE   (pyb_pin_FMC_SDNWE)
+#define MICROPY_HW_FMC_BA0     (pyb_pin_FMC_BA0)
+#define MICROPY_HW_FMC_BA1     (pyb_pin_FMC_BA1)
+#define MICROPY_HW_FMC_NBL0    (pyb_pin_FMC_NBL0)
+#define MICROPY_HW_FMC_NBL1    (pyb_pin_FMC_NBL1)
+#define MICROPY_HW_FMC_NBL2    (pyb_pin_FMC_NBL2)
+#define MICROPY_HW_FMC_NBL3    (pyb_pin_FMC_NBL3)
+#define MICROPY_HW_FMC_A0      (pyb_pin_FMC_A0)
+#define MICROPY_HW_FMC_A1      (pyb_pin_FMC_A1)
+#define MICROPY_HW_FMC_A2      (pyb_pin_FMC_A2)
+#define MICROPY_HW_FMC_A3      (pyb_pin_FMC_A3)
+#define MICROPY_HW_FMC_A4      (pyb_pin_FMC_A4)
+#define MICROPY_HW_FMC_A5      (pyb_pin_FMC_A5)
+#define MICROPY_HW_FMC_A6      (pyb_pin_FMC_A6)
+#define MICROPY_HW_FMC_A7      (pyb_pin_FMC_A7)
+#define MICROPY_HW_FMC_A8      (pyb_pin_FMC_A8)
+#define MICROPY_HW_FMC_A9      (pyb_pin_FMC_A9)
+#define MICROPY_HW_FMC_A10     (pyb_pin_FMC_A10)
+#define MICROPY_HW_FMC_A11     (pyb_pin_FMC_A11)
+#define MICROPY_HW_FMC_A12     (pyb_pin_FMC_A12)
+#define MICROPY_HW_FMC_D0      (pyb_pin_FMC_D0)
+#define MICROPY_HW_FMC_D1      (pyb_pin_FMC_D1)
+#define MICROPY_HW_FMC_D2      (pyb_pin_FMC_D2)
+#define MICROPY_HW_FMC_D3      (pyb_pin_FMC_D3)
+#define MICROPY_HW_FMC_D4      (pyb_pin_FMC_D4)
+#define MICROPY_HW_FMC_D5      (pyb_pin_FMC_D5)
+#define MICROPY_HW_FMC_D6      (pyb_pin_FMC_D6)
+#define MICROPY_HW_FMC_D7      (pyb_pin_FMC_D7)
+#define MICROPY_HW_FMC_D8      (pyb_pin_FMC_D8)
+#define MICROPY_HW_FMC_D9      (pyb_pin_FMC_D9)
+#define MICROPY_HW_FMC_D10     (pyb_pin_FMC_D10)
+#define MICROPY_HW_FMC_D11     (pyb_pin_FMC_D11)
+#define MICROPY_HW_FMC_D12     (pyb_pin_FMC_D12)
+#define MICROPY_HW_FMC_D13     (pyb_pin_FMC_D13)
+#define MICROPY_HW_FMC_D14     (pyb_pin_FMC_D14)
+#define MICROPY_HW_FMC_D15     (pyb_pin_FMC_D15)
+#define MICROPY_HW_FMC_D16     (pyb_pin_FMC_D16)
+#define MICROPY_HW_FMC_D17     (pyb_pin_FMC_D17)
+#define MICROPY_HW_FMC_D18     (pyb_pin_FMC_D18)
+#define MICROPY_HW_FMC_D19     (pyb_pin_FMC_D19)
+#define MICROPY_HW_FMC_D20     (pyb_pin_FMC_D20)
+#define MICROPY_HW_FMC_D21     (pyb_pin_FMC_D21)
+#define MICROPY_HW_FMC_D22     (pyb_pin_FMC_D22)
+#define MICROPY_HW_FMC_D23     (pyb_pin_FMC_D23)
+#define MICROPY_HW_FMC_D24     (pyb_pin_FMC_D24)
+#define MICROPY_HW_FMC_D25     (pyb_pin_FMC_D25)
+#define MICROPY_HW_FMC_D26     (pyb_pin_FMC_D26)
+#define MICROPY_HW_FMC_D27     (pyb_pin_FMC_D27)
+#define MICROPY_HW_FMC_D28     (pyb_pin_FMC_D28)
+#define MICROPY_HW_FMC_D29     (pyb_pin_FMC_D29)
+#define MICROPY_HW_FMC_D30     (pyb_pin_FMC_D30)
+#define MICROPY_HW_FMC_D31     (pyb_pin_FMC_D31)
+#endif
diff --git a/ports/stm32/boards/STM32F769DISC/pins.csv b/ports/stm32/boards/STM32F769DISC/pins.csv
index e68ed9536..6b6308c9a 100644
--- a/ports/stm32/boards/STM32F769DISC/pins.csv
+++ b/ports/stm32/boards/STM32F769DISC/pins.csv
@@ -57,3 +57,60 @@ UART5_TX,PC12
 UART5_RX,PD2
 CAN2_TX,PB13
 CAN2_RX,PB12
+FMC_SDCKE0,PH2
+FMC_SDNE0,PH3
+FMC_SDCLK,PG8
+FMC_SDNCAS,PG15
+FMC_SDNRAS,PF11
+FMC_SDNWE,PH5
+FMC_BA0,PG4
+FMC_BA1,PG5
+FMC_NBL0,PE0
+FMC_NBL1,PE1
+FMC_NBL2,PI4
+FMC_NBL3,PI5
+FMC_A0,PF0
+FMC_A1,PF1
+FMC_A2,PF2
+FMC_A3,PF3
+FMC_A4,PF4
+FMC_A5,PF5
+FMC_A6,PF12
+FMC_A7,PF13
+FMC_A8,PF14
+FMC_A9,PF15
+FMC_A10,PG0
+FMC_A11,PG1
+FMC_A12,PG2
+FMC_D0,PD14
+FMC_D1,PD15
+FMC_D2,PD0
+FMC_D3,PD1
+FMC_D4,PE7
+FMC_D5,PE8
+FMC_D6,PE9
+FMC_D7,PE10
+FMC_D8,PE11
+FMC_D9,PE12
+FMC_D10,PE13
+FMC_D11,PE14
+FMC_D12,PE15
+FMC_D13,PD8
+FMC_D14,PD9
+FMC_D15,PD10
+FMC_D16,PH8
+FMC_D17,PH9
+FMC_D18,PH10
+FMC_D19,PH11
+FMC_D20,PH12
+FMC_D21,PH13
+FMC_D22,PH14
+FMC_D23,PH15
+FMC_D24,PI0
+FMC_D25,PI1
+FMC_D26,PI2
+FMC_D27,PI3
+FMC_D28,PI6
+FMC_D29,PI7
+FMC_D30,PI9
+FMC_D31,PI10
diff --git a/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h b/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h
index ff968bca9..159339067 100644
--- a/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h
+++ b/ports/stm32/boards/STM32F769DISC/stm32f7xx_hal_conf.h
@@ -65,7 +65,7 @@
 /* #define HAL_NAND_MODULE_ENABLED */
 /* #define HAL_NOR_MODULE_ENABLED */
 /* #define HAL_SRAM_MODULE_ENABLED */
-/* #define HAL_SDRAM_MODULE_ENABLED */
+#define HAL_SDRAM_MODULE_ENABLED
 /* #define HAL_HASH_MODULE_ENABLED */
 #define HAL_GPIO_MODULE_ENABLED
 #define HAL_I2C_MODULE_ENABLED