diff options
| author | Dave Hylands <dhylands@gmail.com> | 2015-11-24 10:22:30 -0800 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2015-11-25 08:03:44 +0000 |
| commit | c8437f97ae1b9849bbb8e3abbf82a832cc901622 (patch) | |
| tree | c8c89037ff837be798bbcbaba37da815dd0fba17 | |
| parent | 90202b4c0de9f38c69b0cedc659d62432e2168e8 (diff) | |
stmhal: Increase the priority of UART IRQ.
The UARTs have no FIFOs, so if interrupts are disabled
for more than a character time (10 usec at 1 Mbit/sec)
then characters get dropped.
The overhead for handling a UART ISR is about 0.5 usec,
so even at baud rates of 1 Mbit/sec this only corresponds
to about 5% of the CPU. Lower baud rates will have less
of an impact.
| -rw-r--r-- | stmhal/irq.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/stmhal/irq.h b/stmhal/irq.h index 429e6faa1..7ebf70e10 100644 --- a/stmhal/irq.h +++ b/stmhal/irq.h @@ -64,9 +64,14 @@ MP_DECLARE_CONST_FUN_OBJ(pyb_enable_irq_obj); //#def IRQ_PRI_SYSTICK 0 //#def IRQ_SUBPRI_SYSTICK 0 +// The UARTs have no FIFOs, so if they don't get serviced quickly then characters +// get dropped. The handling for each character only consumes about 0.5 usec +#define IRQ_PRI_UART 1 +#define IRQ_SUBPRI_UART 0 + // Flash IRQ must be higher priority than interrupts of all those components // that rely on the flash storage. -#define IRQ_PRI_FLASH 1 +#define IRQ_PRI_FLASH 2 #define IRQ_SUBPRI_FLASH 0 // SDIO must be higher priority than DMA for SDIO DMA transfers to work. @@ -93,9 +98,6 @@ MP_DECLARE_CONST_FUN_OBJ(pyb_enable_irq_obj); #define IRQ_PRI_CAN 7 #define IRQ_SUBPRI_CAN 0 -#define IRQ_PRI_UART 13 -#define IRQ_SUBPRI_UART 0 - // Interrupt priority for non-special timers. #define IRQ_PRI_TIMX 14 #define IRQ_SUBPRI_TIMX 0 |