alif: Integrate cyw43 WLAN driver.

Signed-off-by: Damien George <damien@micropython.org>

8 files changed, 323 insertions, 1 deletions

diff --git a/ports/alif/alif.mk b/ports/alif/alif.mk
index e21fe74c4..179df67a5 100644
--- a/ports/alif/alif.mk
+++ b/ports/alif/alif.mk
@@ -115,6 +115,7 @@ SRC_O += \
 
 SRC_C = \
 	alif_flash.c \
+	cyw43_port_spi.c \
 	fatfs_port.c \
 	machine_pin.c \
 	machine_i2c.c \
@@ -196,12 +197,12 @@ ALIF_SRC_C += $(addprefix $(ALIF_DFP_REL_TOP)/,\
 	Device/core/$(MCU_CORE)/source/startup_$(MCU_CORE).c \
 	drivers/source/adc.c \
 	drivers/source/i2c.c \
-	drivers/source/spi.c \
 	drivers/source/mhu_driver.c \
 	drivers/source/mhu_receiver.c \
 	drivers/source/mhu_sender.c \
 	drivers/source/mram.c \
 	drivers/source/pinconf.c \
+	drivers/source/spi.c \
 	drivers/source/uart.c \
 	drivers/source/utimer.c \
 	ospi_xip/source/ospi/ospi_drv.c \
diff --git a/ports/alif/cyw43_configport.h b/ports/alif/cyw43_configport.h
new file mode 100644
index 000000000..b7e4ad702
--- /dev/null
+++ b/ports/alif/cyw43_configport.h
@@ -0,0 +1,123 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ALIF_CYW43_CONFIGPORT_H
+#define MICROPY_INCLUDED_ALIF_CYW43_CONFIGPORT_H
+
+// The board-level config will be included here, so it can set some CYW43 values.
+#include "py/mpconfig.h"
+#include "py/mperrno.h"
+#include "py/mphal.h"
+#include "py/runtime.h"
+#include "extmod/modnetwork.h"
+#include "pendsv.h"
+
+#ifndef static_assert
+#define static_assert(expr, msg)        typedef int static_assert_##__LINE__[(expr) ? 1 : -1]
+#endif
+
+#define CYW43_USE_SPI                   (1)
+#define CYW43_LWIP                      (1)
+#define CYW43_USE_STATS                 (0)
+#define CYW43_PRINTF(...)               mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+
+#if 0
+#define CYW43_VERBOSE_DEBUG             (1)
+#define CYW43_VDEBUG(...)               mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+#define CYW43_DEBUG(...)                mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+#define CYW43_INFO(...)                 mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+#define CYW43_WARN(...)                 mp_printf(MP_PYTHON_PRINTER, __VA_ARGS__)
+#endif
+
+#define CYW43_IOCTL_TIMEOUT_US          (1000000)
+#define CYW43_SLEEP_MAX                 (50)
+#define CYW43_NETUTILS                  (1)
+#define CYW43_CLEAR_SDIO_INT            (1)
+
+#define CYW43_EPERM                     MP_EPERM // Operation not permitted
+#define CYW43_EIO                       MP_EIO // I/O error
+#define CYW43_EINVAL                    MP_EINVAL // Invalid argument
+#define CYW43_ETIMEDOUT                 MP_ETIMEDOUT // Connection timed out
+
+#define CYW43_THREAD_ENTER              MICROPY_PY_LWIP_ENTER
+#define CYW43_THREAD_EXIT               MICROPY_PY_LWIP_EXIT
+#define CYW43_THREAD_LOCK_CHECK
+
+#define CYW43_HOST_NAME                 mod_network_hostname_data
+
+#define CYW43_SDPCM_SEND_COMMON_WAIT    __WFE()
+#define CYW43_DO_IOCTL_WAIT             // __WFE()
+#define CYW43_EVENT_POLL_HOOK           mp_event_handle_nowait()
+
+#define CYW43_ARRAY_SIZE(a)             MP_ARRAY_SIZE(a)
+
+#define CYW43_HAL_PIN_MODE_INPUT        MP_HAL_PIN_MODE_INPUT
+#define CYW43_HAL_PIN_MODE_OUTPUT       MP_HAL_PIN_MODE_OUTPUT
+#define CYW43_HAL_PIN_PULL_NONE         0
+
+#define CYW43_HAL_MAC_WLAN0             MP_HAL_MAC_WLAN0
+
+#define cyw43_hal_ticks_us              mp_hal_ticks_us
+#define cyw43_hal_ticks_ms              mp_hal_ticks_ms
+
+#define cyw43_hal_pin_obj_t             mp_hal_pin_obj_t
+#define cyw43_hal_pin_read              mp_hal_pin_read
+#define cyw43_hal_pin_low               mp_hal_pin_low
+#define cyw43_hal_pin_high              mp_hal_pin_high
+
+#define cyw43_hal_get_mac               mp_hal_get_mac
+#define cyw43_hal_get_mac_ascii         mp_hal_get_mac_ascii
+#define cyw43_hal_generate_laa_mac      mp_hal_generate_laa_mac
+
+#define CYW43_PIN_WL_REG_ON             pin_WL_REG_ON
+#define CYW43_PIN_WL_IRQ                pin_WL_IRQ
+
+#define cyw43_schedule_internal_poll_dispatch(func) pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, func)
+
+void cyw43_post_poll_hook(void);
+
+static inline void cyw43_delay_us(uint32_t us) {
+    uint32_t start = mp_hal_ticks_us();
+    while (mp_hal_ticks_us() - start < us) {
+    }
+}
+
+static inline void cyw43_delay_ms(uint32_t ms) {
+    mp_hal_delay_ms(ms);
+}
+
+static inline void cyw43_hal_pin_config(mp_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, uint32_t alt) {
+    if (mode == MP_HAL_PIN_MODE_INPUT) {
+        mp_hal_pin_input(pin);
+    } else {
+        mp_hal_pin_output(pin);
+    }
+}
+
+static inline void cyw43_hal_pin_config_irq_falling(mp_hal_pin_obj_t pin, bool enable) {
+    mp_hal_pin_config_irq_falling(pin, enable);
+}
+
+#endif // MICROPY_INCLUDED_ALIF_CYW43_CONFIGPORT_H
diff --git a/ports/alif/cyw43_port_spi.c b/ports/alif/cyw43_port_spi.c
new file mode 100644
index 000000000..84d84b0e1
--- /dev/null
+++ b/ports/alif/cyw43_port_spi.c
@@ -0,0 +1,150 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024-2025 OpenMV LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#if MICROPY_PY_NETWORK_CYW43
+
+#include "lib/cyw43-driver/src/cyw43.h"
+#include "lib/cyw43-driver/src/cyw43_internal.h"
+#include "lib/cyw43-driver/src/cyw43_spi.h"
+
+#include "spi.h"
+#include "sys_ctrl_spi.h"
+
+// CYW43 is connected to SPI3.
+#define HW_SPI ((SPI_Type *)SPI3_BASE)
+#define SPI_BAUDRATE (16000000)
+#define SPI_RX_FIFO_SIZE (16)
+
+// WL_IRQ is on P9_6.
+#define WL_IRQ_IRQN (GPIO9_IRQ6_IRQn)
+#define WL_IRQ_HANDLER GPIO9_IRQ6Handler
+
+// Must run at IRQ priority above PendSV so it can wake cyw43-driver when PendSV is disabled.
+void WL_IRQ_HANDLER(void) {
+    if (gpio_read_int_rawstatus(pin_WL_IRQ->gpio, pin_WL_IRQ->pin)) {
+        gpio_interrupt_eoi(pin_WL_IRQ->gpio, pin_WL_IRQ->pin);
+        pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, cyw43_poll);
+        __SEV();
+    }
+}
+
+static void spi_bus_init(void) {
+    // Configure pins.
+    mp_hal_pin_output(pin_WL_CS);
+    mp_hal_pin_high(pin_WL_CS);
+    // NOTE: Alif recommends enabled input read for all SPI pins.
+    mp_hal_pin_config(pin_WL_SCLK, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
+    mp_hal_pin_config(pin_WL_MOSI, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
+    mp_hal_pin_config(pin_WL_MISO, MP_HAL_PIN_MODE_ALT, MP_HAL_PIN_PULL_NONE, MP_HAL_PIN_SPEED_HIGH, MP_HAL_PIN_DRIVE_8MA, MP_HAL_PIN_ALT_SPI, true);
+
+    // Starts out clock_polarity=1, clock_phase=0.
+    spi_mode_master(HW_SPI);
+    spi_set_bus_speed(HW_SPI, SPI_BAUDRATE, GetSystemAHBClock());
+    spi_set_mode(HW_SPI, SPI_MODE_2);
+    spi_set_protocol(HW_SPI, SPI_PROTO_SPI);
+    spi_set_dfs(HW_SPI, 8);
+    spi_set_tmod(HW_SPI, SPI_TMOD_TX_AND_RX);
+    spi_control_ss(HW_SPI, 0, SPI_SS_STATE_ENABLE);
+}
+
+int cyw43_spi_init(cyw43_int_t *self) {
+    spi_bus_init();
+
+    // Configure IRQ for WL_IRQ (active low input).
+    NVIC_SetPriority(WL_IRQ_IRQN, IRQ_PRI_CYW43);
+    NVIC_ClearPendingIRQ(WL_IRQ_IRQN);
+    NVIC_EnableIRQ(WL_IRQ_IRQN);
+
+    return 0;
+}
+
+void cyw43_spi_deinit(cyw43_int_t *self) {
+    // Disable clock, SS and SPI.
+    spi_mask_interrupts(HW_SPI);
+    spi_control_ss(HW_SPI, 0, 0);
+    spi_disable(HW_SPI);
+
+    // Disable SPI IRQ.
+    NVIC_DisableIRQ(WL_IRQ_IRQN);
+    NVIC_ClearPendingIRQ(WL_IRQ_IRQN);
+}
+
+void cyw43_spi_gpio_setup(void) {
+}
+
+void cyw43_spi_reset(void) {
+}
+
+void cyw43_spi_set_polarity(cyw43_int_t *self, int pol) {
+    (void)self;
+
+    if (pol == 0) {
+        spi_set_mode(HW_SPI, SPI_MODE_0);
+    } else {
+        spi_set_mode(HW_SPI, SPI_MODE_2);
+    }
+}
+
+// tx must not be NULL.
+// rx_len must be 0, or the same as tx_len.
+int cyw43_spi_transfer(cyw43_int_t *self, const uint8_t *tx, size_t tx_len, uint8_t *rx, size_t rx_len) {
+    (void)self;
+
+    if (tx_len == 0 && rx_len == 0) {
+        return 0;
+    }
+
+    mp_hal_pin_low(pin_WL_CS);
+
+    // Must read the same amount of data that is written out to SPI.
+    rx_len = tx_len;
+
+    while (tx_len || rx_len) {
+        // Only add data to the TX FIFO if:
+        // - there's data to add
+        // - and TX is not ahead of RX by more than the RX FIFO size
+        // - and there's space in the TX FIFO
+        if (tx_len && tx_len + SPI_RX_FIFO_SIZE > rx_len && (HW_SPI->SPI_SR & SPI_SR_TFNF) != 0) {
+            HW_SPI->SPI_DR[0] = *tx++;
+            --tx_len;
+        }
+
+        // Take data from the RX FIFO and store it into the output buffer (if given).
+        if (rx_len && (HW_SPI->SPI_SR & SPI_SR_RFNE) != 0) {
+            uint8_t data = HW_SPI->SPI_DR[0];
+            if (rx != NULL) {
+                *rx++ = data;
+            }
+            --rx_len;
+        }
+    }
+
+    mp_hal_pin_high(pin_WL_CS);
+
+    return 0;
+}
+
+#endif
diff --git a/ports/alif/irq.h b/ports/alif/irq.h
index ed454adcb..08b8ef808 100644
--- a/ports/alif/irq.h
+++ b/ports/alif/irq.h
@@ -49,6 +49,7 @@
 #define IRQ_PRI_HWSEM           NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 8, 0)
 #define IRQ_PRI_GPU             NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 10, 0)
 #define IRQ_PRI_RTC             NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 100, 0)
+#define IRQ_PRI_CYW43           NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 126, 0)
 #define IRQ_PRI_PENDSV          NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 127, 0)
 
 // these states correspond to values from query_irq, enable_irq and disable_irq
diff --git a/ports/alif/main.c b/ports/alif/main.c
index 15a77348c..3bff8cf4a 100644
--- a/ports/alif/main.c
+++ b/ports/alif/main.c
@@ -47,6 +47,9 @@
 #include "lwip/init.h"
 #include "lwip/apps/mdns.h"
 #endif
+#if MICROPY_PY_NETWORK_CYW43
+#include "lib/cyw43-driver/src/cyw43.h"
+#endif
 
 extern uint8_t __StackTop, __StackLimit;
 extern uint8_t __GcHeapStart, __GcHeapEnd;
@@ -100,6 +103,18 @@ int main(void) {
     mod_network_lwip_init();
     #endif
 
+    #if MICROPY_PY_NETWORK_CYW43
+    {
+        cyw43_init(&cyw43_state);
+        uint8_t buf[8];
+        memcpy(&buf[0], "ALIF", 4);
+        mp_hal_get_mac_ascii(MP_HAL_MAC_WLAN0, 8, 4, (char *)&buf[4]);
+        cyw43_wifi_ap_set_ssid(&cyw43_state, 8, buf);
+        cyw43_wifi_ap_set_auth(&cyw43_state, CYW43_AUTH_WPA2_AES_PSK);
+        cyw43_wifi_ap_set_password(&cyw43_state, 8, (const uint8_t *)"alif0123");
+    }
+    #endif
+
     for (;;) {
         // Initialise MicroPython runtime.
         mp_init();
diff --git a/ports/alif/mpconfigport.h b/ports/alif/mpconfigport.h
index a437c1385..76b603027 100644
--- a/ports/alif/mpconfigport.h
+++ b/ports/alif/mpconfigport.h
@@ -155,6 +155,21 @@
 #define MICROPY_FATFS_MAX_SS                    (MICROPY_HW_FLASH_BLOCK_SIZE_BYTES)
 #endif
 
+#if MICROPY_PY_NETWORK_CYW43
+extern const struct _mp_obj_type_t mp_network_cyw43_type;
+#define MICROPY_HW_NIC_CYW43 { MP_ROM_QSTR(MP_QSTR_WLAN), MP_ROM_PTR(&mp_network_cyw43_type) },
+#else
+#define MICROPY_HW_NIC_CYW43
+#endif
+
+#ifndef MICROPY_BOARD_NETWORK_INTERFACES
+#define MICROPY_BOARD_NETWORK_INTERFACES
+#endif
+
+#define MICROPY_PORT_NETWORK_INTERFACES \
+    MICROPY_HW_NIC_CYW43 \
+    MICROPY_BOARD_NETWORK_INTERFACES \
+
 #define MP_STATE_PORT MP_STATE_VM
 
 // Miscellaneous settings
diff --git a/ports/alif/mpnetworkport.c b/ports/alif/mpnetworkport.c
index 312fadf08..40def7f7f 100644
--- a/ports/alif/mpnetworkport.c
+++ b/ports/alif/mpnetworkport.c
@@ -32,6 +32,10 @@
 #include "shared/runtime/softtimer.h"
 #include "lwip/timeouts.h"
 
+#if MICROPY_PY_NETWORK_CYW43
+#include "lib/cyw43-driver/src/cyw43.h"
+#endif
+
 // Poll lwIP every 64ms by default
 #define LWIP_TICK_RATE_MS 64
 
@@ -50,6 +54,16 @@ static void mp_network_soft_timer_callback(soft_timer_entry_t *self) {
     #if LWIP_NETIF_LOOPBACK
     netif_poll_all();
     #endif
+
+    #if MICROPY_PY_NETWORK_CYW43
+    if (cyw43_poll) {
+        if (cyw43_sleep != 0) {
+            if (--cyw43_sleep == 0) {
+                cyw43_poll();
+            }
+        }
+    }
+    #endif
 }
 
 void mod_network_lwip_init(void) {
diff --git a/ports/alif/pendsv.h b/ports/alif/pendsv.h
index 43a4b7a85..17d7e82df 100644
--- a/ports/alif/pendsv.h
+++ b/ports/alif/pendsv.h
@@ -34,6 +34,9 @@
 
 enum {
     PENDSV_DISPATCH_SOFT_TIMER,
+    #if MICROPY_PY_NETWORK_CYW43
+    PENDSV_DISPATCH_CYW43,
+    #endif
     MICROPY_BOARD_PENDSV_ENTRIES
     PENDSV_DISPATCH_MAX
 };