diff options
| author | Yuuki NAGAO <wf.yn386@gmail.com> | 2023-07-08 10:46:01 +0900 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2023-07-13 12:39:01 +1000 |
| commit | de8035b51070f14b3af32870fb8eede97ddb4215 (patch) | |
| tree | e4fb03e21d75daeb49a469a95a18cc4a0fa51418 | |
| parent | ec9ea97413c6091c101c3ab10207ae4daf1c56db (diff) | |
stm32/adc: Fix ADC clock prescaler for G4 MCUs.
For STM32G4, ADC clock frequency should be equal or less than 60MHz.
To satisfy this specification, ADC clock prescaler should be equal or
greater than 4 (For example, NUCLEO_G474RE runs 170MHz).
In addition, to obtain accurate internal channel value,
the ADC clock prescaler is set to 16 because vbat needs at least 12us
(16/170*247.5=23.3us).
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
| -rw-r--r-- | ports/stm32/adc.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/ports/stm32/adc.c b/ports/stm32/adc.c index 7c51a8b39..e2eb5f7e5 100644 --- a/ports/stm32/adc.c +++ b/ports/stm32/adc.c @@ -344,7 +344,11 @@ STATIC void adcx_init_periph(ADC_HandleTypeDef *adch, uint32_t resolution) { adch->Init.DataAlign = ADC_DATAALIGN_RIGHT; adch->Init.DMAContinuousRequests = DISABLE; #elif defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32L4) || defined(STM32WB) + #if defined(STM32G4) + adch->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV16; + #else adch->Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + #endif adch->Init.ScanConvMode = ADC_SCAN_DISABLE; adch->Init.LowPowerAutoWait = DISABLE; adch->Init.Overrun = ADC_OVR_DATA_PRESERVED; |