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| author | Rami Ali <flowergrass@users.noreply.github.com> | 2016-12-06 10:56:06 +1100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2016-12-07 17:30:44 +1100 |
| commit | e1c6ed634f4387a6c9d7e132ed7d0bb245a9618a (patch) | |
| tree | 1b3a236a33e309a6c27b5f28114376fc8fb1e668 | |
| parent | b9741cd8f84a2f49e3ea00382bfa71d994bc83ff (diff) | |
stmhal: Port of f4 hal commit c568a2b to updated f7 hal.
| -rw-r--r-- | stmhal/hal/f7/src/stm32f7xx_hal_rcc.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/stmhal/hal/f7/src/stm32f7xx_hal_rcc.c b/stmhal/hal/f7/src/stm32f7xx_hal_rcc.c index f8f51d01f..4dd70c7fc 100644 --- a/stmhal/hal/f7/src/stm32f7xx_hal_rcc.c +++ b/stmhal/hal/f7/src/stm32f7xx_hal_rcc.c @@ -901,7 +901,12 @@ uint32_t HAL_RCC_GetSysClockFreq(void) if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI) { /* HSE used as PLL clock source */ - pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN))); + //pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN))); + // dpgeorge: Adjust the way the arithmetic is done so it retains + // precision for the case that pllm doesn't evenly divide HSE_VALUE. + // Must be sure not to overflow, so divide by 4 first. HSE_VALUE + // should be a multiple of 4 (being a multiple of 100 is enough). + pllvco = ((HSE_VALUE / 4) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN))) / pllm * 4; } else { |