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authorDamien George <damien.p.george@gmail.com>2019-03-01 16:15:14 +1100
committerDamien George <damien.p.george@gmail.com>2019-03-01 16:15:14 +1100
commitf8f2724297b2c3e87e074feddfac26f3ce46ae92 (patch)
treea08abf24eb41dc7971a92ef7424947b4d0c66029
parent47e551ba59b1bb8393b649b4a5f51f1c83d889b6 (diff)
stm32/qspi: Enable sample shift and disable timeout counter.
This makes the QSPI more robust, in particular the timeout counter should not be used with memory mapped mode (see F7 errata).
-rw-r--r--ports/stm32/qspi.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/ports/stm32/qspi.c b/ports/stm32/qspi.c
index 986206891..469858c68 100644
--- a/ports/stm32/qspi.c
+++ b/ports/stm32/qspi.c
@@ -55,8 +55,8 @@ void qspi_init(void) {
#if defined(QUADSPI_CR_DFM_Pos)
| 0 << QUADSPI_CR_DFM_Pos // dual-flash mode disabled
#endif
- | 0 << QUADSPI_CR_SSHIFT_Pos // no sample shift
- | 1 << QUADSPI_CR_TCEN_Pos // timeout counter enabled
+ | 1 << QUADSPI_CR_SSHIFT_Pos // do sample shift
+ | 0 << QUADSPI_CR_TCEN_Pos // timeout counter disabled (see F7 errata)
| 1 << QUADSPI_CR_EN_Pos // enable the peripheral
;
@@ -71,7 +71,6 @@ void qspi_memory_map(void) {
// Enable memory-mapped mode
QUADSPI->ABR = 0; // disable continuous read mode
- QUADSPI->LPTR = 100; // to tune
QUADSPI->CCR =
0 << QUADSPI_CCR_DDRM_Pos // DDR mode disabled
| 0 << QUADSPI_CCR_SIOO_Pos // send instruction every transaction