diff options
author | danicampora <danicampora@gmail.com> | 2015-03-15 10:05:15 +0100 |
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committer | danicampora <danicampora@gmail.com> | 2015-03-16 00:42:05 +0100 |
commit | 0d0646d915b51191ce55cbb2750e5422ee1766db (patch) | |
tree | 5beed462e80f529eee10a7cab2c9f45ae9999d16 /cc3200/hal/prcm.c | |
parent | dac79324b5a49a81435a9dafc389353a4fa8739b (diff) |
cc3200: Update HAL to SDK release version 1.1.0.
Diffstat (limited to 'cc3200/hal/prcm.c')
-rw-r--r-- | cc3200/hal/prcm.c | 91 |
1 files changed, 86 insertions, 5 deletions
diff --git a/cc3200/hal/prcm.c b/cc3200/hal/prcm.c index a7cab502f..2422680b5 100644 --- a/cc3200/hal/prcm.c +++ b/cc3200/hal/prcm.c @@ -104,9 +104,24 @@ //***************************************************************************** // Register Access and Updates // -// Tick of SCC has a resolution of 32768Hz. Therefore, scaling SCC value by 32 -// yields ~1 msec resolution. All operations of SCC in RTC context use ms unit. -//***************************************************************************** +// Tick of SCC has a resolution of 32768Hz, meaning 1 sec is equal to 32768 +// clock ticks. Ideal way of getting time in millisecond will involve floating +// point arithmetic (division by 32.768). To avoid this, we simply divide it by +// 32, which will give a range from 0 -1023(instead of 0-999). To use this +// output correctly we have to take care of this inaccuracy externally. +// following wrapper can be used to convert the value from cycles to +// millisecond: +// +// CYCLES_U16MS(cycles) ((cycles *1000)/ 1024), +// +// Similarly, before setting the value, it must be first converted (from ms to +// cycles). +// +// U16MS_CYCLES(msec) ((msec *1024)/1000) +// +// Note: There is a precision loss of 1 ms with the above scheme. +// +// #define SCC_U64MSEC_GET() (MAP_PRCMSlowClkCtrGet() >> 5) #define SCC_U64MSEC_MATCH_SET(u64Msec) (MAP_PRCMSlowClkCtrMatchSet(u64Msec << 5)) #define SCC_U64MSEC_MATCH_GET() (MAP_PRCMSlowClkCtrMatchGet() >> 5) @@ -683,14 +698,24 @@ void PRCMLPDSRestoreInfoSet(unsigned long ulStackPtr, unsigned long ulProgCntr) //! \sa PRCMLPDSRestoreInfoSet(). //! //! \return None. +//! +//! \note The Test Power Domain is shutdown whenever the system +//! enters LPDS (by default). In order to avoid this and allow for +//! connecting back the debugger after waking up from LPDS, +//! the macro KEEP_TESTPD_ALIVE has to be defined while building the library. +//! This is recommended for development purposes only as it adds to +//! the current consumption of the system. +//! // //***************************************************************************** void PRCMLPDSEnter(void) { +#ifndef DEBUG // // Disable TestPD // HWREG(0x4402E168) |= (1<<9); +#endif // // Set bandgap duty cycle to 1 @@ -700,8 +725,7 @@ void PRCMLPDSEnter(void) // // Request LPDS // - HWREG(ARCM_BASE + APPS_RCM_O_APPS_LPDS_REQ) - = APPS_RCM_APPS_LPDS_REQ_APPS_LPDS_REQ; + HWREG(ARCM_BASE + APPS_RCM_O_APPS_LPDS_REQ) = APPS_RCM_APPS_LPDS_REQ_APPS_LPDS_REQ; __asm(" nop\n" " nop\n" @@ -1848,6 +1872,63 @@ void PRCMHIBRegWrite(unsigned long ulRegAddr, unsigned long ulValue) //***************************************************************************** // +//! \param ulDivider is clock frequency divider value +//! \param ulWidth is the width of the high pulse +//! +//! This function sets the input frequency for camera module. +//! +//! The frequency is calculated as follows: +//! +//! f_out = 240MHz/ulDivider; +//! +//! The parameter \e ulWidth sets the width of the high pulse. +//! +//! For e.g.: +//! +//! ulDivider = 4; +//! ulWidth = 2; +//! +//! f_out = 30 MHz and 50% duty cycle +//! +//! And, +//! +//! ulDivider = 4; +//! ulWidth = 1; +//! +//! f_out = 30 MHz and 25% duty cycle +//! +//! \return 0 on success, 1 on error +// +//***************************************************************************** +unsigned long PRCMCameraFreqSet(unsigned char ulDivider, unsigned char ulWidth) +{ + if(ulDivider > ulWidth && ulWidth != 0 ) + { + // + // Set the hifh pulse width + // + HWREG(ARCM_BASE + + APPS_RCM_O_CAMERA_CLK_GEN) = (((ulWidth & 0x07) -1) << 8); + + // + // Set the low pulse width + // + HWREG(ARCM_BASE + + APPS_RCM_O_CAMERA_CLK_GEN) = ((ulDivider - ulWidth - 1) & 0x07); + // + // Return success + // + return 0; + } + + // + // Success; + // + return 1; +} + +//***************************************************************************** +// // Close the Doxygen group. //! @} // |