summaryrefslogtreecommitdiff
path: root/docs/mimxrt/quickref.rst
diff options
context:
space:
mode:
authorrobert-hh <robert@hammelrath.com>2022-07-31 11:09:57 +0200
committerDamien George <damien@micropython.org>2022-09-13 18:35:48 +1000
commit0f048a5a2a4cb239784cd152c9cd3fa0deb86db7 (patch)
tree38e03906301b47ae189d76492d4e6558062e6d9f /docs/mimxrt/quickref.rst
parent8e542251405d780f7aa0d6c9abaa30282dd360d5 (diff)
mimxrt/machine_spi: Allow a setting of -1 for cs in the constructor.
In that case, no Pin will be configured for the CS signal, even if it is internally still generated. That setting allows to use any pin for CS, which then must be controlled by the Python script. Also make the default cs=-1 to match other ports (software CS).
Diffstat (limited to 'docs/mimxrt/quickref.rst')
-rw-r--r--docs/mimxrt/quickref.rst8
1 files changed, 7 insertions, 1 deletions
diff --git a/docs/mimxrt/quickref.rst b/docs/mimxrt/quickref.rst
index 0a14c632a..c75fe60c8 100644
--- a/docs/mimxrt/quickref.rst
+++ b/docs/mimxrt/quickref.rst
@@ -301,13 +301,19 @@ There are up to four hardware SPI channels that allow faster transmission
rates (up to 30Mhz). Hardware SPI is accessed via the
:ref:`machine.SPI <machine.SPI>` class and has the same methods as software SPI above::
- from machine import SPI
+ from machine import SPI, Pin
spi = SPI(0, 10000000)
+ cs_pin = Pin(6, Pin.OUT, value=1)
+ cs_pin(0)
spi.write('Hello World')
+ cs_pin(1)
For the assignment of Pins to SPI signals, refer to
:ref:`Hardware SPI pinout <mimxrt_spi_pinout>`.
+The keyword option cs=n can be used to enable the cs pin 0 or 1 for an automatic cs signal. The
+default is cs=-1. Using cs=-1 the automatic cs signal is not created.
+In that case, cs has to be set by the script. Clearing that assignment requires a power cycle.
Notes: