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| author | Damien George <damien.p.george@gmail.com> | 2019-12-04 15:02:54 +1100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2019-12-04 15:02:54 +1100 |
| commit | 90c524c1141ed9ad8fa882dba6f36199a7768e32 (patch) | |
| tree | 0ee0799df23cb231c47de6f0b885d6f124e448c6 /docs/wipy/quickref.rst | |
| parent | 40cc7ec677e962c47db567479e42c27ed8911ff6 (diff) | |
docs: Remove spaces on lines that are empty.
Diffstat (limited to 'docs/wipy/quickref.rst')
| -rw-r--r-- | docs/wipy/quickref.rst | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/docs/wipy/quickref.rst b/docs/wipy/quickref.rst index 6349676cf..a22ea45b5 100644 --- a/docs/wipy/quickref.rst +++ b/docs/wipy/quickref.rst @@ -62,7 +62,7 @@ Timer ``id``'s take values from 0 to 3.:: tim = Timer(0, mode=Timer.PERIODIC) tim_a = tim.channel(Timer.A, freq=1000) tim_a.freq(5) # 5 Hz - + p_out = Pin('GP2', mode=Pin.OUT) tim_a.irq(trigger=Timer.TIMEOUT, handler=lambda t: p_out.toggle()) @@ -75,7 +75,7 @@ See :ref:`machine.Pin <machine.Pin>` and :ref:`machine.Timer <machine.Timer>`. : # timer 1 in PWM mode and width must be 16 buts tim = Timer(1, mode=Timer.PWM, width=16) - + # enable channel A @1KHz with a 50.55% duty cycle tim_a = tim.channel(Timer.A, freq=1000, duty_cycle=5055) |