diff options
| author | Jon Rob <mr.jonrob@gmail.com> | 2020-06-08 06:29:43 +0000 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2020-06-17 00:03:33 +1000 |
| commit | 1678f417445703750e187b1b8a83c8c3e0e3796f (patch) | |
| tree | 155df1e2d308ce0582fdf4ecba647ed98e7b0a30 /ports/esp32/esp32_rmt.c | |
| parent | a51eef4471e01ee60d53ee184bc4feabf6ebd855 (diff) | |
esp32/esp32_rmt: Extend RMT to support carrier feature.
The ESP32 RMT peripheral has hardware support for a carrier frequency, and
this commit exposes it to Python with the keyword arguments carrier_freq
and carrier_duty_percent in the constructor. Example usage:
r = esp32.RMT(0, pin=Pin(2), clock_div=80, carrier_freq=38000, carrier_duty_percent=50)
Diffstat (limited to 'ports/esp32/esp32_rmt.c')
| -rw-r--r-- | ports/esp32/esp32_rmt.c | 30 |
1 files changed, 26 insertions, 4 deletions
diff --git a/ports/esp32/esp32_rmt.c b/ports/esp32/esp32_rmt.c index 25b7b3808..846c80d47 100644 --- a/ports/esp32/esp32_rmt.c +++ b/ports/esp32/esp32_rmt.c @@ -52,6 +52,8 @@ typedef struct _esp32_rmt_obj_t { uint8_t channel_id; gpio_num_t pin; uint8_t clock_div; + uint16_t carrier_duty_percent; + uint32_t carrier_freq; mp_uint_t num_items; rmt_item32_t *items; } esp32_rmt_obj_t; @@ -61,6 +63,8 @@ STATIC mp_obj_t esp32_rmt_make_new(const mp_obj_type_t *type, size_t n_args, siz { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = -1} }, { MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, { MP_QSTR_clock_div, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, // 100ns resolution + { MP_QSTR_carrier_duty_percent, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 50} }, + { MP_QSTR_carrier_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); @@ -68,6 +72,16 @@ STATIC mp_obj_t esp32_rmt_make_new(const mp_obj_type_t *type, size_t n_args, siz gpio_num_t pin_id = machine_pin_get_id(args[1].u_obj); mp_uint_t clock_div = args[2].u_int; + bool carrier_en = false; + mp_uint_t carrier_duty_percent = 0; + mp_uint_t carrier_freq = 0; + + if (args[4].u_int > 0) { + carrier_en = true; + carrier_duty_percent = args[3].u_int; + carrier_freq = args[4].u_int; + } + if (clock_div < 1 || clock_div > 255) { mp_raise_ValueError(MP_ERROR_TEXT("clock_div must be between 1 and 255")); } @@ -77,6 +91,8 @@ STATIC mp_obj_t esp32_rmt_make_new(const mp_obj_type_t *type, size_t n_args, siz self->channel_id = channel_id; self->pin = pin_id; self->clock_div = clock_div; + self->carrier_duty_percent = carrier_duty_percent; + self->carrier_freq = carrier_freq; rmt_config_t config; config.rmt_mode = RMT_MODE_TX; @@ -85,11 +101,11 @@ STATIC mp_obj_t esp32_rmt_make_new(const mp_obj_type_t *type, size_t n_args, siz config.mem_block_num = 1; config.tx_config.loop_en = 0; - config.tx_config.carrier_en = 0; + config.tx_config.carrier_en = carrier_en; config.tx_config.idle_output_en = 1; config.tx_config.idle_level = 0; - config.tx_config.carrier_duty_percent = 0; - config.tx_config.carrier_freq_hz = 0; + config.tx_config.carrier_duty_percent = self->carrier_duty_percent; + config.tx_config.carrier_freq_hz = self->carrier_freq; config.tx_config.carrier_level = 1; config.clk_div = self->clock_div; @@ -103,8 +119,14 @@ STATIC mp_obj_t esp32_rmt_make_new(const mp_obj_type_t *type, size_t n_args, siz STATIC void esp32_rmt_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { esp32_rmt_obj_t *self = MP_OBJ_TO_PTR(self_in); if (self->pin != -1) { - mp_printf(print, "RMT(channel=%u, pin=%u, source_freq=%u, clock_div=%u)", + mp_printf(print, "RMT(channel=%u, pin=%u, source_freq=%u, clock_div=%u", self->channel_id, self->pin, APB_CLK_FREQ, self->clock_div); + if (self->carrier_freq > 0) { + mp_printf(print, ", carrier_freq=%u, carrier_duty_percent=%u)", + self->carrier_freq, self->carrier_duty_percent); + } else { + mp_printf(print, ")"); + } } else { mp_printf(print, "RMT()"); } |
