diff options
| author | Damien George <damien@micropython.org> | 2021-11-29 13:10:36 +1100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2021-11-29 13:20:35 +1100 |
| commit | 35e70c1698047170f9fb8b1edc65a7f7125f267f (patch) | |
| tree | e4954102f2a11667d2973dc6c6aa088eb34adc2f /ports/stm32/flashbdev.c | |
| parent | 84969194a18ec015d2508db14be66457f123f687 (diff) | |
stm32/boards: Convert F413,F439,H743,L4xx,WB55 to new flash FS config.
Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'ports/stm32/flashbdev.c')
| -rw-r--r-- | ports/stm32/flashbdev.c | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/ports/stm32/flashbdev.c b/ports/stm32/flashbdev.c index ce535d0c0..946a9d8cc 100644 --- a/ports/stm32/flashbdev.c +++ b/ports/stm32/flashbdev.c @@ -61,15 +61,6 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k #define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 #define FLASH_MEM_SEG1_NUM_BLOCKS (128) // sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k -#elif defined(STM32F413xx) - -#define CACHE_MEM_START_ADDR (0x10000000) // SRAM2 data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of SRAM2 -#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (352) // sectors 1,2,3,4,5: 16k+16k+16k+64k+64k(of 128k)=176k -#define FLASH_MEM_SEG2_START_ADDR (0x08040000) // sector 6 -#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 6: 64k(of 128k). Filesystem 176K + 64K = 240K - #elif defined(STM32F427xx) || defined(STM32F429xx) #define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k @@ -77,15 +68,6 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k #define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 #define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k -#elif defined(STM32F439xx) - -#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM -#define FLASH_MEM_SEG1_START_ADDR (0x08100000) // sector 12 -#define FLASH_MEM_SEG1_NUM_BLOCKS (384) // sectors 12,13,14,15,16,17: 16k+16k+16k+16k+64k+64k(of 128k)=192k -#define FLASH_MEM_SEG2_START_ADDR (0x08140000) // sector 18 -#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 18: 64k(of 128k) - #elif defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F732xx) || defined(STM32F733xx) #define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k @@ -102,36 +84,6 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k #define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1 #define FLASH_MEM_SEG1_NUM_BLOCKS (192) // sectors 1,2,3: 32k+32k+32=96k -#elif defined(STM32H743xx) - -// The STM32H743 flash sectors are 128K, with locations defined in the linker script -extern uint8_t _flash_fs_start; -extern uint8_t _flash_fs_end; -extern uint8_t _ram_fs_cache_start[]; -extern uint8_t _ram_fs_cache_end[]; - -#define CACHE_MEM_START_ADDR ((uintptr_t)&_ram_fs_cache_start[0]) -#define FLASH_SECTOR_SIZE_MAX (&_ram_fs_cache_end[0] - &_ram_fs_cache_start[0]) -#define FLASH_MEM_SEG1_START_ADDR ((long)&_flash_fs_start) -#define FLASH_MEM_SEG1_NUM_BLOCKS ((&_flash_fs_end - &_flash_fs_start) / 512) - -#elif defined(STM32L432xx) || \ - defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L496xx) || \ - defined(STM32WB) - -// The STM32L4xx doesn't have CCRAM, so we use SRAM2 for this, although -// actual location and size is defined by the linker script. -extern uint8_t _flash_fs_start; -extern uint8_t _flash_fs_end; -extern uint8_t _ram_fs_cache_start[]; // size determined by linker file -extern uint8_t _ram_fs_cache_end[]; - -#define CACHE_MEM_START_ADDR ((uintptr_t)&_ram_fs_cache_start[0]) -#define FLASH_SECTOR_SIZE_MAX (&_ram_fs_cache_end[0] - &_ram_fs_cache_start[0]) // 2k max -#define FLASH_MEM_SEG1_START_ADDR ((long)&_flash_fs_start) -#define FLASH_MEM_SEG1_NUM_BLOCKS ((&_flash_fs_end - &_flash_fs_start) / 512) - #else // Generic configuration where the linker script specifies flash storage and RAM cache locations. |
