diff options
| author | Chris Mason <c.mason@inchipdesign.com.au> | 2019-04-19 15:15:18 +1000 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2019-05-02 16:26:53 +1000 |
| commit | 1b956ec81701ad9ae36e8e0fd625eff32e3e2a3d (patch) | |
| tree | 225ba02e933b273d99fcddb1a02ec8c82ddc2367 /ports/stm32/flashbdev.c | |
| parent | a974f2dc6e45dc1fde88863df6b90dcaebf5bfe8 (diff) | |
stm32: Add support for F413 MCUs.
Includes:
- Support for CAN3.
- Support for UART9 and UART10.
- stm32f413xg.ld and stm32f413xh.ld linker scripts.
- stm32f413_af.csv alternate function mapping.
- startup_stm32f413xx.s because F413 has different interrupt vector table.
- Memory configuration with: 240K filesystem, 240K heap, 16K stack.
Diffstat (limited to 'ports/stm32/flashbdev.c')
| -rw-r--r-- | ports/stm32/flashbdev.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/ports/stm32/flashbdev.c b/ports/stm32/flashbdev.c index 0b95dcc4f..484fa1a1b 100644 --- a/ports/stm32/flashbdev.c +++ b/ports/stm32/flashbdev.c @@ -61,6 +61,15 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k #define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 #define FLASH_MEM_SEG1_NUM_BLOCKS (128) // sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k +#elif defined(STM32F413xx) + +#define CACHE_MEM_START_ADDR (0x10000000) // SRAM2 data RAM, 64k +#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of SRAM2 +#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 +#define FLASH_MEM_SEG1_NUM_BLOCKS (352) // sectors 1,2,3,4,5: 16k+16k+16k+64k+64k(of 128k)=176k +#define FLASH_MEM_SEG2_START_ADDR (0x08040000) // sector 6 +#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 6: 64k(of 128k). Filesystem 176K + 64K = 240K + #elif defined(STM32F429xx) #define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k |