diff options
| author | Yuuki NAGAO <wf.yn386@gmail.com> | 2023-06-20 16:13:19 +0900 |
|---|---|---|
| committer | Yuuki NAGAO <wf.yn386@gmail.com> | 2023-06-27 22:28:31 +0900 |
| commit | 7ca3c1d8920fc0a9ceef0a1d725009d1716e41fa (patch) | |
| tree | d88c1ecf02fce03d2692b46cabb1258f6a88036f /ports/stm32/powerctrlboot.c | |
| parent | 813d559bc098eeaa1c6e0fa1deff92e666c0b458 (diff) | |
stm32: Add USB support for STM32L1 MCUs.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
Diffstat (limited to 'ports/stm32/powerctrlboot.c')
| -rw-r--r-- | ports/stm32/powerctrlboot.c | 21 |
1 files changed, 2 insertions, 19 deletions
diff --git a/ports/stm32/powerctrlboot.c b/ports/stm32/powerctrlboot.c index 149c34ae6..1721f6c7e 100644 --- a/ports/stm32/powerctrlboot.c +++ b/ports/stm32/powerctrlboot.c @@ -348,6 +348,8 @@ void SystemClock_Config(void) { #elif defined(STM32L1) void SystemClock_Config(void) { + // Enable SYSCFG clock + __HAL_RCC_SYSCFG_CLK_ENABLE(); // Enable power control peripheral __HAL_RCC_PWR_CLK_ENABLE(); @@ -388,25 +390,6 @@ void SystemClock_Config(void) { SystemCoreClockUpdate(); powerctrl_config_systick(); - #if MICROPY_HW_ENABLE_USB - // Enable the 48MHz internal oscillator - RCC->CRRCR |= RCC_CRRCR_HSI48ON; - RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; - SYSCFG->CFGR3 |= SYSCFG_CFGR3_ENREF_HSI48; - while (!(RCC->CRRCR & RCC_CRRCR_HSI48RDY)) { - // Wait for HSI48 to be ready - } - - // Select RC48 as HSI48 for USB and RNG - RCC->CCIPR |= RCC_CCIPR_HSI48SEL; - - // Synchronise HSI48 with 1kHz USB SoF - __HAL_RCC_CRS_CLK_ENABLE(); - CRS->CR = 0x20 << CRS_CR_TRIM_Pos; - CRS->CFGR = 2 << CRS_CFGR_SYNCSRC_Pos | 0x22 << CRS_CFGR_FELIM_Pos - | __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000) << CRS_CFGR_RELOAD_Pos; - #endif - // Disable the Debug Module in low-power mode due to prevent // unexpected HardFault after __WFI(). #if !defined(NDEBUG) |