diff options
| author | Andrew Leech <andrew.leech@planetinnovation.com.au> | 2021-03-05 10:15:29 +1100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2022-12-09 13:25:18 +1100 |
| commit | 7ee5afe8d16e4b53a2468df097e6e1a91b8127ce (patch) | |
| tree | 50c2da13c3402ffe099ce4871295615cc1248b8a /ports/stm32/qspi.c | |
| parent | ab0258fb1ef58c7fcadd9e964921ab5adf89b443 (diff) | |
drivers/bus: Detect QSPI transfer errors and pass up to spiflash driver.
This changes the signatures of QSPI write_cmd_data, write_cmd_addr_data and
read_cmd_qaddr_qdata so they return an error code. The softqspi and stm32
hardware qspi driver are updated to follow this new signature. Also the
spiflash driver is updated to use these new return values.
Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'ports/stm32/qspi.c')
| -rw-r--r-- | ports/stm32/qspi.c | 31 |
1 files changed, 28 insertions, 3 deletions
diff --git a/ports/stm32/qspi.c b/ports/stm32/qspi.c index 04e226697..3036f6f38 100644 --- a/ports/stm32/qspi.c +++ b/ports/stm32/qspi.c @@ -196,7 +196,7 @@ STATIC int qspi_ioctl(void *self_in, uint32_t cmd) { return 0; // success } -STATIC void qspi_write_cmd_data(void *self_in, uint8_t cmd, size_t len, uint32_t data) { +STATIC int qspi_write_cmd_data(void *self_in, uint8_t cmd, size_t len, uint32_t data) { (void)self_in; QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag @@ -238,12 +238,17 @@ STATIC void qspi_write_cmd_data(void *self_in, uint8_t cmd, size_t len, uint32_t // Wait for write to finish while (!(QUADSPI->SR & QUADSPI_SR_TCF)) { + if (QUADSPI->SR & QUADSPI_SR_TEF) { + return -MP_EIO; + } } QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag + + return 0; } -STATIC void qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src) { +STATIC int qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src) { (void)self_in; uint8_t adsize = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 3 : 2; @@ -286,6 +291,9 @@ STATIC void qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, // Write out the data 1 byte at a time while (len) { while (!(QUADSPI->SR & QUADSPI_SR_FTF)) { + if (QUADSPI->SR & QUADSPI_SR_TEF) { + return -MP_EIO; + } } *(volatile uint8_t *)&QUADSPI->DR = *src++; --len; @@ -294,9 +302,14 @@ STATIC void qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, // Wait for write to finish while (!(QUADSPI->SR & QUADSPI_SR_TCF)) { + if (QUADSPI->SR & QUADSPI_SR_TEF) { + return -MP_EIO; + } } QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag + + return 0; } STATIC uint32_t qspi_read_cmd(void *self_in, uint8_t cmd, size_t len) { @@ -320,6 +333,10 @@ STATIC uint32_t qspi_read_cmd(void *self_in, uint8_t cmd, size_t len) { // Wait for read to finish while (!(QUADSPI->SR & QUADSPI_SR_TCF)) { + if (QUADSPI->SR & QUADSPI_SR_TEF) { + // Not sure that calling functions will deal with this appropriately + return -MP_EIO; + } } QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag @@ -328,7 +345,7 @@ STATIC uint32_t qspi_read_cmd(void *self_in, uint8_t cmd, size_t len) { return QUADSPI->DR; } -STATIC void qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) { +STATIC int qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) { (void)self_in; uint8_t adsize = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 3 : 2; @@ -366,6 +383,9 @@ STATIC void qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, if (((uintptr_t)dest & 3) == 0) { while (len >= 4) { while (!(QUADSPI->SR & QUADSPI_SR_FTF)) { + if (QUADSPI->SR & QUADSPI_SR_TEF) { + return -MP_EIO; + } } *(uint32_t *)dest = QUADSPI->DR; dest += 4; @@ -376,12 +396,17 @@ STATIC void qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, // Read in remaining data 1 byte at a time while (len) { while (!((QUADSPI->SR >> QUADSPI_SR_FLEVEL_Pos) & 0x3f)) { + if (QUADSPI->SR & QUADSPI_SR_TEF) { + return -MP_EIO; + } } *dest++ = *(volatile uint8_t *)&QUADSPI->DR; --len; } QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag + + return 0; } const mp_qspi_proto_t qspi_proto = { |
