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authorDamien George <damien@micropython.org>2023-03-08 14:10:02 +1100
committerDamien George <damien@micropython.org>2023-04-27 18:03:06 +1000
commitb1229efbd1509654dec6053865ab828d769e29db (patch)
treee1a65606dd1f0a8cfe2af08f9c4ff821fb575b02 /ports/stm32/sdram.c
parente160fe7bc64212a3ce56f5478f208e2b4d343a8b (diff)
all: Fix spelling mistakes based on codespell check.
Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'ports/stm32/sdram.c')
-rw-r--r--ports/stm32/sdram.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/ports/stm32/sdram.c b/ports/stm32/sdram.c
index fb0e5a868..b0a3ef215 100644
--- a/ports/stm32/sdram.c
+++ b/ports/stm32/sdram.c
@@ -346,7 +346,7 @@ bool __attribute__((optimize("Os"))) sdram_test(bool exhaustive) {
}
}
- // Check for aliasing (overlaping addresses)
+ // Check for aliasing (overlapping addresses)
mem_base[0] = antipattern;
__DSB();
for (uint32_t i = 1; i < MICROPY_HW_SDRAM_SIZE; i <<= 1) {