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authorDamien George <damien@micropython.org>2024-06-18 17:46:21 +1000
committerDamien George <damien@micropython.org>2025-07-08 16:24:27 +1000
commiteb3ea9ee13093d81053f5d07b8c96e4fc0e1383d (patch)
tree07f7bb3e3f9c6fb1f4204c531d3c18a29c3cb189 /ports/stm32/spi.c
parent24fd5f72682922664c0bcf70d6e3631a6d5b8d2b (diff)
stm32: Add support for STM32N6xx MCUs.
This commit adds preliminary support for ST's new STM32N6xx MCUs. Supported features of this MCU so far are: - basic clock tree initialisation, running at 800MHz - fully working USB - XSPI in memory-mapped mode - machine.Pin - machine.UART - RTC and deepsleep support - SD card - filesystem - ROMFS - WiFi and BLE via cyw43-driver (SDIO backend) Note that the N6 does not have internal flash, and has some tricky boot sequence, so using a custom bootloader (mboot) is almost a necessity. Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'ports/stm32/spi.c')
-rw-r--r--ports/stm32/spi.c32
1 files changed, 29 insertions, 3 deletions
diff --git a/ports/stm32/spi.c b/ports/stm32/spi.c
index 96dd17065..19f2b65ed 100644
--- a/ports/stm32/spi.c
+++ b/ports/stm32/spi.c
@@ -106,7 +106,7 @@ const spi_t spi_obj[6] = {
#error "spi_obj needs updating for new value of MICROPY_HW_SUBGHZSPI_ID"
#endif
-#if defined(STM32H5) || defined(STM32H7)
+#if defined(STM32H5) || defined(STM32H7) || defined(STM32N6)
// STM32H5/H7 HAL requires SPI IRQs to be enabled and handled.
#if defined(MICROPY_HW_SPI1_SCK)
void SPI1_IRQHandler(void) {
@@ -176,6 +176,18 @@ void spi_init0(void) {
#if defined(MICROPY_HW_SUBGHZSPI_ID)
SPIHandleSubGhz.Instance = SUBGHZSPI;
#endif
+
+ #if defined(STM32N6)
+ // SPI1/2/3/6 clock configuration, PCLKx (max 200MHz).
+ LL_RCC_SetSPIClockSource(LL_RCC_SPI1_CLKSOURCE_PCLK2);
+ LL_RCC_SetSPIClockSource(LL_RCC_SPI2_CLKSOURCE_PCLK1);
+ LL_RCC_SetSPIClockSource(LL_RCC_SPI3_CLKSOURCE_PCLK1);
+ LL_RCC_SetSPIClockSource(LL_RCC_SPI6_CLKSOURCE_PCLK4);
+
+ // SPI4/5 clock configuration, IC14 (max 100MHz).
+ LL_RCC_SetSPIClockSource(LL_RCC_SPI4_CLKSOURCE_IC14);
+ LL_RCC_SetSPIClockSource(LL_RCC_SPI5_CLKSOURCE_IC14);
+ #endif
}
int spi_find_index(mp_obj_t id) {
@@ -256,6 +268,20 @@ static uint32_t spi_get_source_freq(SPI_HandleTypeDef *spi) {
} else {
return HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI6);
}
+ #elif defined(STM32N6)
+ if (spi->Instance == SPI1) {
+ return LL_RCC_GetSPIClockFreq(LL_RCC_SPI1_CLKSOURCE);
+ } else if (spi->Instance == SPI2) {
+ return LL_RCC_GetSPIClockFreq(LL_RCC_SPI2_CLKSOURCE);
+ } else if (spi->Instance == SPI3) {
+ return LL_RCC_GetSPIClockFreq(LL_RCC_SPI3_CLKSOURCE);
+ } else if (spi->Instance == SPI4) {
+ return LL_RCC_GetSPIClockFreq(LL_RCC_SPI4_CLKSOURCE);
+ } else if (spi->Instance == SPI5) {
+ return LL_RCC_GetSPIClockFreq(LL_RCC_SPI5_CLKSOURCE);
+ } else {
+ return LL_RCC_GetSPIClockFreq(LL_RCC_SPI6_CLKSOURCE);
+ }
#else // !STM32F0, !STM32G0, !STM32H
#if defined(SPI2)
if (spi->Instance == SPI2) {
@@ -470,7 +496,7 @@ int spi_init(const spi_t *self, bool enable_nss_pin) {
dma_invalidate_channel(self->tx_dma_descr);
dma_invalidate_channel(self->rx_dma_descr);
- #if defined(STM32H5) || defined(STM32H7)
+ #if defined(STM32H5) || defined(STM32H7) || defined(STM32N6)
NVIC_SetPriority(irqn, IRQ_PRI_SPI);
HAL_NVIC_EnableIRQ(irqn);
#else
@@ -724,7 +750,7 @@ void spi_print(const mp_print_t *print, const spi_t *spi_obj, bool legacy) {
if (spi->State != HAL_SPI_STATE_RESET) {
if (spi->Init.Mode == SPI_MODE_MASTER) {
// compute baudrate
- #if defined(STM32H5) || defined(STM32H7)
+ #if defined(STM32H5) || defined(STM32H7) || defined(STM32N6)
uint log_prescaler = (spi->Init.BaudRatePrescaler >> 28) + 1;
#else
uint log_prescaler = (spi->Init.BaudRatePrescaler >> 3) + 1;