drivers/bus: Detect QSPI transfer errors and pass up to spiflash driver.

This changes the signatures of QSPI write_cmd_data, write_cmd_addr_data and
read_cmd_qaddr_qdata so they return an error code.  The softqspi and stm32
hardware qspi driver are updated to follow this new signature.  Also the
spiflash driver is updated to use these new return values.

Signed-off-by: Damien George <damien@micropython.org>

1 files changed, 14 insertions, 10 deletions

diff --git a/ports/stm32/spibdev.c b/ports/stm32/spibdev.c
index afa6f4ecd..fecd4a991 100644
--- a/ports/stm32/spibdev.c
+++ b/ports/stm32/spibdev.c
@@ -40,25 +40,29 @@ int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg) {
             bdev->flash_tick_counter_last_write = 0;
             return 0;
 
-        case BDEV_IOCTL_IRQ_HANDLER:
+        case BDEV_IOCTL_IRQ_HANDLER: {
+            int ret = 0;
             #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
             if ((bdev->spiflash.flags & 1) && HAL_GetTick() - bdev->flash_tick_counter_last_write >= 1000) {
-                mp_spiflash_cache_flush(&bdev->spiflash);
+                ret = mp_spiflash_cache_flush(&bdev->spiflash);
                 led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off
             }
             #endif
-            return 0;
+            return ret;
+        }
 
-        case BDEV_IOCTL_SYNC:
+        case BDEV_IOCTL_SYNC: {
+            int ret = 0;
             #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
             if (bdev->spiflash.flags & 1) {
                 uint32_t basepri = raise_irq_pri(IRQ_PRI_FLASH); // prevent cache flushing and USB access
-                mp_spiflash_cache_flush(&bdev->spiflash);
+                ret = mp_spiflash_cache_flush(&bdev->spiflash);
                 led_state(PYB_LED_RED, 0); // indicate a clean cache with LED off
                 restore_irq_pri(basepri);
             }
             #endif
-            return 0;
+            return ret;
+        }
     }
     return -MP_EINVAL;
 }
@@ -66,10 +70,10 @@ int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg) {
 #if MICROPY_HW_SPIFLASH_ENABLE_CACHE
 int spi_bdev_readblocks(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uint32_t num_blocks) {
     uint32_t basepri = raise_irq_pri(IRQ_PRI_FLASH); // prevent cache flushing and USB access
-    mp_spiflash_cached_read(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, dest);
+    int ret = mp_spiflash_cached_read(&bdev->spiflash, block_num * FLASH_BLOCK_SIZE, num_blocks * FLASH_BLOCK_SIZE, dest);
     restore_irq_pri(basepri);
 
-    return 0;
+    return ret;
 }
 
 int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_num, uint32_t num_blocks) {
@@ -87,10 +91,10 @@ int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_nu
 
 int spi_bdev_readblocks_raw(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uint32_t block_offset, uint32_t num_bytes) {
     uint32_t basepri = raise_irq_pri(IRQ_PRI_FLASH); // prevent cache flushing and USB access
-    mp_spiflash_read(&bdev->spiflash, block_num * MP_SPIFLASH_ERASE_BLOCK_SIZE + block_offset, num_bytes, dest);
+    int ret = mp_spiflash_read(&bdev->spiflash, block_num * MP_SPIFLASH_ERASE_BLOCK_SIZE + block_offset, num_bytes, dest);
     restore_irq_pri(basepri);
 
-    return 0;
+    return ret;
 }
 
 int spi_bdev_writeblocks_raw(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_num, uint32_t block_offset, uint32_t num_bytes) {