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authorChris Mason <c.mason@inchipdesign.com.au>2019-12-05 00:46:24 +1100
committerDamien George <damien.p.george@gmail.com>2019-12-05 15:31:41 +1100
commitd61e7a6d8a146f0dd528ebc398c576d69a78f41c (patch)
treeae4ea40662be28888e947654b55dbd3a10bc8fa8 /ports/stm32/uart.c
parent9ca8a503ed3d7b31fc1cfe0e2e51925d3c0c3396 (diff)
stm32/uart: Add support for UART4/5 on L0 MCUs.
Diffstat (limited to 'ports/stm32/uart.c')
-rw-r--r--ports/stm32/uart.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c
index 72bb53f80..d2d234a2c 100644
--- a/ports/stm32/uart.c
+++ b/ports/stm32/uart.c
@@ -247,6 +247,10 @@ bool uart_init(pyb_uart_obj_t *uart_obj,
UARTx = USART4;
irqn = USART3_8_IRQn;
__HAL_RCC_USART4_CLK_ENABLE();
+ #elif defined(STM32L0)
+ UARTx = USART4;
+ irqn = USART4_5_IRQn;
+ __HAL_RCC_USART4_CLK_ENABLE();
#else
UARTx = UART4;
irqn = UART4_IRQn;
@@ -274,6 +278,10 @@ bool uart_init(pyb_uart_obj_t *uart_obj,
UARTx = USART5;
irqn = USART3_8_IRQn;
__HAL_RCC_USART5_CLK_ENABLE();
+ #elif defined(STM32L0)
+ UARTx = USART5;
+ irqn = USART4_5_IRQn;
+ __HAL_RCC_USART5_CLK_ENABLE();
#else
UARTx = UART5;
irqn = UART5_IRQn;