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authorAlessandro Gatti <a.gatti@frob.it>2025-01-14 01:09:40 +0100
committerDamien George <damien@micropython.org>2025-01-16 12:51:51 +1100
commit928c71638cf13eb0b47aebb917913820b889403f (patch)
tree1589e999e385c5586f8126d2dde496022f5d9f2f /py/asmarm.c
parente84c9abfc21f57fe93b4d9a05c1d123e3f333880 (diff)
py/asmarm: Fix locals address loading code generation with large imm.
This commit fixes code generation for loading a local's address if its index is greater than 63. The old code blindly encoded the offset into an `ADD Rd, Rn, #imm` opcode, but only the lowest 8 bits would be put into the opcode itself. This commit instead generates a two-opcodes sequence, a constant load into R8, and then an `ADD Rd, Rn, R8` opcode. This fixes `tests/float/math_domain.py` for the qemu/SABRELITE board. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Diffstat (limited to 'py/asmarm.c')
-rw-r--r--py/asmarm.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/py/asmarm.c b/py/asmarm.c
index b20bdebde..a1c15d0fa 100644
--- a/py/asmarm.c
+++ b/py/asmarm.c
@@ -292,8 +292,15 @@ void asm_arm_orr_reg_reg_reg(asm_arm_t *as, uint rd, uint rn, uint rm) {
}
void asm_arm_mov_reg_local_addr(asm_arm_t *as, uint rd, int local_num) {
- // add rd, sp, #local_num*4
- emit_al(as, asm_arm_op_add_imm(rd, ASM_ARM_REG_SP, local_num << 2));
+ if (local_num >= 0x40) {
+ // mov r8, #local_num*4
+ // add rd, sp, r8
+ asm_arm_mov_reg_i32_optimised(as, ASM_ARM_REG_R8, local_num << 2);
+ emit_al(as, asm_arm_op_add_reg(rd, ASM_ARM_REG_SP, ASM_ARM_REG_R8));
+ } else {
+ // add rd, sp, #local_num*4
+ emit_al(as, asm_arm_op_add_imm(rd, ASM_ARM_REG_SP, local_num << 2));
+ }
}
void asm_arm_mov_reg_pcrel(asm_arm_t *as, uint reg_dest, uint label) {