diff options
| author | Alessandro Gatti <a.gatti@frob.it> | 2025-01-24 00:20:39 +0100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2025-01-26 23:42:36 +1100 |
| commit | 40585eaa8f1b603f0094b73764e8ce5623812ecf (patch) | |
| tree | bb6e210d652e9184ab02720697b063b2a9f56661 /py/asmrv32.h | |
| parent | bfc0d7b0b97cbf52db892775b0f371dd06d2ba08 (diff) | |
py/emitnative: Emit shorter exception handler entry code on RV32.
This commit improves the RV32 code sequence that is emitted if a
function needs to set up an exception handler as its prologue.
The old code would clear a temporary register and then copy that value
to places that needed to be initialised with zero values. On RV32
there's a dedicated register that's hardwired to be equal to zero, which
allows us to bypass the extra register clear and use the zero register
to initialise values.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Diffstat (limited to 'py/asmrv32.h')
| -rw-r--r-- | py/asmrv32.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/py/asmrv32.h b/py/asmrv32.h index 584e3ffd2..b09f48eb1 100644 --- a/py/asmrv32.h +++ b/py/asmrv32.h @@ -694,6 +694,7 @@ static inline void asm_rv32_opcode_xori(asm_rv32_t *state, mp_uint_t rd, mp_uint #define REG_LOCAL_1 ASM_RV32_REG_S3 #define REG_LOCAL_2 ASM_RV32_REG_S4 #define REG_LOCAL_3 ASM_RV32_REG_S5 +#define REG_ZERO ASM_RV32_REG_ZERO void asm_rv32_meta_comparison_eq(asm_rv32_t *state, mp_uint_t rs1, mp_uint_t rs2, mp_uint_t rd); void asm_rv32_meta_comparison_ne(asm_rv32_t *state, mp_uint_t rs1, mp_uint_t rs2, mp_uint_t rd); @@ -756,6 +757,7 @@ void asm_rv32_emit_store_reg_reg_offset(asm_rv32_t *state, mp_uint_t source, mp_ #define ASM_STORE_REG_REG(state, rs1, rs2) ASM_STORE32_REG_REG(state, rs1, rs2) #define ASM_SUB_REG_REG(state, rd, rs) asm_rv32_opcode_sub(state, rd, rd, rs) #define ASM_XOR_REG_REG(state, rd, rs) asm_rv32_emit_optimised_xor(state, rd, rs) +#define ASM_CLR_REG(state, rd) #endif |