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| author | Damien George <damien@micropython.org> | 2024-03-18 12:29:11 +1100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2024-03-19 10:31:36 +1100 |
| commit | f52b0d0ff1788225fd61a748e0786aa90e953481 (patch) | |
| tree | 61f99662e12760408831b85444477fe46212bbb9 /py/asmxtensa.h | |
| parent | d92dff881ca99281893b1d77eee4bf2eca25d0c8 (diff) | |
py/asm: Add ASM_NOT_REG and ASM_NEG_REG macros for unary ops.
ASM_NOT_REG is optional, it can be synthesised by xor(reg, -1).
ASM_NEG_REG can also be synthesised with a subtraction, but most
architectures have a dedicated instruction for it.
Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'py/asmxtensa.h')
| -rw-r--r-- | py/asmxtensa.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/py/asmxtensa.h b/py/asmxtensa.h index 5bd6426a1..aef9e7462 100644 --- a/py/asmxtensa.h +++ b/py/asmxtensa.h @@ -211,6 +211,10 @@ static inline void asm_xtensa_op_mull(asm_xtensa_t *as, uint reg_dest, uint reg_ asm_xtensa_op24(as, ASM_XTENSA_ENCODE_RRR(0, 2, 8, reg_dest, reg_src_a, reg_src_b)); } +static inline void asm_xtensa_op_neg(asm_xtensa_t *as, uint reg_dest, uint reg_src) { + asm_xtensa_op24(as, ASM_XTENSA_ENCODE_RRR(0, 0, 6, reg_dest, 0, reg_src)); +} + static inline void asm_xtensa_op_or(asm_xtensa_t *as, uint reg_dest, uint reg_src_a, uint reg_src_b) { asm_xtensa_op24(as, ASM_XTENSA_ENCODE_RRR(0, 0, 2, reg_dest, reg_src_a, reg_src_b)); } @@ -371,6 +375,7 @@ void asm_xtensa_call_ind_win(asm_xtensa_t *as, uint idx); #define ASM_MOV_REG_LOCAL_ADDR(as, reg_dest, local_num) asm_xtensa_mov_reg_local_addr((as), (reg_dest), ASM_NUM_REGS_SAVED + (local_num)) #define ASM_MOV_REG_PCREL(as, reg_dest, label) asm_xtensa_mov_reg_pcrel((as), (reg_dest), (label)) +#define ASM_NEG_REG(as, reg_dest) asm_xtensa_op_neg((as), (reg_dest), (reg_dest)) #define ASM_LSL_REG_REG(as, reg_dest, reg_shift) \ do { \ asm_xtensa_op_ssl((as), (reg_shift)); \ |