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| author | Damien George <damien.p.george@gmail.com> | 2017-03-28 12:54:01 +1100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2017-03-28 12:54:01 +1100 |
| commit | ff927cb106a6a74bd04f729bc0c1fded6955881f (patch) | |
| tree | 24e7dc212fe465e172a36432cbebe62f2b2adad9 /py/builtinimport.c | |
| parent | 9a1b3da158baf1882777f97212616ca3fe925963 (diff) | |
stmhal/spi: Clean and/or invalidate D-cache before SPI DMA transfers.
On MCUs with a cache (eg F7) this must be done or else the SPI data that is
transferred is incorrect.
Diffstat (limited to 'py/builtinimport.c')
0 files changed, 0 insertions, 0 deletions