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| author | iabdalkader <i.abdalkader@gmail.com> | 2025-02-06 10:14:34 +0100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2025-04-09 00:22:32 +1000 |
| commit | 92f056d58f74cfd3986aaef1eea08f4f948fe03a (patch) | |
| tree | c1c4f61a464973ac83637660ad5c6f53d0e54b62 /py/cstack.c | |
| parent | 602bc86b6d8ebd200029568c060b878146050da1 (diff) | |
alif/ospi_flash: Add 16-bit words swap flash setting.
The byte order (endianness) seems to be swapped when read in 8D-8D-8D in
XIP mode, for most flashes, with the exception of MX which seems to swap
half-words.
This commit adds a flash setting to allow parts to enable half-word swap
when data is written, to fix this issue. By default, only endianness is
fixed.
Tested with both MX and ISSI parts on AE3, flash test and simple file
write/read.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
Diffstat (limited to 'py/cstack.c')
0 files changed, 0 insertions, 0 deletions