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authorAlessandro Gatti <a.gatti@frob.it>2025-06-10 19:54:28 +0200
committerDamien George <damien@micropython.org>2025-07-01 15:34:29 +1000
commit12f36cc13c126770d81bc95daf695f3aa05bc5cb (patch)
tree2243db31bf0dbd89ac7648ba4f16d3dabcc98c03 /py/emitnative.c
parentcd1b921bf296da72cee4f6135ad8bd74e6217d2f (diff)
py/asmxtensa: Implement the full set of Viper load/store operations.
This commit expands the implementation of Viper load/store operations that are optimised for the Xtensa platform. Now both load and store emitters should generate the shortest possible sequence in all cases. Redundant specialised operation emitters have been aliased to the general case implementation - this was the case of integer-indexed load/store operations with a fixed offset of zero. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Diffstat (limited to 'py/emitnative.c')
-rw-r--r--py/emitnative.c18
1 files changed, 0 insertions, 18 deletions
diff --git a/py/emitnative.c b/py/emitnative.c
index 36e9719db..f3ab483e8 100644
--- a/py/emitnative.c
+++ b/py/emitnative.c
@@ -1534,12 +1534,6 @@ static void emit_native_load_subscr(emit_t *emit) {
#ifdef ASM_LOAD8_REG_REG_OFFSET
ASM_LOAD8_REG_REG_OFFSET(emit->as, REG_RET, reg_base, index_value);
#else
- #if N_XTENSA || N_XTENSAWIN
- if (index_value >= 0 && index_value < 256) {
- asm_xtensa_op_l8ui(emit->as, REG_RET, reg_base, index_value);
- break;
- }
- #endif
if (index_value != 0) {
// index is non-zero
need_reg_single(emit, reg_index, 0);
@@ -1776,12 +1770,6 @@ static void emit_native_store_subscr(emit_t *emit) {
#ifdef ASM_STORE8_REG_REG_OFFSET
ASM_STORE8_REG_REG_OFFSET(emit->as, reg_value, reg_base, index_value);
#else
- #if N_XTENSA || N_XTENSAWIN
- if (index_value >= 0 && index_value < 256) {
- asm_xtensa_op_s8i(emit->as, reg_value, reg_base, index_value);
- break;
- }
- #endif
if (index_value != 0) {
// index is non-zero
ASM_MOV_REG_IMM(emit->as, reg_index, index_value);
@@ -1797,12 +1785,6 @@ static void emit_native_store_subscr(emit_t *emit) {
#ifdef ASM_STORE16_REG_REG_OFFSET
ASM_STORE16_REG_REG_OFFSET(emit->as, reg_value, reg_base, index_value);
#else
- #if N_XTENSA || N_XTENSAWIN
- if (index_value >= 0 && index_value < 256) {
- asm_xtensa_op_s16i(emit->as, reg_value, reg_base, index_value);
- break;
- }
- #endif
if (index_value != 0) {
// index is a non-zero immediate
ASM_MOV_REG_IMM(emit->as, reg_index, index_value << 1);