summaryrefslogtreecommitdiff
path: root/py/mpprint.c
diff options
context:
space:
mode:
authorMark Grosen <mark@grosen.org>2022-09-26 11:28:39 -0700
committerDamien George <damien@micropython.org>2022-10-28 19:06:41 +1100
commit12f99481518b0ebcb14f00b2323865a845c2a4f1 (patch)
tree5e7bfb350b6a55d6f565218cfd92b04f72a18b50 /py/mpprint.c
parent6643b4f0ccf1e7d3f56eb27d51ff985971a79356 (diff)
esp32/machine_i2c: Fix clocks and timeouts for ESP32-C3, ESP32-S3.
Each SoC family has its own clocks and timings/timeouts. For I2C, the default source clock is either APB (ESP32, ESP32-S2) or XTAL (ESP32-S3, ESP32-C3) as shown in the datasheets. Since machine_i2c.c/machine_hw_i2c_init() uses the default clk_flags (0), the alternate low-power clock source is never selected in ESP-IDF i2c.c/i2c_param_config(). There is not an API in i2c.c to get the source clock frequency, so a compile-time value is used based on SoC family. Also, the maximum timeout is different across the SoC families, so use the I2C_LL_MAX_TIMEOUT constant to eliminate the warning from i2c_set_timeout(). With these changes, the following results were obtained. The I2C SCL frequencies were measured with a Saleae logic analyzer. ESP32 (TTGO T Dislay) I2C(0, scl=22, sda=21, freq=101781) Measured: 100KHz I2C(0, scl=22, sda=21, freq=430107) Measured: 400KHz I2C(0, scl=22, sda=21, freq=1212121) Measured: 941KHz ESP32-S3 (TTGO T-QT) I2C(0, scl=34, sda=33, freq=111111) Measured: 107KHz I2C(0, scl=34, sda=33, freq=444444) Measured: 400KHz I2C(0, scl=34, sda=33, freq=1111111) Measured: 842KHz ESP32-C3 (XIAO ESP32C3) I2C(0, scl=7, sda=6, freq=107816) Measured: 103KHz I2C(0, scl=7, sda=6, freq=444444) Measured: 380KHz I2C(0, scl=7, sda=6, freq=1176470) Measured: 800KHz (ESP32-S2 board was not available for testing.)
Diffstat (limited to 'py/mpprint.c')
0 files changed, 0 insertions, 0 deletions