diff options
| author | Michael Neuling <mikey@neuling.org> | 2019-08-22 10:21:48 +1000 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2019-10-22 22:45:33 +1100 |
| commit | 079cc940a68b3b3b9d47d4402267393a528a0477 (patch) | |
| tree | cf124486508818ab74f85625ab973e01a1db4ad4 /py/nlr.h | |
| parent | 19ca025b45b3160a2ad5a20014cdd7bf0053ff9d (diff) | |
powerpc: Add initial port to bare metal PowerPC arch.
Runs in microwatt (GHDL and FPGA) and qemu.
Port done initially by Michael Neuling, with help from Anton Blanchard and
Jordan Niethe.
Diffstat (limited to 'py/nlr.h')
| -rw-r--r-- | py/nlr.h | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -73,6 +73,10 @@ #elif defined(__xtensa__) #define MICROPY_NLR_XTENSA (1) #define MICROPY_NLR_NUM_REGS (MICROPY_NLR_NUM_REGS_XTENSA) +#elif defined(__powerpc__) + #define MICROPY_NLR_POWERPC (1) + // this could be less but using 128 for safety + #define MICROPY_NLR_NUM_REGS (128) #else #define MICROPY_NLR_SETJMP (1) //#warning "No native NLR support for this arch, using setjmp implementation" |