diff options
| author | Damien George <damien.p.george@gmail.com> | 2018-08-17 14:53:58 +1000 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2018-08-17 14:53:58 +1000 |
| commit | 794c32102e63f09642a9f32017834673bbe4e32d (patch) | |
| tree | 369d934ed4fd53055eb9b916d7569e4da62086a1 /py | |
| parent | a0a29724c820340cf574cc174159fde5fabb8fd7 (diff) | |
py/asmxtensa: Use narrow version of add instr to reduce native code size
Diffstat (limited to 'py')
| -rw-r--r-- | py/asmxtensa.c | 6 | ||||
| -rw-r--r-- | py/asmxtensa.h | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/py/asmxtensa.c b/py/asmxtensa.c index 6c7c344f1..1f47e3b2d 100644 --- a/py/asmxtensa.c +++ b/py/asmxtensa.c @@ -95,7 +95,7 @@ void asm_xtensa_exit(asm_xtensa_t *as) { asm_xtensa_op_addi(as, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A1, as->stack_adjust); } else { asm_xtensa_op_movi(as, ASM_XTENSA_REG_A9, as->stack_adjust); - asm_xtensa_op_add(as, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A9); + asm_xtensa_op_add_n(as, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A1, ASM_XTENSA_REG_A9); } asm_xtensa_op_ret_n(as); @@ -183,7 +183,7 @@ void asm_xtensa_mov_reg_local_addr(asm_xtensa_t *as, uint reg_dest, int local_nu asm_xtensa_op_addi(as, reg_dest, ASM_XTENSA_REG_A1, off); } else { asm_xtensa_op_movi(as, reg_dest, off); - asm_xtensa_op_add(as, reg_dest, reg_dest, ASM_XTENSA_REG_A1); + asm_xtensa_op_add_n(as, reg_dest, reg_dest, ASM_XTENSA_REG_A1); } } @@ -206,7 +206,7 @@ void asm_xtensa_mov_reg_pcrel(asm_xtensa_t *as, uint reg_dest, uint label) { mp_asm_base_get_cur_to_write_bytes(&as->base, pad); // Add PC to relative offset - asm_xtensa_op_add(as, reg_dest, reg_dest, ASM_XTENSA_REG_A0); + asm_xtensa_op_add_n(as, reg_dest, reg_dest, ASM_XTENSA_REG_A0); } #endif // MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA diff --git a/py/asmxtensa.h b/py/asmxtensa.h index 9a8ef45c0..d999f5173 100644 --- a/py/asmxtensa.h +++ b/py/asmxtensa.h @@ -113,8 +113,8 @@ void asm_xtensa_op24(asm_xtensa_t *as, uint32_t op); // raw instructions -static inline void asm_xtensa_op_add(asm_xtensa_t *as, uint reg_dest, uint reg_src_a, uint reg_src_b) { - asm_xtensa_op24(as, ASM_XTENSA_ENCODE_RRR(0, 0, 8, reg_dest, reg_src_a, reg_src_b)); +static inline void asm_xtensa_op_add_n(asm_xtensa_t *as, uint reg_dest, uint reg_src_a, uint reg_src_b) { + asm_xtensa_op16(as, ASM_XTENSA_ENCODE_RRRN(10, reg_dest, reg_src_a, reg_src_b)); } static inline void asm_xtensa_op_addi(asm_xtensa_t *as, uint reg_dest, uint reg_src, int imm8) { @@ -307,7 +307,7 @@ void asm_xtensa_mov_reg_pcrel(asm_xtensa_t *as, uint reg_dest, uint label); #define ASM_OR_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_or((as), (reg_dest), (reg_dest), (reg_src)) #define ASM_XOR_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_xor((as), (reg_dest), (reg_dest), (reg_src)) #define ASM_AND_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_and((as), (reg_dest), (reg_dest), (reg_src)) -#define ASM_ADD_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_add((as), (reg_dest), (reg_dest), (reg_src)) +#define ASM_ADD_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_add_n((as), (reg_dest), (reg_dest), (reg_src)) #define ASM_SUB_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_sub((as), (reg_dest), (reg_dest), (reg_src)) #define ASM_MUL_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_mull((as), (reg_dest), (reg_dest), (reg_src)) |