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authorgraham sanderson <graham.sanderson@raspberrypi.org>2021-01-17 21:56:34 -0600
committerDamien George <damien@micropython.org>2021-01-29 23:57:10 +1100
commit794df0f1d502bf715449ed6d36f16cf52b095d0b (patch)
tree9f5e10ec2b1b6d7232defff515db2023d7fa268d /py
parent15ac5a3df9b90eade2b4743e08e23ce219cb4f7f (diff)
py/emitnative: Support binary ops on ARMv6M without use of ite instr.
Diffstat (limited to 'py')
-rw-r--r--py/asmthumb.c12
-rw-r--r--py/asmthumb.h2
-rw-r--r--py/emitnative.c23
3 files changed, 37 insertions, 0 deletions
diff --git a/py/asmthumb.c b/py/asmthumb.c
index e3558b2cf..f7ac87fa0 100644
--- a/py/asmthumb.c
+++ b/py/asmthumb.c
@@ -564,6 +564,18 @@ void asm_thumb_bcc_label(asm_thumb_t *as, int cond, uint label) {
}
}
+void asm_thumb_bcc_rel9(asm_thumb_t *as, int cond, int rel) {
+ rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
+ assert(SIGNED_FIT9(rel));
+ asm_thumb_op16(as, OP_BCC_N(cond, rel));
+}
+
+void asm_thumb_b_rel12(asm_thumb_t *as, int rel) {
+ rel -= 4; // account for instruction prefetch, PC is 4 bytes ahead of this instruction
+ assert(SIGNED_FIT12(rel));
+ asm_thumb_op16(as, OP_B_N(rel));
+}
+
#define OP_BLX(reg) (0x4780 | ((reg) << 3))
#define OP_SVC(arg) (0xdf00 | (arg))
diff --git a/py/asmthumb.h b/py/asmthumb.h
index 3c4533618..17a0cca98 100644
--- a/py/asmthumb.h
+++ b/py/asmthumb.h
@@ -330,6 +330,8 @@ void asm_thumb_ldr_reg_reg_i12_optimised(asm_thumb_t *as, uint reg_dest, uint re
void asm_thumb_b_label(asm_thumb_t *as, uint label); // convenience: picks narrow or wide branch
void asm_thumb_bcc_label(asm_thumb_t *as, int cc, uint label); // convenience: picks narrow or wide branch
void asm_thumb_bl_ind(asm_thumb_t *as, uint fun_id, uint reg_temp); // convenience
+void asm_thumb_bcc_rel9(asm_thumb_t *as, int cc, int rel);
+void asm_thumb_b_rel12(asm_thumb_t *as, int rel);
// Holds a pointer to mp_fun_table
#define ASM_THUMB_REG_FUN_TABLE ASM_THUMB_REG_R7
diff --git a/py/emitnative.c b/py/emitnative.c
index 8cb5de1b4..052a50591 100644
--- a/py/emitnative.c
+++ b/py/emitnative.c
@@ -2454,6 +2454,7 @@ STATIC void emit_native_binary_op(emit_t *emit, mp_binary_op_t op) {
asm_x86_setcc_r8(emit->as, ops[op_idx], REG_RET);
#elif N_THUMB
asm_thumb_cmp_rlo_rlo(emit->as, REG_ARG_2, reg_rhs);
+ #if MICROPY_EMIT_THUMB_ARMV7M
static uint16_t ops[6 + 6] = {
// unsigned
ASM_THUMB_OP_ITE_CC,
@@ -2473,6 +2474,28 @@ STATIC void emit_native_binary_op(emit_t *emit, mp_binary_op_t op) {
asm_thumb_op16(emit->as, ops[op_idx]);
asm_thumb_mov_rlo_i8(emit->as, REG_RET, 1);
asm_thumb_mov_rlo_i8(emit->as, REG_RET, 0);
+ #else
+ static uint16_t ops[6 + 6] = {
+ // unsigned
+ ASM_THUMB_CC_CC,
+ ASM_THUMB_CC_HI,
+ ASM_THUMB_CC_EQ,
+ ASM_THUMB_CC_LS,
+ ASM_THUMB_CC_CS,
+ ASM_THUMB_CC_NE,
+ // signed
+ ASM_THUMB_CC_LT,
+ ASM_THUMB_CC_GT,
+ ASM_THUMB_CC_EQ,
+ ASM_THUMB_CC_LE,
+ ASM_THUMB_CC_GE,
+ ASM_THUMB_CC_NE,
+ };
+ asm_thumb_bcc_rel9(emit->as, ops[op_idx], 6);
+ asm_thumb_mov_rlo_i8(emit->as, REG_RET, 0);
+ asm_thumb_b_rel12(emit->as, 4);
+ asm_thumb_mov_rlo_i8(emit->as, REG_RET, 1);
+ #endif
#elif N_ARM
asm_arm_cmp_reg_reg(emit->as, REG_ARG_2, reg_rhs);
static uint ccs[6 + 6] = {