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| author | Alessandro Gatti <a.gatti@frob.it> | 2024-07-25 18:42:30 +0200 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2024-08-07 16:23:21 +1000 |
| commit | 55b2720687b6bcd71b8a5c9a5d87bea53c57743a (patch) | |
| tree | 948196cf12eb757f3e4633491d2e07ed49d2d4ea /shared/runtime/gchelper.h | |
| parent | aa0b8f340d0e660cf3c1688fa1e755fdbc3ef574 (diff) | |
shared/runtime/gchelper: Add RISC-V RV64I native gchelper.
Add native gchelper support for 64 bits RISC-V RV64I targets.
Now that RV64 is under CI, this also enables platform-specific ghelper
in the Unix port.
Also changes the data type holding the register contents to something more
appropriate, so in the remote eventuality somebody wants to use this with
RV128 all they have to do is update the `__riscv_xlen` check.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Diffstat (limited to 'shared/runtime/gchelper.h')
| -rw-r--r-- | shared/runtime/gchelper.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/shared/runtime/gchelper.h b/shared/runtime/gchelper.h index a863fb9aa..1e85e06f4 100644 --- a/shared/runtime/gchelper.h +++ b/shared/runtime/gchelper.h @@ -41,7 +41,7 @@ typedef uintptr_t gc_helper_regs_t[4]; typedef uintptr_t gc_helper_regs_t[10]; #elif defined(__aarch64__) typedef uintptr_t gc_helper_regs_t[11]; // x19-x29 -#elif defined(__riscv) && defined(__riscv_xlen) && (__riscv_xlen == 32) +#elif defined(__riscv) && (__riscv_xlen <= 64) typedef uintptr_t gc_helper_regs_t[12]; // S0-S11 #endif |