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authorDamien George <damien.p.george@gmail.com>2015-08-03 00:05:16 +0100
committerDamien George <damien.p.george@gmail.com>2015-08-03 00:14:48 +0100
commit0851751615580d02bd6f841e13651923f05fde59 (patch)
tree28b788def0d7a128b57512a923a84657d65d11be /stmhal/uart.c
parent6f1c00869c761ff84b21939a057d7752e0c01be9 (diff)
stmhal: Factor GPIO clock enable logic into mp_hal_gpio_clock_enable.
Extracted GPIO clock enable logic into mp_hal_gpio_clock_enable and called from anyplace which might need to use GPIO functions on ports other than A-D. Thanks to Dave Hylands for the patch.
Diffstat (limited to 'stmhal/uart.c')
-rw-r--r--stmhal/uart.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/stmhal/uart.c b/stmhal/uart.c
index fb1386d04..9ff1668e3 100644
--- a/stmhal/uart.c
+++ b/stmhal/uart.c
@@ -233,6 +233,7 @@ STATIC bool uart_init2(pyb_uart_obj_t *uart_obj) {
uart_obj->uart.Instance = UARTx;
// init GPIO
+ mp_hal_gpio_clock_enable(GPIO_Port);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.Pin = GPIO_Pin;
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;